MC74LCX245 Low-Voltage CMOS Octal Transceiver With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The MC74LCX245 is a high performance, non−inverting octal transceiver operating from a 2.0 to 5.5 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX245 inputs to be safely driven from 5 V devices if VCC is less than 5.0 V. The MC74LCX245 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Current drive capability is 24 mA at both A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bi−directional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition. • 20 20 1 SOIC−20 DW SUFFIX CASE 751D LCX245 AWLYYWWG 1 20 20 TSSOP−20 DT SUFFIX CASE 948E 1 Designed for 2.0 to 5.5 V VCC Operation 5 V Tolerant − Interface Capability With 5 V TTL Logic LCX 245 ALYWG G 1 Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V QFN20 MN SUFFIX CASE 485AA LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (10 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA • • ESD Performance: • MARKING DIAGRAMS 1 Features • • • • • • • • http://onsemi.com Human Body Model >2000 V Machine Model >200 V NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant A L, WL Y, YY W, WW G or G LCX 245 ALYWG G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2012 October, 2012 − Rev. 11 1 Publication Order Number: MC74LCX245/D MC74LCX245 VCC OE B0 B1 B2 B3 B4 B5 B6 B7 20 19 18 17 16 15 14 13 12 11 OE 19 T/R 1 A0 2 18 1 2 3 4 5 6 7 T/R A0 A1 A2 A3 A4 A5 19 8 9 10 A6 A7 GND A1 3 17 12 A2 QFN PIN #1 16 10 A3 2 15 A4 A5 PINS FUNCTION OE T/R A0−A7 B0−B7 Output Enable Input Transmit/Receive Input Side A 3−State Inputs or 3−State Outputs Side B 3−State Inputs or 3−StateOutputs INPUTS OE T/R OPERATING MODE Non−Inverting L L B Data to A Bus L H A Data to B Bus H X Z Figure 2. Logic Diagram H = High Voltage Level L = Low Voltage Level Z = High Impedance State X = High or Low Voltage Level and Transitions are Acceptable For ICC reasons, Do Not Float Inputs http://onsemi.com 2 B6 9 11 TRUTH TABLE B5 8 12 A7 B4 7 13 A6 B3 6 14 PIN NAMES B2 5 9 Figure 1. Pinout (Top View) B1 4 11 20 B0 B7 MC74LCX245 MAXIMUM RATINGS Symbol Parameter VCC DC Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Condition Unit −0.5 to +7.0 V −0.5 ≤ VI ≤ +7.0 V −0.5 ≤ VO ≤ +7.0 Output in 3−State V −0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State (Note 1) V IIK DC Input Diode Current −50 VI< GND mA IOK DC Output Diode Current −50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C MSL Moisture Sensitivity Level 1 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Operating Data Retention Only Min Typ Max Unit 2.0 1.5 2.5, 3.3 2.5, 3.3 5.5 5.5 V 0 5.5 V 0 0 VCC 5.5 V VCC Supply Voltage VI Input Voltage VO Output Voltage IOH HIGH Level Output Current VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V − 24 − 12 −8 mA IOL LOW Level Output Current VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V + 24 + 12 +8 mA TA Operating Free−Air Temperature −55 +125 °C Dt/DV Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V (HIGH or LOW State) (3−State) http://onsemi.com 3 MC74LCX245 DC ELECTRICAL CHARACTERISTICS TA = −55°C to +125°C Symbol VIH VIL VOH VOL Characteristic HIGH Level Input Voltage (Note 2) LOW Level Input Voltage (Note 2) HIGH Level Output Voltage LOW Level Output Voltage Condition Min 2.3 V ≤ VCC ≤ 2.7 V 1.7 2.7 V ≤ VCC ≤ 3.6 V 2.0 Max V 2.3 V ≤ VCC ≤ 2.7 V 0.7 2.7 V ≤ VCC ≤ 3.6 V 0.8 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA VCC − 0.2 VCC = 2.3 V; IOH = −8 mA 1.8 VCC = 2.7 V; IOH = −12 mA 2.2 VCC = 3.0 V; IOH = −18 mA 2.4 VCC = 3.0 V; IOH = −24 mA 2.2 Unit V V 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA 0.2 VCC = 2.3 V; IOL= 8 mA 0.6 VCC = 2.7 V; IOL= 12 mA 0.4 VCC = 3.0 V; IOL = 16 mA 0.4 VCC = 3.0 V; IOL = 24 mA 0.55 VCC = 3.6 V, VIN = VIH or VIL, VOUT = 0 to 5.5 V ±5 mA VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 mA V IOZ 3−State Output Current IOFF Power Off Leakage Current IIN Input Leakage Current VCC = 3.6 V, VIN = 5.5 V or GND ±5 mA ICC Quiescent Supply Current VCC = 3.6 V, VIN = 5.5 V or GND 10 mA DICC Increase in ICC per Input 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V 500 mA 2. These values of VI are used to test DC electrical characteristics only. AC CHARACTERISTICS tR = tF = 2.5 ns; RL = 500 W Limits TA = −55°C to +125°C Symbol Parameter VCC = 3.3 V ± 0.3V VCC = 2.7 V VCC = 2.5 V ± 0.2V VCC = 5.0 V CL = 50 pF CL = 50 pF CL = 30 pF CL = 50 pF Waveform Min Max Min Max Min Max Min Max Unit tPLH tPHL Propagation Delay Input to Output 1 1.5 1.5 7.0 7.0 1.5 1.5 8.0 8.0 1.5 1.5 8.4 8.4 1.5 1.5 5.0 5.0 ns tPZH tPZL Output Enable Time to High and Low Level 2 1.5 1.5 8.5 8.5 1.5 1.5 9.5 9.5 1.5 1.5 10.5 10.5 1.5 1.5 7.0 7.0 ns tPHZ tPLZ Output Disable Time From High and Low Level 2 1.5 1.5 7.5 7.5 1.5 1.5 8.5 8.5 1.5 1.5 9.0 9.0 1.5 1.5 6.0 6.0 ns tOSHL tOSLH Output−to−Output Skew (Note 3) 1.0 1.0 ns 1.0 1.0 1.0 1.0 1.0 1.0 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. http://onsemi.com 4 MC74LCX245 DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Condition Min Typ Max Unit VOLP Dynamic LOW Peak Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V 0.8 0.6 V V VOLV Dynamic LOW Valley Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V −0.8 −0.6 V V 4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF CI/O Input/Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF VCC OE, T/R Vmi VCC An, Bn Vmi Vmi tPLH Bn, An tPZH 0V tPHL Vmo Vmi An, Bn Vmo VOH Vmo tPHZ tPZL VOL WAVEFORM 1 − PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns VOH VHZ tPLZ Vmo An, Bn 0V VLZ VOL WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Figure 3. AC Waveforms VCC Symbol 3.3 V + 0.3 V 2.7 V 2.5 V + 0.2 V 5.0 V Vmi 1.5 V 1.5 V VCC/2 VCC/2 Vmo 1.5 V 1.5 V VCC/2 VCC/2 VHZ VOL + 0.3 V VOL + 0.3 V VOL + 0.15 V VOL + 0.15 V VLZ VOH − 0.3 V VOH − 0.3 V VOH − 0.15 V VOH − 0.15 V http://onsemi.com 5 MC74LCX245 VCC PULSE GENERATOR DUT RT CL TEST RL SWITCH tPLH, tPHL Open tPZL, tPLZ 6 V at VCC = 3.3 0.3 V 6 V at VCC = 2.5 0.2 V Open Collector/Drain tPLH and tPHL 6V tPZH, tPHZ CL = CL = RL = RT = 6V OPEN GND R1 GND 50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance) 30 pF at VCC = 2.5 0.2 V or equivalent (includes jig and probe capacitance) R1 = 500 W or equivalent ZOUT of pulse generator (typically 50 W) Figure 4. Test Circuit ORDERING INFORMATION Package Shipping† MC74LCX245DWR2G SOIC−20 (Pb−Free) 1000 Tape & Reel MC74LCX245DWG SOIC−20 (Pb−Free) 38 Units / Rail MC74LCX245DTG TSSOP−20 (Pb−Free) 75 Units / Rail MC74LCX245DTR2G TSSOP−20 (Pb−Free) 2500 Tape & Reel NLV74LCX245DTR2G* TSSOP−20 (Pb−Free) 2500 Tape & Reel MC74LCX245MNTWG QFN20 (Pb−Free) 3000 Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 6 MC74LCX245 PACKAGE DIMENSIONS SOIC−20 DW SUFFIX CASE 751D−05 ISSUE G A 20 11 X 45 _ E h 1 10 20X B B 0.25 M T A S B S A L H M 10X 0.25 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. q B M D 18X e A1 SEATING PLANE C T http://onsemi.com 7 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ MC74LCX245 PACKAGE DIMENSIONS TSSOP−20 CASE 948E−02 ISSUE C 20X 0.15 (0.006) T U 2X L K REF 0.10 (0.004) S L/2 20 M T U S V K K1 ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ S J J1 11 B −U− PIN 1 IDENT SECTION N−N 0.25 (0.010) N 1 10 M 0.15 (0.006) T U S A −V− N F DETAIL E C G D H DETAIL E 0.100 (0.004) −T− SEATING NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 6.40 6.60 0.252 0.260 B 4.30 4.50 0.169 0.177 C --1.20 --0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC −W− H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0_ 8_ 0_ 8_ PLANE SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 16X 0.36 16X 1.26 DIMENSIONS: MILLIMETERS http://onsemi.com 8 MC74LCX245 PACKAGE DIMENSIONS QFN20, 2.5x4.5 MM CASE 485AA ISSUE B D PIN ONE REFERENCE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. B ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ DIM A A1 A3 b D D2 E E2 e K L E 2X 0.15 C 2X 0.15 C TOP VIEW MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.50 BSC 0.85 1.15 4.50 BSC 2.85 3.15 0.50 BSC 0.20 --0.35 0.45 0.10 C A 20X 0.08 C (A3) A1 SIDE VIEW C SEATING PLANE D2 11 20X L e 9 12 e E2 20X b 0.10 C A B 0.05 C NOTE 3 19 2 1 20 20X K BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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