Ordering number : EN7600A Bi-CMOS IC LV5105FN For cell phone system Power supply Overview The LV5105FN is a power supply for a cell phone system that integrates four series regulators, LED driver (with 5V output) on a single chip. Functions • REG×4 (CMOS output) • DET circuit (one for REG1, one for VBAT (with reset output) • Thermal shutdown circuit (150°C) • Three-color LED driver (charge pump 5V output incorporated) • FRONT LED driver • Mic bias output Features • Low power consumption • Built-in charge pump circuit • Built-in 3-color LED drive circuit 4μA when REG4 and VBATDET operate 30μA when REG1, REG2, REG3, and REG4 + DET1 and VBATDET operate VBAT : 3.2V to 4.5V, 5V constant output with a load of 80mA Three independent colors, 128-step PWM intensity control Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Symbol Conditions VCC max Pd max Ratings Unit 7 Ta ≤ 75°C *Mounted on a board. 440 V mW Operating temperature Topr -30 to +75 °C Storage temperature Tstg -40 to +125 °C ∗ Mounted on a 50.0mm×50.0mm×0.8mm, glass epoxy board. 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To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 61307 TI PC B8-6484, 6703 No.7600-1/9 LV5105FN Operating Conditions at Ta = 25°C Parameter Symbol Supply voltage 1 VBAT Supply voltage 2 VBATCP Conditions Ratings Unit 29, 33pin 3.2 to 4.5 V 3pin 3.2 to 5.9 V Electrical Characteristics : Analog at Ta = 25°C, VBAT = 3.6V, VCHARGE = 0V, Unless otherwise specified. [Current dissipation] Parameter Current dissipation 1 Symbol ICC1 Conditions Ratings min typ REG4, VBATDET : ON Unit max 4 10 μA 25 35 μA 20 28 μA 30 42 μA 15 21 μA 5 8 mA REG1, 2, 3, charge punp, DET1 : OFF no-load VBAT = 3.2V to 4.2V Current dissipation 2 ICC2 REG1, 2, 4, DET1, VBATDET : ON REG3, charge pump : OFF no load Current dissipation 3 ICC3 REG3, 4, VBATDET : ON REG1, 2, DET1, charge pump : OFF no load Current dissipation 4 ICC4 REG1, 2, 3, 4, DET1, VBATDET : ON charge pump : OFF no load Current dissipation 5 ICC5 REG1, 2, 3, 4, DET1, VBATDET : ON charge pump : OFF no load ECO : L Current dissipation 6 ICC6 REG1, 2, 3, 4, charge pump, DET1, VBATDET : ON no load [REG1] Parameter Symbol Conditions Ratings min typ max Unit Output voltage 1 VO1 IO = 30mA, ECO = H 2.74 2.8 2.86 V Output voltage 2 VO1E IO = 30mA, ECO = L 2.71 2.8 2.89 V Output voltage 3 ΔVO1 (IO = 30mA, REG1 output voltage at ECO = H) (IO = 10mA, REG1 output voltage at IO = 10 mA 0 15 35 Drop out voltage VDR1 0.04 0.06 Load regulation ΔVOLO1 10 50 10 60 mV and ECO = L) VBAT = 2.7V, IO = 30mA IO = 1 to 150mA Line regulation ΔVOLN1 VBAT = 3.3 to 4.5V, IO = 1mA Output voltage temperature ΔVO1/ΔTj Ta = -25 to 75°C, IO = 30mA ±100 V mV mV ppm/°C coefficient Ripple rejection VR1 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, 65 dB 75 μVrms fRR = 1kHz Output noise voltage VON1 IO = 30mA, 20Hz < f < 20kHz Output voltage 4 ΔVO2 IO = 30mA, (Output voltage with charge pump -35 35 mV ON - Output voltage with charge pump OFF) [REG2] Parameter Symbol Conditions Ratings min typ max Unit Output voltage 1 VO2 IO = 30mA, ECO = H 2.55 2.6 2.65 Output voltage 2 VO2E IO = 30mA, ECO = L 2.53 2.6 2.67 V Drop out voltage VDR1 VBAT = 2.5V, IO = 30mA 0.06 0.12 V Load regulation ΔVOLO2 IO = 1 to 100mA 10 100 mV Line regulation ΔVOLN2 VBAT = 3.3 to 4.5V, IO = 1mA 10 60 mV Output voltage temperature ΔVO2/ΔTj Ta = -25 to 75°C, IO = 30mA ±100 V ppm/°C coefficient Ripple rejection VR2 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, 65 dB fRR = 1kHz Output noise voltage VON2 IO = 30mA, 20Hz < f < 20kHz 75 μVrms Continued on next page. No.7600-2/9 LV5105FN Continued from preceding page. [REG3] Parameter Symbol Conditions Ratings min typ max Unit Output voltage 1 VO3 IO = 30mA, ECO = H 2.79 2.85 2.91 Output voltage 2 VO3E IO = 30mA, ECO = L 2.76 2.85 2.94 V Drop out voltage VDR3 VBAT = 2.7V, IO = 30mA 0.06 0.12 V Load regulation ΔVOLO3 IO = 1 to 50mA 10 50 mV Line regulation ΔVOLN3 VBAT = 3.3 to 4.5V, IO = 1mA 10 60 mV Output voltage temperature ΔVO3/ΔTj Ta = -25 to 75°C, IO = 30mA ±100 V ppm/°C coefficient Ripple rejection VR3 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, 65 dB 75 μVrms fRR = 1kHz Output noise voltage VON3 IO = 30mA, 20Hz < f < 20kHz [REG4] Parameter Output voltage Symbol VO4 Drop out voltage VDR3 Load regulation ΔVOLO4 Conditions IO = 30mA Ratings min typ 2.91 VBAT = 2.9V, IO = 30mA 3 3.09 0.06 0.12 10 50 10 60 IO = 1 to 50mA Line regulation ΔVOLN4 VBAT = 3.3 to 4.5V, IO = 1mA Output voltage temperature ΔVO4/ΔTj Ta = -25 to 75°C, IO = 30mA max ±100 Unit V V mV mV ppm/°C coefficient Ripple rejection VR4 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, 55 dB 75 μVrms fRR = 1kHz Output noise voltage VON4 IO = 30mA, 20Hz < f < 20kHz [DET1] Parameter Symbol Detection voltage VD1 Hysteresis width ΔVH1 Detection voltage temperature ΔVD1/ΔTj Conditions H→L Ratings min typ max Unit 2.45 2.5 2.55 V 75 125 175 mV ±100 Ta = -25 to 75°C ppm/°C coefficient [VBATDET] Parameter Symbol Conditions H→L Ratings min typ max Unit Detection voltage VDB 3.04 3.1 3.16 V Hysteresis width ΔVHB 93 155 217 mV Output pull-up resistance RPDETB 1.4 1.8 2.2 MΩ Detection voltage temperature ΔVDB/ΔTj ±100 Ta = -25 to 75°C ppm/°C coefficient [Charge pump] Parameter Symbol Output voltage 1 VCPO1 Oscillation frequency CPOSC Output ripple Efficiency Conditions VBAT = 3.2 to 5.9V, Load current 80mA Ratings min typ max Unit 4.8 5 5.2 V 0.7 1 1.3 MHz VRCP VBAT = 3.6, Load current 80mA ±200 η VBAT = 3.2, Load current 80mA 72 mVp-p % Continued on next page. No.7600-3/9 LV5105FN Continued from preceding page. [LED driver] Parameter Symbol Conditions Ratings min typ Unit max LEDR output voltage VLR IO = 40mA 0 0.1 0.2 V LEDG output voltage VLG IO = 40mA 0 0.1 0.2 V LEDB output voltage VLB IO = 40mA 0 0.1 0.2 V LEDF output voltage VLF IO = 40mA 0 0.15 0.3 V LEDR OFF leak ILR 0 1 μA LEDG OFF leak ILG 0 1 μA LEDB OFF leak ILB 0 1 μA LEDF OFF leak ILF 0 1 μA [Mic bias] Parameter Symbol Output ON resistance RMO OFF leakage current ILM Conditions Ratings min typ IO = 10mA Unit max Ω 10 0 1 μA [Output voltage (GP_0, 1)] Parameter Output H level Symbol VOH Conditions IO = 1mA Ratings min typ REG10 Unit max REG10 V 0.3 V -0.3 Output L level VOL IO = 1mA 0 [Input voltage 1 (SDATA, SEN, SCLK)] Parameter H level Symbol VINH1 Conditions Input H level Ratings min typ REG10 Unit max REG10 V REG10 V ×0.8 L level VINL1 Input L level 0 ×0.2 [Input voltage 2 (T_CNT, TCXOCNT, ECO, REG3CTL, REG12CTL, PWRON, RTCINT, MSSELO, MSSELOC, KEYSENSE4, HWRESET)] Parameter H level Symbol VINH2 Conditions Input H level Ratings min typ REG40 Unit max REG40 V REG40 V ×0.8 L level VINL2 Input L level 0 ×0.2 [Input voltage 3 (RESOUT_N)] Parameter H level Symbol VINH3 Conditions Input H level Ratings min typ REG20 Unit max REG20 V REG20 V ×0.8 L level VINL3 Input L level 0 ×0.2 [Input voltage 4 (CHG_G)] Parameter H level Symbol VINH4 Conditions Input H level Ratings min typ REG40 Unit max 6 V REG40 V ×0.8 L level VINL4 Input L level 0 ×0.2 Continued on next page. No.7600-4/9 LV5105FN Continued from preceding page. [Input voltage 5 (Vcharge)] Parameter Symbol Ratings Conditions min typ Unit max H level VINH5 Input H level 4.4 6 V L level VINL5 Input L level 0 3.6 V [Input voltage 6 (VBATBK)] Parameter Symbol H level Ratings Conditions VINH6 min Input H level typ Unit max REG40 VBAT V REG40 V ×0.8 L level VINL6 Input L level 0 ×0.2 Electrical Characteristics : Serial bus [Serial transfer timing] Parameter Symbol Ratings Conditions min typ Unit max Cycle time tcy1 SCLK clock cycle 300 Data setup time 1 ts0 SDEN setup time for rise of SCLK 150 - - ns ns Data setup time 2 ts1 SDATA setup time for rise of SCLK 150 - - ns Data hold time 1 th0 SDEN hold time for fall of SCLK 150 - - ns Data hold time 2 th1 SDATA hold time for rise of SCLK 150 - - ns Pulse width 1 tw1L SCLK L-period pulse width 150 - - ns Pulse width 2 tw1H SCLK H-period pulse width 150 - - ns Pulse width 3 tw2L SDEN L-period pulse width 1 - - μs Serial transfer timing conditions SDEN 50% th0 ts0 tw2L SCLK 50% tw1L tw1H th1 ts1 tcy1 SDATA A7 A6 A5 A4 A3 Address A2 A1 A0 D15 D14 D13 D3 D2 D1 D0 A7 Data Data length : 24bit Clock frequency : 3MHz or les "SDATA" is taken in at fall of "SDEN" when "SCLK" of 24 clock is entered during H period of "SDEN." (Note) "SDATA" is not taken in when "SCLK" is 23 clock or less during H period of "SDEN." When "SCLOCK" exceeds 25 clock, "SDATA" is taken in at the 24th clock, and subsequent "SDATA" is ignored. No.7600-5/9 LV5105FN Package Dimensions unit : mm (typ) 3272 Top View Bottom View 0.2 7.2 7.0 36 0.4 0.3 25 0.3 5.0 13 1 12 0.5 4 - Do Not Connect 0.2 (0.8) 0.85MAX (0.75) 5.0 7.0 7.2 48 0.4 24 37 Side View SANYO : VQFN48(7X7) 36 2.8V 150mA ECO DET1 REG1O REG1OS 4.7μF VBAT14 4.7μF 3.0V 50mA REG4O REG3CTL REG3O VBAT23 40 23 22 DET1 REG12CTL 41 VBAT VBATDET BGR 21 20 1.8MΩ VBAT 42 24 19 43 18 44 17 OSC Counter 46 CHARGE PUMP 47 16 15 Serial CTL 48 1 2 3 4 5 6 7 8 9 10 11 14 13 RESETL CD 0.1μF TCXOCNT P_CNT T_CNT TT XXμF VBATBK CHG_G XXμF GP_1 GP_0 SCLK SEN 12 SDATE 45 TEST VCHARGE 25 REG12CTL REG12CTL REG3CTL FLED HWRESET 26 REG 1 BLED RESOUT_N 27 PWM_B KEYSENSE4 28 REG 4 PWM_G XXμF 38 39 REG 3 REG 2 GNDLED MSSELO MSSELOC 29 GLED TEST2 30 PWM_R GNDR 31 RLED BG 32 CPOUT 0.1μF 33 C+ 0.1μF Seril VBATCP RREF 37 C- RTCINT 34 1MΩ GNDCP PWRON 35 REG2O MICBIAS REG12CTL 4.7μF 4.7μF 2.6V 100mA 2.85V 50mA Block Diagram 0.22μF 1μF 4.7μF Top view No.7600-6/9 LV5105FN Pin Table No. Pin symbol Pin description 1 GNDCP Charge pump circuit ground pin 2 C- 3 VBATCP 4 C+ 5 CPOUT Input form ESD element VBAT GND - - - Flying capacitor connection pin A - Charge pum circuit power pin - - Flying capacitor connection pin B - Charge pump output pin C - 6 RLED RLED drive pin D 7 GLED GLED drive pin D - ○ ○ ○ ○ ○ ○ 8 GNDLED LED drive circuit ground pin - - - 9 BLED RLED drive pin D - 10 FLED FLED drive pin D - 11 TEST Test input pin (Be sure to connect it to GND during normal use) - 12 SDATA Serial data signal input pin E 13 SEN Serial enable signal input pin E 14 SCLK Serial clock signal input pin E 15 GP_0 Serially controllable output pin F 16 GP_1 Serially controllable output pin F ○ ○ ○ ○ ○ ○ 17 CHG_G Power control logic circuit input pin G - 18 VBATBK Power control logic circuit input pin H 19 TT Power control logic circuit output pin I ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ - Regulator reference pin T BGR output pin U ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 20 T_CNT Power control logic circuit output pin J 21 P_CNT Power control logic circuit output pin I 22 TCXOCNT Power control logic circuit input pin H 23 CD 24 RESET VBATDET delay capacitor connection pin L Reset output pin M G 25 ECO ECO mode control pin L : ECO mode, H : Normal mode 26 DET1 DET1 delay capacitor connection pin N 27 REG1OS REG1 sense pin O 28 REG1O REG1 output pin P 29 VBAT14 REG1, 4 circuit power pin - 30 REG4O REG4 output pin Q 31 REG3CTL REG3 control pin L : OFF, H : ON G Q 32 REG3O REG3 output pin 33 VBAT23 REG2, 3 circuit power pin - 34 REG2O REG2 output pin Q 35 MICBIAS 36 REG12CTL 37 PWRON 38 RTCINT 39 RREF 40 BG Mic bias output pin (serial control) R REG1, 2 control pin L : OFF, H : ON G Power control logic circuit input pin H Power control logic circuit input pin S 41 GNDR Regulator circuit ground pin - - 42 TEST2 Test input pin (Be sure to connect it to GND during normal use) - - - 43 MSSELO Power control logic circuit input pin V 44 MSSELOC Power control logic circuit input pin W 45 KEYSENCE4 Power control logic circuit input pin S 46 RESOUT_N Power control logic circuit input pin X 47 HWRESET Power control logic circuit input pin K ○ ○ ○ ○ ○ 48 VCHARG VCHARGE voltage input pin Y - ○ ○ ○ ○ ○ ○ No.7600-7/9 LV5105FN Pin Table A B C D E REG1O 2kΩ Schmidt INV input F G REG1O H REG4O I J REG4O REG4O REG4O Schmidt INV input 2kΩ 2kΩ Schmidt INV input 2MΩ 1MΩ Schmidt INV input K L VBAT REG4O Schmidt INV input M N O REG1O REG2O 1MΩ 1.5MΩ 2kΩ Schmidt INV input Schmidt INV input 100kΩ P Q R S VBAT T VBAT REG4O 10kΩ VBAT REG2O 2kΩ Schmidt INV input U V W X Y REG4O REG4O REG2O REG4O 500kΩ 10kΩ 2kΩ 120kΩ 2kΩ 1MΩ 2kΩ Schmidt INV input Schmidt INV input 1MΩ 2kΩ Schmidt INV input 44PIN 10kΩ 100kΩ 500kΩ 43PIN No.7600-8/9 LV5105FN Power Control Block Diagram REG4O PWRON P_CNT 1000kΩ REG4O MSSELO 1000kΩ REG4O 10kΩ RTCINT REG4O REG4O MSSELOC REG4O REG4O REG4O REG4O 10kΩ T_CNT KEYSENSE4 2000kΩ REG2O 10kΩ REG2O RESOUT_N REG4O HWRESET REG4O 100kΩ 2kΩ 120kΩ REG4O REG4O VCHARGE 10kΩ 100kΩ CHG(G) REG4O REG4O VBATBK VBAT REG4O 1000kΩ REG4O TCXOCNT TT 1000kΩ SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of June, 2007. Specifications and information herein are subject to change without notice. PS No.7600-9/9