TI CY74FCT157CTSOC

CY54FCT157T, CY74FCT157T
QUAD 2-INPUT MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCCS014B – MAY 1994 – REVISED NOVEMBER 2001
D
D
D
D
D
D
D
D
description
CY74FCT157T . . . Q OR SO PACKAGE
(TOP VIEW)
S
1
16
I0a
I1a
Ya
I0b
I1b
Yb
GND
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
E
I0d
I1d
Yd
I0c
I1c
Yc
CY54FCT157T . . . L PACKAGE
(TOP VIEW)
I 0a
S
NC
VCC
E
D
Function, Pinout, and Drive Compatible
With FCT and F Logic
Reduced VOH (Typically = 3.3 V) Versions
of Equivalent FCT Functions
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
Matched Rise and Fall Times
Fully Compatible With TTL Input and
Output Logic Levels
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
CY54FCT157T
– 32-mA Output Sink Current
– 12-mA Output Source Current
CY74FCT157T
– 64-mA Output Sink Current
– 32-mA Output Source Current
3-State Outputs
I1a
Ya
NC
I0b
I1b
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
I0d
I1d
NC
Yd
I0c
Yb
GND
NC
Yc
I1c
D
NC – No internal connection
The ’FCT157T devices are quad two-input multiplexers that select four bits of data from two sources under the
control of a common data-select (S) input. The output-enable (E) input is active low. When E is high, all of the
outputs (Y) are forced low, regardless of all other input conditions.
Moving data from two groups of registers to four common output buses is a common use of the ’FCT157T
devices. The state of S determines the particular register from which the data comes. It also can be used as
a function generator. These devices are useful for implementing highly irregular logic by generating any 4 of
the 16 different functions of 2 variables, with 1 variable common.
The ’FCT157T devices are logic implementations of a four-pole, two-position switch, where the position of the
switch is determined by the logic levels at S.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
CY54FCT157T, CY74FCT157T
QUAD 2-INPUT MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCCS014B – MAY 1994 – REVISED NOVEMBER 2001
PIN DESCRIPTION
NAME
DESCRIPTION
S
Common select input
E
Enable inputs (active low)
I0
I1
Data inputs from source 0
Y
Noninverted outputs
Data inputs from source 1
ORDERING INFORMATION
TA
QSOP – Q
SOIC – SO
–40°C
40°C to 85°C
SPEED
(ns)
PACKAGE†
QSOP – Q
SOIC – SO
ORDERABLE
PART NUMBER
Tape and reel
4.3
CY74FCT157CTQCT
Tube
4.3
CY74FCT157CTSOC
Tape and reel
4.3
CY74FCT157CTSOCT
Tape and reel
5
CY74FCT157ATQCT
Tube
5
CY74FCT157ATSOC
Tape and reel
5
CY74FCT157ATSOCT
TOP-SIDE
MARKING
FT157-3
FCT157C
FT157-1
FCT157A
–55°C to 125°C
LCC – L
Tube
5.8
CY54FCT157ATLMB
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
E
S
I1
X
OUTPUT
Y
H
X
I0
X
L
H
X
L
L
L
H
X
H
H
L
L
L
X
L
L
L
H
X
H
L
H = High logic level, L = Low logic level,
X = Don’t care
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CY54FCT157T, CY74FCT157T
QUAD 2-INPUT MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCCS014B – MAY 1994 – REVISED NOVEMBER 2001
logic diagram (positive logic)
I0a
2
4
I1a
I0b
3
5
7
I1b
I0c
6
I0d
10
E
S
Yc
14
12
I1d
Yb
11
9
I1c
Ya
13
Yd
15
1
Pin numbers shown are for the Q and SO packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θJA (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
CY54FCT157T, CY74FCT157T
QUAD 2-INPUT MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCCS014B – MAY 1994 – REVISED NOVEMBER 2001
recommended operating conditions (see Note 2)
CY54FCT157T
CY74FCT157T
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.75
5
5.25
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
–12
–32
mA
IOL
TA
Low-level output current
32
64
mA
85
°C
High-level input voltage
2
Operating free-air temperature
2
–55
125
V
V
–40
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
CY54FCT157T
TYP† MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.75 V,
IIN = –18 mA
IIN = –18 mA
VCC = 4.5 V,
IOH = –12 mA
IOH = –32 mA
VCC = 4
4.75
75 V
MIN
–0.7
–1.2
–0.7
2.4
2.4
Vhys
All inputs
II
VCC = 5.5 V,
VCC = 5.25 V,
VIN = VCC
VIN = VCC
5
IIH
VCC = 5.5 V,
VCC = 5.25 V,
VIN = 2.7 V
VIN = 2.7 V
±1
IIL
VCC = 5.5 V,
VCC = 5.25 V,
VIN = 0.5 V
VIN = 0.5 V
±1
IOZH
VCC = 5.5 V,
VCC = 5.25 V,
VOUT = 2.7 V
VOUT = 2.7 V
10
IOZL
VCC = 5.5 V,
VCC = 5.25 V,
VOUT = 0.5 V
VOUT = 0.5 V
–10
IOS‡
VCC = 5.5 V,
VCC = 5.25 V,
VOUT = 0 V
VOUT = 0 V
VCC = 0 V,
VCC = 5.5 V,
VOUT = 4.5 V
VIN ≤ 0.2 V,
∆ICC
0.3
3.3
0.55
IOL = 64 mA
0.3
0.2
0.55
0.2
±1
±1
10
–10
–120
–225
–60
–120
±1
VIN ≥ VCC – 0.2 V
VIN ≤ 0.2 V,
VIN ≥ VCC – 0.2 V
§
VCC = 5.5 V, VIN = 3.4 V , f1 = 0, Outputs open
0.1
VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open
0.5
–225
±1
0.2
VCC = 5.25 V,
V
V
5
–60
V
V
2
IOH = –15 mA
IOL = 32 mA
VCC = 4.5 V,
VCC = 4.75 V,
ICC
–1.2
UNIT
3.3
VOL
Ioff
CY74FCT157T
TYP† MAX
MIN
0.1
0.2
0.5
2
µA
µA
µA
µA
µA
mA
µA
mA
2
mA
† Typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or
sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged
shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence
of parameter tests, IOS tests should be performed last.
§ Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CY54FCT157T, CY74FCT157T
QUAD 2-INPUT MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCCS014B – MAY 1994 – REVISED NOVEMBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
ICCD¶
CY54FCT157T
TYP† MAX
TEST CONDITIONS
MIN
VCC = 5.5 V, One input switching at 50% duty cycle,
Outputs open, E = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
0.06
CY74FCT157T
TYP† MAX
MIN
0.12
VCC = 5.25 V, One input switching at 50% duty cycle,
Outputs open, E = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
One input
switching
at f1 = 10 MHz
at 50% duty cycle
VCC = 5.5 V,
Out
uts o
en,
Outputs
open,
E = GND
Four bits switching
at f1 = 2.5 MHz
at 50% duty cycle
IC#
One input
switching
at f1 = 10 MHz
at 50% duty cycle
VCC = 5.25 V,
Out
uts o
en,
Outputs
open,
E = GND
Four bits switching
at f1 = 2.5 MHz
at 50% duty cycle
0.06
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4
1
2.4
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4||
VIN = 3.4 V or GND
1.7
5.4||
VIN = 3.4 V or GND
0.12
UNIT
mA/
MHz
mA
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4
VIN = 3.4 V or GND
1
2.4
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4||
VIN = 3.4 V or GND
1.7
5.4||
Ci
5
10
5
10
pF
Co
9
12
9
12
pF
† Typical values are at VCC = 5 V, TA = 25°C.
¶ This parameter is derived for use in total power-supply calculations.
# IC
= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)
Where:
IC
= Total supply current
ICC = Power-supply current with CMOS input levels
∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH
= Duty cycle for TTL inputs high
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
I
Y
tPLH
tPHL
E
Y
tPLH
tPHL
S
Y
POST OFFICE BOX 655303
CY54FCT157AT
CY74FCT157AT
CY74FCT157CT
MIN
MAX
MIN
MAX
MIN
MAX
1.5
5.8
1.5
5
1.5
4.3
1.5
5.8
1.5
5
1.5
4.3
1.5
7.4
1.5
6
1.5
4.8
1.5
7.4
1.5
6
1.5
4.8
1.5
8.1
1.5
7
1.5
5.2
1.5
8.1
1.5
7
1.5
5.2
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
5
CY54FCT157T, CY74FCT157T
QUAD 2-INPUT MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCCS014B – MAY 1994 – REVISED NOVEMBER 2001
PARAMETER MEASUREMENT INFORMATION
7V
From Output
Under Test
From Output
Under Test
Test
Point
CL = 50 pF
(see Note A)
Open
TEST
GND
CL = 50 pF
(see Note A)
500 Ω
S1
500 Ω
S1
Open
7V
Open
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
500 Ω
LOAD CIRCUIT FOR
3-STATE OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
tsu
3V
1.5 V
Input
1.5 V
th
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
1.5 V
1.5 V
VOL
tPHL
Out-of-Phase
Output
tPLZ
≈3.5 V
1.5 V
tPZH
VOH
1.5 V
VOL
1.5 V
0V
Output
Waveform 1
(see Note B)
tPLH
1.5 V
1.5 V
tPZL
VOH
In-Phase
Output
3V
Output
Control
Output
Waveform 2
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
21-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9220803M2A
ACTIVE
LCCC
FK
20
1
TBD
CY74FCT157ATD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATDE4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATDG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATDR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATDRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATDRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATQCT
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT157ATQCTE4
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT157ATQCTG4
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT157ATSOC
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATSOCE4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATSOCG4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATSOCT
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATSOCTE4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157ATSOCTG4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTDE4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTDG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTDR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTDRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTDRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTQCT
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT157CTQCTE4
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT157CTQCTG4
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Addendum-Page 1
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com
21-May-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
CY74FCT157CTSOC
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTSOCE4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTSOCG4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTSOCT
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTSOCTE4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT157CTSOCTG4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
CY74FCT157ATDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
CY74FCT157ATSOCT
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
CY74FCT157CTDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
CY74FCT157CTSOCT
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CY74FCT157ATDR
SOIC
D
16
2500
333.2
345.9
28.6
CY74FCT157ATSOCT
SOIC
DW
16
2000
346.0
346.0
33.0
CY74FCT157CTDR
SOIC
D
16
2500
333.2
345.9
28.6
CY74FCT157CTSOCT
SOIC
DW
16
2000
346.0
346.0
33.0
Pack Materials-Page 2
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