TI PTV12020WAH

PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
16-A, 12-V INPUT NONISOLATED WIDE-OUTPUT ADJUST SIP MODULE
FEATURES
APPLICATIONS
•
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•
•
•
•
•
•
•
•
•
•
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Up to 16-A Output Current
12-V Input Voltage
Wide-Output Voltage Adjust
(1.2 V to 5.5 V)/(0.8 V to 1.8 V)
Efficiencies up to 93%
On/Off Inhibit
Output Voltage Sense
Prebias Start Up
Undervoltage Lockout
Auto-Track™ Sequencing
Output Overcurrent Protection (Nonlatching,
Auto-Reset)
Overtemperature Protection
Operating Temperature: –40°C to 85°C
Safety Agency Approvals: UL/cUL 60950,
EN60950 VDE (Pending)
POLA™ Alliance Compatible
Multivoltage Digital Systems
High-End Computing
Networking
12-V Intermediate Bus Architectures
DESCRIPTION
The PTV12020 series of nonisolated power modules are part of a new class of complete dc/dc switching
regulator modules from Texas Instruments. These regulators combine high performance with double-sided,
surface mount construction to give designers the flexibility to power the most complex multiprocessor digital
systems using off-the-shelf catalog parts.
The PTV12020 series is produced in a 12-pin, single in-line pin (SIP) package. The SIP footprint minimizes board
space, and offers an alternate package option for space conscious applications. Operating from a 12-V input bus,
the series provides step-down conversion to a wide range of output voltages, at up to 16 A of output current. The
output voltage of the W-suffix parts can be set to any value over the range of 1.2 V to 5.5 V. The L-suffix parts
have an adjustment range of 0.8 V to 1.8 V. The output voltage is set using a single external resistor.
This series includes Auto-Track™. Auto-Track™ simplifies the task of supply-voltage sequencing in a power
system by enabling the output voltage of multiple modules to accurately track each other, or any external voltage,
during power up and power down.
Other operating features include an on/off inhibit, and the ability to start up into an existing output voltage or
prebias. For improved load regulation, an output voltage sense is provided. A nonlatching overcurrent trip and
overtemperature shutdown protects against load faults.
Target applications include complex multivoltage, multiprocessor systems that incorporate the industry's
high-speed DSPs, microprocessors, and bus drivers.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
POLA, Auto-Track are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2005, Texas Instruments Incorporated
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
STANDARD APPLICATION
VOSense
Track
9
Track
VI
5, 6
VI
7
Sense
PTV12020x
VO
VO
3, 4
Inhibit GND GND
VOAdj
12
10, 11
1, 2
8
C1*
560 F
(Required)
Inhibit
C2*
22 F
Ceramic
(Required)
RSET#
1%
0.05 W
(Required)
GND
C3*
330 F
(Optional)
L
O
A
D
GND
* See the
#R
SET is
Application Information section for capacitor recommendations.
required to adjust the output voltage higher than its lowest value. See the Application Information section for values.
ORDERING INFORMATION
PTV12020 (Basic Model)
(1)
Output Voltage
Part Number
DESCRIPTION
Package (1)
1.2 V – 5.5 V (Adjustable)
PTV12020WAH
Vertical T/H
EVC
0.8 V – 1.8 V (Adjustable)
PTV12020LAH
Vertical T/H
EVC
See the applicable package drawing for dimensions and PC board layout.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted (1)
UNIT
V(Track)
Track input
TA
Operating temperature range
Over VI range
Lead temperature
5 seconds
Tstg
Storage temperature
V(Inhibit)
Inhibit (pin 12) input voltage
(1)
(2)
–0.3 V to VI +0.3 V
–40°C to 85°C
260°C
(2)
–40°C to 125°C
–0.3 V to 7 V
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
This product is not compatible with surface-mount reflow solder processes.
PACKAGE SPECIFICATIONS
PTV12020x (Suffix AH)
Weight
5.5 grams
Flammability
Meets UL 94 V-O
Mechanical shock
Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine, mounted
Mechanical vibration
(1)
2
Qualification limit.
Mil-STD-883D, Method 2007.2, 20 Hz - 2000 Hz
500 Gs
10 Gs
(1)
(1)
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI = 12 V, VO = 3.3 V, C1 = 560 µF, C2 = 22 µF, C3 = 0 µF, and I O = IO max (unless
otherwise noted)
PARAMETER
PTV12020W
TEST CONDITIONS
IO
Output current
Natural convection airflow
VI
Input voltage range
Over IO load range
MIN
TYP
0
η
IO (trip)
(1)
A
V
±2%
(2)
±0.5%
Temperature variation
–40°C < TA < 85°C
Line regulation
Over VI range
±5
Load regulation
Over IO range
±10
Total output variation
Includes set-point, line, load, –40°C ≤ TA≤ 85°C
Adjust range
Over VI range
Efficiency
UNIT
13.2
16
10.8
Set-point voltage tolerance
VO
MAX
Output voltage ripple (pk-pk)
20-MHz bandwidth
Overcurrent threshold
Reset, followed by auto-recovery
mV
±3
1.2
IO = IO max
mV
(2)
5.5
RSET = 280 Ω, VO = 5 V
93%
RSET = 2.0 kΩ, VO = 3.3 V
91%
RSET = 4.32 kΩ, VO = 2.5 V
89%
RSET = 11.5 kΩ, VO = 1.8 V
86%
RSET = 24.3 kΩ, VO = 1.5 V
84%
RSET = open cct., VO = 1.2 V
81%
VO≤ 2.5 V
1
VO > 2.5 V
1.5
%Vo
V
%VO
30
A
1-A/µs load step, 50 to 100% IO max, C3 = 330 µF
Transient response
Track control (pin 9)
UVLO
Undervoltage lockout
70
µs
100
mV
IIL Input low current
Pin to GND
Control slew-rate limit
C3 ≤ C3 (max)
–0.13
1
VI increasing
9.5
VI decreasing
VIH Input high voltage
Inhibit control (pin 12)
Recovery time
Vo over/undershoot
VIL Input low voltage
IIL Input low current
8.8
2
Referenced to GND
Open
–0.2
Pin to GND
–0.24
Input standby current
Inhibit (pin 12) to GND, Track (pin 9) open
10
ƒS
Switching frequency
Over VI and IO ranges
Nonceramic (C1)
External input capacitance
External output capacitance (C3)
Ceramic (C2)
Capacitance value
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Reliability
(4)
22
(4)
Nonceramic
0
Ceramic
0
Equivalent series resistance (nonceramic)
MTBF
560
Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign
4
(7)
4.9
325
V
(3)
0.6
II (stby)
250
10.4
9
mA
V/ms
V
mA
mA
400
kHz
µF
330
(5)
6,600
(6)
300
µF
mΩ
106 Hrs
See thermal derating curves for safe operating area (SOA), or consult factory for appropriate derating.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/°C or better temperature stability.
This control pin is pulled up to an internal supply voltage. To avoid risk of damage to the module, do not apply an external voltage
greater than 7 V. If this input is left open-circuit, the module operates when input power is applied. A small low-leakage (<100 nA)
MOSFET is recommended for control. For further information, consult the related application note.
A 22-µF high-frequency ceramic capacitor and 560-µF electrolytic input capacitor are required for proper operation. The electrolytic
capacitor must be rated for the minimum ripple current rating. Consult the Application Information for further guidance on input capacitor
selection.
An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load improves the
transient response.
This is the calculated maximum. The minimum ESR limitation often results in a lower value. Consult the Application Information for
further guidance.
This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 mΩ as the minimum when using max-ESR values
to calculate.
3
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI = 12 V, VO = 1.8 V, C1 = 560 µF, C2 = 22 µF, C3 = 0 µF, and I O = IO max (unless
otherwise noted)
PARAMETER
PTV12020L
TEST CONDITIONS
IO
Output current
Natural convection airflow
VI
Input voltage range
Over IO load range
MIN
TYP
0
η
IO (trip)
(1)
A
V
±2%
(2)
±0.5%
Temperature variation
–40°C <TA < 85°C
Line regulation
Over VI range
±10
Load regulation
Over IO range
±12
Total output variation
Includes set-point, line, load, –40°C ≤ TA≤ 85°C
Adjust range
Over VI range
Efficiency
UNIT
13.2
16
10.8
Set-point voltage tolerance
VO
MAX
Output voltage ripple (pk-pk)
20-MHz bandwidth
Overcurrent threshold
Reset, followed by auto-recovery
mV
±3
0.8
IO = IO max
mV
(2)
1.8
RSET = 130 Ω, VO = 1.8 V
87%
RSET = 3.57 kΩ, VO = 1.5 V
85%
RSET = 12.1 kΩ, VO = 1.2 V
83%
RSET = 32.4 kΩ, VO = 1 V
80%
RSET = open cct., VO = 0.8 V
77%
%Vo
V
2
%VO
30
A
1-A/µs load step, 50 to 100% IO max, C3 = 330 µF
Transient response
Track control (pin 9)
Input standby current
UVLO
Undervoltage lockout
ƒS
Switching frequency
Pin to GND
C3 ≤ C3 (max)
VIL Input low voltage
–0.13
1
2
Referenced to GND
–0.24
10
VI increasing
9.5
VI decreasing
Over VI and IO ranges
Capacitance value
(1)
(2)
(3)
(4)
(5)
(6)
(7)
4
Reliability
8.8
9
200
250
Nonceramic (C1)
560
(4)
Ceramic (C2)
22
(4)
Nonceramic
0
Ceramic
0
Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign
4
(7)
4.9
mA
V/ms
(3)
0.6
Pin to GND
Equivalent series resistance (nonceramic)
MTBF
Open
–0.2
Inhibit (pin 12) to GND, Track (pin 9) open
External input capacitance
External output capacitance (C3)
µs
mV
Control slew-rate limit
IIL Input low current
II (stby)
70
100
IIL Input low current
VIH Input high voltage
Inhibit control (pin 12)
Recovery time
Vo over/undershoot
V
mA
mA
10.4
300
V
kHz
µF
330
(5)
6,600
(6)
300
µF
mΩ
106 Hrs
See thermal derating curves for safe operating area (SOA), or consult factory for appropriate derating.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/°C or better temperature stability.
This control pin is pulled up to an internal supply voltage. To avoid risk of damage to the module, do not apply an external voltage
greater than 7 V. If this input is left open-circuit, the module operates when input power is applied. A small low-leakage (<100 nA)
MOSFET is recommended for control. For further information, consult the related application note.
A 22-µF high-frequency ceramic capacitor and 560-µF electrolytic input capacitor are required for proper operation. The electrolytic
capacitor must be rated for the minimum ripple current rating. Consult the Application Information for guidance on input capacitor
selection.
An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load improves the
transient response.
This is the calculated maximum. The minimum ESR limitation often results in a lower value. Consult the Application Informaiton for
further guidance.
This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 mΩ as the minimum when using max-ESR values
to calculate.
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
PTV12020W Characteristic Data; 1.2 V to 5.5 V
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT VOLTAGE RIPPLE
vs
OUTPUT CURRENT
150
VO = 5 V
VO = 3.3 V
V O − Output Voltage Ripple − mV PP
100
Efficiency − %
90
80
VO = 2.5 V
VO = 1.8 V
70
VO = 1.5 V
VO = 1.2 V
60
50
120
VO = 5 V
90
VO = 3.3 V
30
0
0
2
4
6
8
10
14
12
16
0
2
IO − Output Current − A
POWER DISSIPATION
vs
OUTPUT CURRENT
TEMPERATURE DERATING
vs
OUTPUT CURRENT
5
80
Temperature Derating − C
90
VO = 2.5 V
4
VO = 3.3 V
VO = 5 V
2
1
VO = 1.2 V
2
4
6
8
10
12
16
Airflow
70
400 LFM
60
200 LFM
100 LFM
50
Nat Conv
40
VO = 3.3 V
30
0
0
14
Figure 2.
6
3
4
6
8
10 12
IO − Output Current − A
Figure 1.
14
20
16
0
IO − Output Current − A
Figure 3.
2
4
6
8
10 12
IO − Output Current − A
14
16
Figure 4.
TEMPERATURE DERATING
vs
OUTPUT CURRENT
90
80
Temperature Derating − C
PD − Power Dissipation − W
VO = 1.8 V
VO = 1.5 V
VO = 1.2 V
VO = 2.5 V
60
Airflow
70
400 LFM
60
200 LFM
100 LFM
50
Nat Conv
40
VO = 5 V
30
20
0
2
4
6
8
10 12
IO − Output Current − A
14
16
Figure 5.
5
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
PTV12020L Characteristic Data; 0.8 V to 1.8 V
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT VOLTAGE RIPPLE
vs
OUTPUT CURRENT
100
VO = 1.5 V
VO = 1.8 V
V O − Output Voltage Ripple − mV PP
100
VO = 1.2 V
Efficiency − %
90
80
70
VO = 0.8 V
VO = 1 V
60
80
60
VO = 1.8 V
40
20
VO = 1 V
0
50
0
2
4
6
8
10
12
14
0
16
2
6
VO = 0.8 V
8
10
12
14
Figure 6.
Figure 7.
POWER DISSIPATION
vs
OUTPUT CURRENT
TEMPERATURE DERATING
vs
OUTPUT CURRENT
16
90
5
80
4
Temperature Derating − C
PD − Power Dissipation − W
4
IO − Output Current − A
IO − Output Current − A
VO = 1.2 V
3
VO = 1.8 V
2
1
VO = 0.8 V
0
2
4
6
8
10
12
IO − Output Current − A
Figure 8.
14
16
400 LFM
Airflow
70
200 LFM
100 LFM
60
Nat Conv
50
40
VO = 1.8 V
30
0
6
VO = 1.2 V
VO = 1.5 V
20
0
2
4
6
8
10 12
IO − Output Current − A
Figure 9.
14
16
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
DEVICE INFORMATION
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
NO.
VI
5, 6
The positive input voltage power node to the module, which is referenced to common GND.
VO
3, 4
The regulated positive power output with respect to the GND node.
GND
1, 2, 10, 11
This is the common ground connection for the VI and VO power connections. It is also the 0 VDC reference for the
control inputs.
Inhibit
12
The Inhibit pin is an open-collector/drain, active-low input that is referenced to GND. Applying a low-level ground
signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control is active,
the input current drawn by the regulator is significantly reduced. If the inhibit feature is not used, the control pin
should be left open-circuit. The module then produces an output voltage whenever a valid input source is applied.
Vo Adjust
8
A 1% resistor must be connected directly between this pin and GND (pin 1 or 2) to set the output voltage of the
module higher than its lowest value. The temperature stability of the resistor should be 100 ppm/°C (or better).
The set-point range is 1.2 V to 5.5 V for W-suffix devices and 0.8 V to 1.8 V for L-suffix devices. The resistor value
required for a given output voltage may be calculated using a formula. If left open-circuit, the module output
voltage defaults to its lowest value. For further information on output voltage adjustment, consult the related
application note.
The specification table gives the standard resistor values for a number of common output voltages.
Vo Sense
Track
7
9
The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For
optimal voltage accuracy Vo Sense should be connected to VO. It can also be left disconnected.
This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes
active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from
0 V up to the nominal set-point voltage. Within this range, the output follows the voltage at the Track pin on a
volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point
voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same
input bus. If unused, this input should be connected to VI.
NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage
during power up. Consult the related Application Information for further guidance.
Front View of Module
PIN 1
PIN 5
PIN 12
Figure 10. Pin/Terminal Locations
7
PTV12020W/L
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
www.ti.com
APPLICATION INFORMATION
Capacitor Recommendations for the PTV12020 Series of Power Modules
Input Capacitors
The required input capacitors are a 22-µF ceramic and 560-µF electrolytic type. For V O > 2.1 V and IO ≥ 11 A ,
the 560-µF capacitance must be rated for 1,200 mArms ripple current capability. For other conditions, VO > 2.1 V
at IO < 11 A and VO ≤ 2.1 V for all loads, the ripple current rating must be at least 750 mArms. Where applicable,
Table 1 gives the maximum output voltage and current limits for a capacitor's rms ripple current rating.
The above ripple current requirements are conditional that the 22-µF ceramic capacitor is present. The 22-µF
X5R/X7R ceramic capacitor is necessary to reduce both the magnitude of ripple current through the electroytic
capacitor and the amount of ripple current reflected back to the input source. Ceramic capacitors should be
located within 0.5 in. (1,3 cm) of the module’s input pins. Additional ceramic capacitors can be added to reduce
the RMS ripple current requirement for the electrolytic capacitor.
Ripple current (Arms) rating, less than 100-mΩ equivalent series resistance (ESR), and temperature are the
major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum
capacitors have a recommended minimum voltage rating of 2 × (max. DC voltage + AC ripple). This is standard
practice to ensure reliability. Only a few tantalum capacitors were found to have sufficient voltage rating to meet
this requirement. At temperatures below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications Os-Con, polymer-tantalum, and polymer-aluminum types should be considered.
Output Capacitor (Optional)
For applications with load transients (sudden changes in load current), regulator response benefits from external
output capacitance. The recommended output capacitance of 330 µF allows the module to meet its transient
response specification. For most applications, a high-quality computer-grade aluminum electrolytic capacitor is
adequate. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable
when ambient temperatures are above 0°C. For operation below 0°C, tantalum, ceramic, or Os-Con type
capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR
should be no lower than 4 mΩ (7 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of
preferred low-ESR type capacitors are identified in Table 1.
Ceramic Capacitors
Above 150 kHz, the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic
capacitors have low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be
used to reduce the reflected ripple current at the input as well as improve the transient response of the output.
When used on the output their combined ESR is not critical as long as the total value of ceramic capacitance
does not exceed approximately 300 µF. Also, to prevent the formation of local resonances, do not place more
than five identical ceramic capacitors in parallel with values of 10 µF or greater.
Tantalum Capacitors
Tantalum-type capacitors can only be used on the output bus, and are recommended for applications where the
ambient operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595 and Kemet
T495/T510 capacitor series are suggested over many other tantalum types due to their higher rated surge, power
dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have
considerably higher ESR, reduced power dissipation and lower ripple current capability. These capacitors are
also less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors that
have no stated ESR or surge current rating are not recommended for power applications.
When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit is encountered
before the maximum capacitance value is reached.
Capacitor Table
Table 1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple
current (rms) ratings. The recommended number of capacitors required at both the input and output buses is
identified for each capacitor type.
8
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
APPLICATION INFORMATION (continued)
Note: This is not an extensive capacitor list. Capacitors from other vendors are available with comparable
specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical
parameters necessary to ensure both optimum regulator performance and long capacitor life.
Designing for Fast Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 1
A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the
optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter
regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with
any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application
specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output
capacitor decoupling. In these cases special attention must be paid to the type, value and ESR of the capacitors
selected.
If the transient performance requirements exceed that specified in the data sheet, or the total amount of load
capacitance is above 3,000 µF, the selection of output capacitors becomes more important.
Table 1. Input/Output Capacitors
Capacitor Characteristics
Quantity
Working
Voltage
(V)
Value
(µF)
Max ESR
at 100 kHz
(Ω)
Max Ripple
Current at
85°C (Irms)
(mA)
Physical Size
(mm)
Input
Bus
Optional
Output
Bus
Vendor
Part Number
Panasonic, Aluminum
25
330
0.090
775
10 × 12.5
2
1
EEUFC1E331 (VO ≤ 2.1 V,
or VO > 2.1 V and
IO ≤ 10 A)
FC (Radial)
25
560
0.065
1205
12.5 × 15
1
1
EEUFC1E561S
25
1,000
0.060
1100
12.5 × 13.5
1
1
EEVFK1E102Q
(VO≤ 3.4 V and IO ≤ 16 A)
FK (SMD)
35
680
0.060
1100
12.5 × 13.5
1
1
EEVFK1V681Q
(VO ≤ 3.4 V and IO ≤ 16 A)
United Chemi-Con
16
330
0.018
4500
10 × 10.5
2
≤3
FX, OS-Con (SMD)
16
330
0.090
760
10 × 12.5
2
1
LXZ25VB331M10X12LL
(VO ≤ 2.1V, or VO > 2.1V
and IO ≤ 10 A
LXZ, Aluminum (Radial)
25
680
0.068
1050
10 × 16
1
1
LXZ16VB681M10X16LL
(VO ≤ 3.4 V and IO ≤ 16 A)
PS, Poly-Aluminum (Radial)
16
330
0.014
5060
10 × 12.5
2
≤2
16PS330MJ12
PXA, Poly-Aluminum (SMD)
16
330
0.014
5050
10 × 12.2
2
≤3
PXA16VCMJ12
Nichicon, Aluminum
25
560
0.060
1060
12.5 × 15
1
1
UPM1E561MHH6
(VO ≤ 3.4 V and IO ≤ 16 A)
HD (Radial)
25
680
0.038
1430
10 × 16
1
1
UHD1C681MHR
PM (Radial)
35
560
0.048
1360
16 × 15
1
1
UPM1V561MHH6
A (SMD)
16
330
0.022
4100
10 × 10.2
≤3
EEFWA1C331P
S/SE (SMD)
6.3
180
0.005
4000
7.3 × 154.3 × 4.2
N/R
(1)
≤1
EEFSE0J181R
(VO≤ 5.1 V)
TP, Psocap
10
330
0.025
3000
7.3 L × 5.7 W
N/R
(1)
≤4
10TPE330M
SP, Os-Con
16
270
0.018
>3500
10 × 10.5
2
≤3
16SP270M
SVP, Os-Con (SMD)
16
330
0.016
4700
11 × 12
≤3
16SVP330M
N/R
(1)
≤5
TPSE477M010R0045
(VO≤ 5.1 V)
N/R
(1)
≤5
TPSE337M010R0045
(VO ≤ 5.1 V)
Capacitor Vendor,
Type/Series (Style)
16FX330M
Panasonic, Poly-Aluminum
2
Sanyo
AVX, Tantalum, Series III
TPS (SMD)
10
10
470
330
0.045
0.045
>1723
>1723
7.3L × 5.7 W × 4.1 H
(2)
2
Kemet (SMD)
(1)
(2)
N/R – Not recommended. The voltage rating does not meet the minimum operating limits.
Total capacitance of 540 µF is acceptable based on the combined ripple current rating.
9
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
APPLICATION INFORMATION (continued)
Table 1. Input/Output Capacitors (continued)
Capacitor Characteristics
Quantity
Working
Voltage
(V)
Value
(µF)
Max ESR
at 100 kHz
(Ω)
Max Ripple
Current at
85°C (Irms)
(mA)
T520, Poly-Tant
10
330
0.040
1800
N/R
(1)
≤5
T520X337M010AS
T530, Poly-Tant/Organic
10
330
0.010
>3800
N/R
(1)
≤1
T530X337M010ASE010
6.3
470
0.010
4200
N/R
(1)
≤1
T530X477M006ASE010
(VO ≤ 5.1 V)
595D, Tantalum (SMD)
10
470
0.100
1440
7.2 L × 6 W × 4.1 H
N/R
(1)
≤5
595D477X0010R2T
(VO ≤ 5.1 V)
94SA, Os-Con (Radial)
16
1,000
0.015
9740
16 × 25
≤2
94SA108X0016HBP
Kemet, Ceramic X5R (SMD)
16
10
0.002
—
3225
=>2
(3)
≤5
C1210C106M4PAC
6.3
47
0.002
3225
N/R
(1)
≤5
C1210C476K9PAC
6.3
100
0.002
3225
N/R
(1)
≤3
GRM32ER60J107M
6.3
47
3225
N/R
(1)
≤5
GRM32ER60J476M
16
22
=>1
(3)
≤5
GRM32ER61C226K
16
10
=>2
(3)
≤5
GRM32DR61C106K
6.3
100
3225
N/R
(1)
≤3
C3225X5R0J107MT
6.3
47
3225
N/R
(1)
≤5
C3225X5R0J476MT
16
22
=>1
(3)
≤5
C3225X5R1C226MT
16
10
=>2
(4)
≤5
C3225X5R1C106MT
Capacitor Vendor,
Type/Series (Style)
Physical Size
(mm)
43 W × 7.3 L × 4 H
Input
Bus
Vendor
Part Number
Optional
Output
Bus
Vishay-Sprague
Murata, Ceramic X5R (SMD)
TDK, Ceramic X5R (SMD)
(3)
(4)
0.002
—
—
1
Ceramic capacitors are required to complement electrolytic types at the input and to reduce high-frequency ripple current.
Ceramic capacitors are required to complement electrolytic types at the input and to reduce high-frequency ripple current.
Adjusting the Output Voltage of the PTV12020x Series
The VO Adjust control (pin 8) sets the output voltage of the PTV12020 product. The adjustment range is from
1.2 V to 5.5 V for the W-suffix modules and 0.8 V to 1.8 V for L-suffix modules. The adjustment method requires
the addition of a single external resistor, RSET, that must be connected directly between the VO Adjust and GND
(pin 1 or 2). Table 2 gives the preferred value of the external resistor for a number of standard voltages, along
with the actual output voltage that this resistance value provides. Figure 11 shows the placement of the required
resistor.
Table 2. Standard Values of RSET for Common Output Voltages
PTV12020W
VO
(Required)
10
PTV12020L
RSET
(Standard Value)
VO
(Actual)
RSET
(Standard Value)
VO
(Actual)
5V
280 Ω
5.009 V
N/A
N/A
3.3 V
2.0 kΩ
3.294 V
N/A
N/A
2.5 V
4.32 kΩ
2.503 V
N/A
N/A
2V
8.06 kΩ
2.010 V
N/A
N/A
1.8 V
11.5 kΩ
1.801 V
130 Ω
1.800 V
1.5 V
24.3 kΩ
1.506 V
3.57 kΩ
1.499 V
1.2 V
Open
1.200 V
12.1 kΩ
1.201 V
1.1 V
N/A
N/A
18.7 kΩ
1.101 V
1.0 V
N/A
N/A
32.4 kΩ
0.999 V
0.9 V
N/A
N/A
71.5 kΩ
0.901 V
0.8 V
N/A
N/A
Open
0.800 V
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
For other output voltages, the value of the required resistor can either be calculated or simply selected from the
range of values given in Table 4. Equation 1 may be used for calculating the adjust resistor value. Select the
appropriate value for the parameters, Rs and Vmin, from Table 3.
R set 10 k 0.8 V
V out V
min
R s k
(1)
Table 3. Adjust Formula Parameters
Pt. No.
PTV12020W
PTV12020L
Vmin
1.2 V
0.8 V
Vmax
5.5 V
1.8 V
Rs
1.82 kΩ
7.87 kΩ
VO Sense
7
VO Sense
VO
PTV12020
VO Adj
GND
10, 11
VO
1, 2
8
+
GN D
3, 4
RSET
1%, 0.05W
CO
330 F
(Optional)
GND
(1)
A 0.05-W rated resistor may be used. The tolerance should be 1%, with temperature stability of 100 ppm/°C (or
better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pin 8 and pins 1
or 2, using dedicated PCB traces.
(2)
Never connect capacitors from VoAdj to either GND or Vo. Any capacitance added to the VoAdj pin affects the stability
of the regulator.
Figure 11. VO Adjust Resistor Placement
11
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
Table 4. Calculated Values of RSET for Other Output Voltages
PTV12020W
12
PTV12020L
VOUT
RSET
VOUT
RSET
VOUT
RSET
1.200
Open
2.70
3.51 kΩ
0.800
Open
1.250
158.0 kΩ
2.80
3.18 kΩ
0.825
312.0 kΩ
1.300
78.2 kΩ
2.90
2.89 kΩ
0.850
152.0 kΩ
1.350
51.5 kΩ
3.00
2.62 kΩ
0.875
98.8 kΩ
1.400
38.2 kΩ
3.10
2.39 kΩ
0.900
72.1 kΩ
1.450
30.2 kΩ
3.20
2.18 kΩ
0.925
56.1 kΩ
1.50
24.8 kΩ
3.30
1.99 kΩ
0.950
45.5 kΩ
1.55
21.0 kΩ
3.40
1.82 kΩ
0.975
37.8 kΩ
1.60
18.2 kΩ
3.50
1.66 kΩ
1.000
32.1 kΩ
1.65
16.0 kΩ
3.60
1.51 kΩ
1.025
27.7 kΩ
1.70
14.2 kΩ
3.70
1.38 kΩ
1.050
24.1 kΩ
1.75
12.7 kΩ
3.80
1.26 kΩ
1.075
21.2 kΩ
1.80
11.5 kΩ
3.90
1.14 kΩ
1.100
18.8 kΩ
1.85
10.5 kΩ
4.00
1.04 kΩ
1.125
16.7 kΩ
1.90
9.61 kΩ
4.10
939 Ω
1.150
15.0 kΩ
1.95
8.85 kΩ
4.20
847 Ω
1.175
13.5 kΩ
2.00
8.18 kΩ
4.30
761 Ω
1.200
12.1 kΩ
2.05
7.59 kΩ
4.40
680 Ω
1.250
9.91 kΩ
2.10
7.07 kΩ
4.50
604 Ω
1.300
8.13 kΩ
2.15
6.60 kΩ
4.60
533 Ω
1.350
6.68 kΩ
2.20
6.18 kΩ
4.70
466 Ω
1.400
5.46 kΩ
2.25
5.80 kΩ
4.80
402 Ω
1.450
4.44 kΩ
2.30
5.45 kΩ
4.90
342 Ω
1.50
3.56 kΩ
2.35
5.14 kΩ
5.00
285 Ω
1.55
2.8 kΩ
2.40
4.85 kΩ
5.10
231 Ω
1.60
2.13 kΩ
2.45
4.58 kΩ
5.20
180 Ω
1.65
1.54 kΩ
2.50
4.33 kΩ
5.30
131 Ω
1.70
1.02 kΩ
2.55
4.11 kΩ
5.40
85 Ω
1.75
551 Ω
2.60
3.89 kΩ
5.50
41 Ω
1.80
130 Ω
2.65
3.70 kΩ
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
Features of the PTH/PTV Family of Non-Isolated, Wide-Output Adjust Power Modules
POLA™ Compatibility
The PTH/PTV family of non-isolated, wide-output adjustable power modules from Texas Instruments are
optimized for applications that require a flexible, high-performance module that is small in size. Each of these
products are POLA™ compatible. POLA-compatible products are produced by a number of manufacturers, and
offer customers advanced, non-isolated modules with the same footprint and form factor. POLA parts are also
ensured to be interoperable, thereby providing customers with true second-source availability.
Soft-Start Power Up
The Auto-Track feature allows the power up of multiple PTH/PTV modules to be directly controlled from the
Track pin. However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track
pin should be directly connected to the input voltage, Vi (see Figure 12).
Track
12 V
PTV12020W
GND
3.3 V
VO
Adjust
RSET, 2 K
1%
0.05W
CI
+
VI
CO
+
GND
GND
Figure 12.
When the Track pin is connected to the input voltage, the Auto-Track function is permanently disengaged. This
allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is
under soft-start control, the output voltage rises to the set point at a quicker and more linear rate.
Vin (5 V/Div)
Vo (1 V/Div)
Iin (5 A/Div)
HORIZ SCALE 5 ms/Div
Figure 13.
From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 8
ms-15 ms) before allowing the output voltage to rise. The output then progressively rises to the module set-point
voltage. Figure 13 shows the soft-start power-up characteristic of the 16-A output product (PTV12020W),
operating from a 12-V input bus and configured for a 3.3-V output. The waveforms were measured with a 5-A
resistive load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first
starts to rise is the charge current drawn by the input capacitors. Power up is complete within 25 ms.
13
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
Overcurrent Protection
For protection against load faults, the modules incorporate output overcurrent protection. Applying a load that
exceeds the overcurrent threshold causes the regulated output to shut down. Following shutdown, a module
periodically attempts to recover by initiating a soft-start power up. This is described as a hiccup mode of
operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is
removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is
removed, the module automatically recovers and returns to normal operation.
Overtemperature Protection (OTP)
An onboard temperature sensor protects the module internal circuitry against excessively high temperatures. A
rise in the internal temperature may be the result of a drop in airflow or a high ambient temperature. If the
internal temperature exceeds the OTP threshold, the module Inhibit control is internally pulled low. This turns the
output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The
recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases
by about 10°C below the trip point.
Note: The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator.
Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term
reliability of the module. Always operate the regulator within the specified Safe Operating Area (SOA) limits for
the worst-case conditions of ambient temperature and airflow.
Output On/Off Inhibit
For applications requiring output voltage on/off control, the modules incorporate an output Inhibit control pin. The
inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned
off.
The power modules function normally when the Inhibit input is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VI with respect to GND.
Figure 14 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input
has its own internal pull up (see footnotes to electrical characteristics table). The input is not compatible with TTL
logic devices. An open-collector (or open-drain) discrete transistor is recommended for control.
Sense
Sense
VI
VI
PTV12020W
Inhibit GND
Adjust
+
+
CI
3.3 V
VO
RSET
2 k
1%
0.05 W
Q1
BSS138
1 = Inhibit
CO
L
O
A
D
GND
GND
Figure 14.
Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then
turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within
25 ms. Figure 15 shows the typical rise in both the output voltage and input current, following the turnoff of Q1.
The turnoff of Q1 corresponds to the rise in the waveform, Q1 VDS. The waveforms were measured with a 5-A
constant current load.
14
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
Q1Vds (5 V/Div)
Vo (2 V/Div)
Iin (2 A/Div)
HORIZ SCALE: 10 ms/Div
Figure 15.
Auto-Track™ Function
The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track
was designed to simplify the amount of circuitry required to make the output voltage from each module power up
and power down in sequence. The sequencing of two or more supply voltages during power up is a common
requirement for complex mixed-signal applications, that use dual-voltage VLSI ICs such as DSPs,
microprocessors, and ASICs.
How Auto-Track™ Works
Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin 1.
This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is
raised above the set-point voltage, the module's output remains at its set point 2. As an example, if the Track pin
of a 2.5-V regulator is at 1 V, the regulated output will be 1 V. But if the voltage at the Track pin rises to 3 V, the
regulated output does not go higher than 2.5 V.
When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a
volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow
a common signal during power up and power down. The control signal can be an externally generated master
ramp waveform, or the output voltage from another power supply circuit 3. For convenience, the Track input
incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising
waveform at power up.
Typical Application
The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track
compliant modules. Connecting the Track control pins of two or more modules forces the Track control of all
modules to follow the same collective RC-ramp waveform, and allows them to be controlled through a single
transistor or switch; see Q1 in Figure 16.
To initiate a power-up sequence, it is recommended that the Track control first be pulled to ground potential. This
is done at or before input power is applied to the modules, and then held for at least 10 ms thereafter. This brief
period gives the modules time to complete their internal soft-start initialization. Applying a logic level high signal
to the circuit On/Off Control turns Q1 on and applies a ground signal to the Track pins. After completing their
internal soft-start intialization, the output of all modules remains at zero volts while Q1 is on.
Q1 may be turned off 10 ms after a valid input voltage has been applied to the modules. This allows the track
control voltage to automatically rise to the module input voltage. During this period, the output voltage of each
module rises in unison with other modules to its respective set-point voltage.
Figure 17 shows the output voltage waveforms from the circuit of Figure 16 after the On/Off Control is set from a
high-level to a low-level voltage. The waveforms, VO1 and VO2 represent the output voltages from the two power
modules, U1 (3.3 V) and U2 (2 V), respectively. VO1 and VO2 are shown rising together to produce the desired
simultaneous power-up characteristic.
15
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
The same circuit also provides a power-down sequence. Power down is the reverse of power up, and is
accomplished by lowering the track control voltage back to zero volts. The important constraint is that a valid
input voltage must be maintained until the power down is complete. It also requires that Q1 be turned off
relatively slowly. This is so that the Track control voltage does not fall faster than Auto-Track slew rate capability,
which is 1 V/ms. The components R1 and C1 in Figure 16 limit the rate at which Q1 pulls down the Track control
voltage. The values of 100 kΩ and 0.1 µF correlate to a decay rate of about 0.17 V/ms.
The power-down sequence is initiated with a low-to-high transition at the On/Off Control input to the circuit.
Figure 18 shows the power-down waveforms. As the Track control voltage falls below the nominal set-point
voltage of each power module, then its output voltage decays with all the other modules under Auto-Track
control.
Notes on Use of Auto-Track™
1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module can
regulate at its adjusted set-point voltage.
2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp
speeds of up to 1 V/ms.
3. The absloute maximum voltage that may be applied to the Track pin is the input voltage VI.
4. The module does not follow a voltage at its Track control input until it has completed its soft-start
initialization. This takes about 10 ms from the time that the module has sensed that a valid voltage has been
applied to its input. During this period, it is recommended that the Track pin be held at ground potential.
5. The module is capable of both sinking and sourcing current when following a voltage at its Track pin.
Therefore, start up into an output prebias cannot be supported when a module is under Auto-Track control.
Note: A prebias holdoff is not necessary when all supply voltages rise simultaneously under the control of
Auto-Track.
6. The Auto-Track function can be disabled by connecting the Track pin to the input voltage (VI). When
Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power is applied.
U1
12 V
GND
+
CI
PTV12020W
GND
Sense
VO1 = 3.3 V
VO
Adjust
+
Trac k
VI
CO
R2
2 k
C1
0.1 F
U2
Trac k
VI
CI
0V
+
R1
100 k
Q1
BSS138
PTH12050W
GND
VO2 = 2 V
VO
Adjust
CO
R3
8.06 k
Figure 16. Sequenced Power Up and Power Down Using Auto-Track
16
+
On/Off Control
1 = Power Down
0 = Power Up
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
Vo1 (1 V/Div)
Vo1 (1 V/Div)
Vo2 (1 V/Div)
Vo2 (1 V/Div)
On/Off Control
(5 V/Div)
On/Off Control
(5 V/Div)
HORIZ SCALE: 10 ms/Div
Figure 17. Simultaneous Power Up With Auto-Track
Control
HORIZ SCALE: 10 ms/Div
Figure 18. Simultaneous Power Down With Auto-Track
Control
Prebias Start-Up Capability
A prebias start-up condition occurs as a result of an external voltage being present at the output of a power
module prior to its output becoming active. This often occurs in complex digital systems when current from
another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another
path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A
prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under
most operating conditions, such modules can sink as well as source output current. The 12-V input modules
incorporate synchronous rectifiers, but do not sink current during start up, or whenever the Inhibit pin is held low.
Start up includes an initial delay (approximately 8–15 ms), followed by the rise of the output voltage under the
control of the module internal soft-start mechanism; see Figure 19.
Conditions for Prebias Holdoff
In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must
be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenever the output
is allowed to rise under soft-start control. Power up under soft-start control occurs on the removal of the ground
signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled2. To
further ensure that the regulator does not sink output current (even with a ground signal applied to its Inhibit), the
input voltage must always be greater than the applied prebias source. This condition must exist throughout the
power-up sequence3.
The soft-start period is complete when the output begins rising above the prebias voltage. Once it is complete,
the module functions as normal and sinks current if a voltage higher than the nominal regulation value is applied
to its output.
Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risen to
either the set-point voltage, or the voltage applied at the module Track control pin, whichever is lowest, to its
output.
Demonstration Circuit
Figure 20 shows the start-up waveforms for the demonstration circuit shown in Figure 21. The initial rise in VO2 is
the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the
output current from the module (IO2) is negligible until its output voltage rises above the applied prebias.
17
PTV12020W/L
www.ti.com
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
Vin (5 V/Div)
Vo1 (1 V/Div)
Vo (1 V/Div)
Vo2 (1 V/Div)
Io2 (5 A/Div)
Start−Up
Period
HORIZ SCALE: 10 ms/Div
HORIZ SCALE 5 ms/Div
Figure 19. PTV12020W Start Up
Figure 20. Prebias Start-Up Waveforms
NOTES:
1. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the
voltage applied to the Track control pin, the output sinks current during the period that the track control
voltage is below that of the back-feeding source. For this reason, Auto-Track should be disabled when not
being used. This is accomplished by connecting the Track pin to the input voltage, VI. This raises the Track
pin well above the set-point voltage prior to start up, thereby defeating the Auto-Track feature.
2. To further ensure that the regulator output does not sink current when power is first applied (even with a
ground signal applied to the Inhibit control pin), the input voltage must always be greater than the applied
prebias source. This condition must exist throughout the power-up sequence of the power system.
Tra ck
Sense
VI = 12 V
VO1 = 3.3 V
VI
PTV12020W
Inhibit
+
GND
C1
Tra ck
TL7702B
Adjust
+
C2
R1
2 k
VI
R3
11 k
VO
PTV12010W
Inhibit
8
GND
Sense
VO2 = 1.8 V
VO
+
Vadj
IO2
VCC
R4
100 k
C5
0.1 F
7 SENSE
5
RESET
2
RESIN
1 REF
6
RESET
3
CT
GND
4
C6
R5
0.68 F
10 k
R2
11.5 k
+
C3
VC ORE
+
C4
Figure 21. Application Circuit Demonstrating Prebias Startup
18
ASIC
VC CI O
www.ti.com
PTV12020W/L
SLTS231A – NOVEMBER 2004 – REVISED FEBRUARY 2005
Remote Sense
Products with this feature incorporate an output voltage sense pin, VO Sense. A remote sense improves the load
regulation performance of the module by allowing it to compensate for any IR voltage drop between its output
and the load. An IR drop is caused by the high output current flowing through the small amount of pin and trace
resistance.
To use this feature, simply connect the VO Sense pin to the VO node, close to the load circuit (see the data sheet
standard application). If a sense pin is left open-circuit, an internal low-value resistor (15 Ω or less) connected
between the pin and the output node, ensures that the output remains in regulation.
With the sense pin connected, the difference between the voltage measured directly between the VO and GND
pins, and that measured from VO Sense to GND, is the amount of IR drop being compensated by the regulator.
This should be limited to a maximum of 0.3 V.
Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency
dependent components that may be placed in series with the output. Examples include OR-ing diodes, filter
inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection, they
are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator.
19
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
PTV12020LAH
ACTIVE
SIP MOD
ULE
EVC
12
40
Pb-Free
(RoHS)
Call TI
N / A for Pkg Type
PTV12020WAD
ACTIVE
SIP MOD
ULE
EVC
12
40
Pb-Free
(RoHS)
Call TI
N / A for Pkg Type
PTV12020WAH
ACTIVE
SIP MOD
ULE
EVC
12
40
Pb-Free
(RoHS)
Call TI
N / A for Pkg Type
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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to Customer on an annual basis.
Addendum-Page 1
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