TI PTH08T240WAZ

PTH08T240W, PTH08T241W
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
10-A, 4.5-V to 14-V INPUT, NON-ISOLATED,
WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TURBOTRANS™
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Up to 10-A Output Current
4.5-V to 14-V Input Voltage
Wide-Output Voltage Adjust (0.69 V to 5.5 V)
±1.5% Total Output Voltage Variation
Efficiencies up to 96%
Output Overcurrent Protection
(Nonlatching, Auto-Reset)
Operating Temperature: –40°C to 85°C
Safety Agency Approvals:
– UL/IEC/CSA-C22.2 60950-1
Prebias Startup
On/Off Inhibit
Differential Output Voltage Remote Sense
Adjustable Undervoltage Lockout
Auto-Track™ Sequencing
Ceramic Capacitor Version (PTH08T241W)
•
•
•
TurboTrans™ Technology
Designed to meet Ultra-Fast Transient
Requirements up to 300 A/µs
SmartSync Technology
APPLICATIONS
•
•
•
Complex Multi-Voltage Systems
Microprocessors
Bus Drivers
DESCRIPTION
The PTH08T240/241W is a high-performance 10-A rated, non-isolated power module. These modules represent
the 2nd generation of the popular PTH series power modules and include a reduced footprint and additional
features. The PTH08T241W is optimized to be used with all ceramic capacitors.
Operating from an input voltage range of 4.5 V to 14 V, the PTH08T240/241W requires a single resistor to set
the output voltage to any value over the range, 0.69 V to 5.5 V. The wide input voltage range makes the
PTH08T240/241W particularly suitable for advanced computing and server applications that utilize a loosely
regulated 8-V to 12-V intermediate distribution bus. Additionally, the wide input voltage range increases design
flexibility by supporting operation with tightly regulated 5-V, 8-V, or 12-V intermediate bus architectures.
The module incorporates a comprehensive list of features. Output over-current and over-temperature shutdown
protects against most load faults. A differential remote sense ensures tight load regulation. An adjustable
under-voltage lockout allows the turn-on voltage threshold to be customized. Auto-Track™sequencing is a
popular feature that greatly simplifies the simultaneous power-up and power-down of multiple modules in a
power system.
The PTH08T240/241W includes new patent pending technologies, TurboTrans™ and SmartSync. The
TurboTrans feature optimizes the transient response of the regulator while simultaneously reducing the quantity
of external output capacitors required to meet a target voltage deviation specification. Additionally, for a target
output capacitor bank, TurboTrans can be used to significantly improve the regulators transient response by
reducing the peak voltage deviation. SmartSync allows for switching frequency synchronization of multiple
modules, thus simplifying EMI noise suppression tasks and reducing input capacitor RMS current requirements.
The module uses double-sided surface mount construction to provide a low profile and compact footprint.
Package options include both through-hole and surface mount configurations that are lead (Pb) - free and RoHS
compatible.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Auto-Track, TMS320 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2007, Texas Instruments Incorporated
PTH08T240W, PTH08T241W
www.ti.com
SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
SmartSync
Track
TurboTranst
10
VI
Track
2
1
9
TT
+Sense
SYNC
VI
VO
PTH08T240W
Inhibit
11
VO
−Sense
GND
3
CI
220 µF
(Required)
5
+Sense
7
INH/UVLO
GND
+
RUVLO
1%
0.05 W
(Opional)
6
RTT
1%
0.05 W
(Optional)
4
VOAdj
8
+
RSET [A]
1%
0.05 W
(Required)
CI2
22 µF
(Optional)
L
O
A
D
CO
220 µF
(Required)
−Sense
GND
GND
UDG−06005
A.
RSET required to set the output voltage to a value higher than 0.69 V. See Electrical Characteristics table.
SmartSync
Track
TurboTranst
10
VI
Track
2
1
9
SYNC
TT
+Sense
VI
VO
PTH08T241W
Inhibit
11
3
RUVLO
1%
0.05 W
(Opional)
CI
200 µF
(Required)
5
+Sense
VO
7
INH/UVLO
GND
6
RTT
1%
0.05 W
(Optional)
−Sense
GND
4
VOAdj
8
RSET [A]
1%
0.05 W
(Required)
L
O
A
D
CO
300 µF
(Required)
GND
−Sense
GND
UDG−06005
A.
2
RSET required to set the output voltage to a value higher than 0.69 V. See Electrical Characteristics table.
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see
the TI website at www.ti.com.
DATASHEET TABLE OF CONTENTS
DATASHEET SECTION
PAGE NUMBER
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
3
ELECTRICAL CHARACTERISTICS TABLE (PTH08T240W)
4
ELECTRICAL CHARACTERISTICS TABLE (PTH08T241W)
6
TERMINAL FUNCTIONS
8
TYPICAL CHARACTERISTICS (VI = 12V)
9
TYPICAL CHARACTERISTICS (VI = 5V)
10
ADJUSTING THE OUTPUT VOLTAGE
11
INPUT & OUTPUT CAPACITOR RECOMMENDATIONS
13
TURBOTRANS™ INFORMATION
17
UNDERVOLTAGE LOCKOUT (UVLO)
22
SOFT-START POWER-UP
23
OUTPUT INHIBIT
24
OVER-CURRENT PROTECTION
25
OVER-TEMPERATURE PROTECTION
25
REMOTE SENSE
25
SYCHRONIZATION (SMARTSYNC)
26
AUTO-TRACK SEQUENCING
27
PREBIAS START-UP
30
TAPE & REEL AND TRAY DRAWINGS
32
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
(Voltages are with respect to GND)
UNIT
VTrack
Track pin voltage
–0.3 to VI + 0.3
TA
Operating temperature range Over VI range
–40 to 85
Twave
Wave soldering temperature
Surface temperature of module body or
pins for 5 seconds maximum.
suffix AH
suffix AD
260
Treflow
Solder reflow temperature
Surface temperature of module body or
pins
suffix AS
235 (1)
suffix AZ
260 (1)
Tstg
Storage temperature
Mechanical shock
Mechanical vibration
(1)
(2)
235
°C
–40 to 125 (2)
Per Mil-STD-883D, Method 2002.3 1
msec, 1/2 sine, mounted
Mil-STD-883D, Method 2007.2 20-2000 Hz
Weight
Flammability
V
suffix AH & AD
500
suffix AS & AZ
250
G
15
5
grams
Meets UL94V-O
During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the
stated maximum.
The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65°C.
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PTH08T240W, PTH08T241W
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS
PTH08T240W
TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 220 µF, CO = 220 µF, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T240W
MIN
IO
Output current
Over VO range
VI
Input voltage range
Over IO range
VOADJ
Output voltage adjust range
Over IO range
25°C, natural convection
η
10
0.69 ≤ VO≤ 1.2
4.5
11 ×
VO (1)
1.2 < VO≤ 3.6
4.5
14
3.6 < VO≤ 5.5
VO + 2
14
0.69
5.5
±0.5
±0.3
%Vo
Over VI range
±3
mV
Load regulation
Over IO range
±2
Total output variation
Includes set-point, line, load, –40°C ≤ TA ≤ 85°C
IO = 10 A
95%
RSET = 1.21 kΩ, VO = 3.3 V
94%
RSET = 2.38 kΩ, VO = 2.5 V
92%
RSET = 4.78 kΩ, VO = 1.8 V
90%
RSET = 7.09 kΩ, VO = 1.5 V
88%
RSET = 12.1 kΩ, VO = 1.2 V
87%
20-MHz bandwidth
Overcurrent threshold
Reset, followed by auto-recovery
Transient response
2.5 A/µs load step
50 to 100% IOmax
VO = 2.5 V
∆VtrTT
w/ TurboTrans
CO = 2000 µF, Type C,
RTT = 0 Ω
Track input current (pin 10)
Pin to GND
dVtrack/dt
Track slew rate capability
CO ≤ CO (max)
UVLOADJ
VI increasing, RUVLO = OPEN
Adjustable Under-voltage lockout
VI decreasing, RUVLO = OPEN
(pin 11)
Hysteresis, RUVLO≤ 52.3 kΩ
(3)
A
35
µs
VO over/undershoot
165
mV
Recovery time
130
µs
VO over/undershoot
30
Input low voltage (VIL)
Input standby current
Inhibit (pin 11) to GND, Track (pin 10) open
fs
Switching frequency
Over VI and IO ranges, SmartSync (pin 1) to GND
fSYNC
Synchronization (SYNC)
frequency
VSYNCH
SYNC High-Level Input Voltage
VSYNCL
SYNC Low-Level Input Voltage
tSYNC
SYNC Minimum Pulse Width
(5)
4
mV
1
4.3
4.0
µA
V/ms
4.45
4.2
V
0.5
Open (5)
-0.2
Input low current (IIL), Pin 11 to GND
Iin
(4)
mVPP
Recovery time
Input high voltage (VIH)
(3)
%Vo
20
–130 (4)
IIL
Inhibit control (pin 11)
(2)
85%
10
w/o TurboTrans
CO = 220 µF, Type C
mV
±1.5
RSET = 171 Ω, VI = 8 V, VO = 5.0 V
VO Ripple (peak-to-peak)
∆Vtr
(2)
V
%Vo
–40°C < TA < 85°C
ttr
(1)
(2)
V
Line regulaltion
RSET = 20.8 kΩ, VO = 1.0 V
ttrTT
±1
A
Temperature variation
Efficiency
ILIM
UNIT
MAX
0
Set-point voltage tolerance
VO
TYP
0.8
V
-235
µA
5
mA
300
kHz
240
400
kHz
2
5.5
V
0.8
200
V
nSec
The maximum input voltage is duty cycle limited to (VO× 11) or 14 volts, whichever is less. The maximum allowable input voltage is a
function of switching frequency, and may increase or decrease when the SmartSync feature is utilized. Please review the SmartSync
section of the Application Information for further guidance.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/°C or better temperature stability.
For output voltages less than 1.7 V, the ripple may increase (up to 2×) when operating at input voltages greater than (VO× 11). See the
SmartSync section of the Application Information for input voltage and frequency limitations.
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The
open-circuit voltage is less than 8 Vdc.
This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related
application information section.
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS (continued)
PTH08T240W
TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 220 µF, CO = 220 µF, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T240W
MIN
CI
Nonceramic
External input capacitance
Capacitance Value
Nonceramic
w/ TurboTrans
Capacitance Value
Capacitance × ESR product (CO× ESR)
MTBF
(6)
(7)
(8)
(9)
Reliability
Per Telcordia SR-332, 50% stress,
TA = 40°C, ground benign
(7)
Ceramic
Equivalent series resistance (non-ceramic)
External output capacitance
22
220
UNIT
MAX
(6)
Ceramic
w/o TurboTrans
CO
220
TYP
µF
(6)
5000
(8)
500
7
mΩ
see table
µF
(7) (9)
1000
6.1
µF
10000
(9)
µF×mΩ
106 Hr
A 220 µF electrolytic input capacitor is required for proper operation. The electrolytic capacitor must be rated for a minimum of 500 mA
rms of ripple current.
For VO≤ 3.45 V, a 220 µF external output capacitor is required for basic operation. When VO > 3.45 V the minimum output capacitance
increase to 330 µF. The minimum output capacitance requirement increases when TurboTrans™ (TT) technology is utilized. See related
Application Information for more guidance.
This is the calculated maximum disregarding TurboTrans™ technology. When the TurboTrans™ feature is utilized, the minimum output
capacitance must be increased.
When using TurboTrans™ technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR
capacitors are required for proper operation. See the application notes for further guidance.
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PTH08T240W, PTH08T241W
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS
PTH08T241W (Ceramic Capacitors)
TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 200 µF ceramic, CO = 300 µF ceramic, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T241W
MIN
IO
Output current
Over VO range
VI
Input voltage range
Over IO range
VOADJ
Output voltage adjust range
Over IO range
25°C, natural convection
η
10
0.69 ≤ VO≤ 1.2
4.5
11 ×
VO (1)
1.2 < VO≤ 3.6
4.5
14
3.6 < VO≤ 5.5
VO + 2
14
0.69
5.5
±0.5
±0.3
%Vo
Over VI range
±3
mV
Load regulation
Over IO range
±2
Total output variation
Includes set-point, line, load, –40°C ≤ TA ≤ 85°C
IO = 10 A
95%
RSET = 1.21 kΩ, VO = 3.3 V
94%
RSET = 2.38 kΩ, VO = 2.5 V
92%
RSET = 4.78 kΩ, VO = 1.8 V
90%
RSET = 7.09 kΩ, VO = 1.5 V
88%
RSET = 12.1 kΩ, VO = 1.2 V
87%
20-MHz bandwidth
Overcurrent threshold
Reset, followed by auto-recovery
Transient response
2.5 A/µs load step
50 to 100% IOmax
VO = 2.5 V
∆VtrTT
w/ TurboTrans
CO= 1500 µF, Type A
RTT = short
Track input current (pin 10)
Pin to GND
dVtrack/dt
Track slew rate capability
CO ≤ CO (max)
UVLOADJ
VI increasing, RUVLO = OPEN
Adjustable Under-voltage lockout
Vi decreasing, RUVLO = OPEN
(pin 11)
Hysteresis, RUVLO≤ 52.3 kΩ
(3)
A
35
µs
VO over/undershoot
165
mV
Recovery time
130
µs
VO over/undershoot
30
Input low voltage (VIL)
Input standby current
Inhibit (pin 11) to GND, Track (pin 10) open
fs
Switching frequency
Over VI and IO ranges, SmartSync (pin 1) to GND
fSYNC
Synchronization (SYNC)
frequency
VSYNCH
SYNC High-Level Input Voltage
VSYNCL
SYNC Low-Level Input Voltage
tSYNC
SYNC Minimum Pulse Width
(5)
6
mV
1
4.3
4.0
µA
V/ms
4.45
4.2
V
0.5
Open (5)
-0.2
Input low current (IIL ), Pin 11 to GND
Iin
(4)
mVPP
Recovery time
Input high voltage (VIH)
(3)
%Vo
20
–130 (4)
IIL
Inhibit control (pin 11)
(2)
85%
10
w/o TurboTrans
CO= 200 µF, Type A
mV
±1.5
RSET = 171 Ω, VI = 8 V, VO = 5.0 V
VO Ripple (peak-to-peak)
∆Vtr
(2)
V
%Vo
–40°C < TA < 85°C
ttr
(1)
(2)
V
Line regulaltion
RSET = 20.8 kΩ, VO = 1.0 V
ttrTT
±1
A
Temperature variation
Efficiency
ILIM
UNIT
MAX
0
Set-point voltage tolerance
VO
TYP
0.8
V
-235
µA
5
mA
300
kHz
240
400
kHz
2
5.5
V
0.8
200
V
nSec
The maximum input voltage is duty cycle limited to (VO× 11) or 14 volts, whichever is less. The maximum allowable input voltage is a
function of switching frequency, and may increase or decrease when the SmartSync feature is utilized. Please review the SmartSync
section of the Application Information for further guidance.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/°C or better temperature stability.
For output voltages less than 1.7 V, the ripple may increase (up to 2×) when operating at input voltages greater than (VO× 11). See the
SmartSync section of the Application Information for input voltage and frequency limitations.
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The
open-circuit voltage is less than 8 Vdc.
This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related
application note.
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS (continued)
PTH08T241W (Ceramic Capacitors)
TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 200 µF ceramic, CO = 300 µF ceramic, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T241W
MIN
CI
External input capacitance
w/o TurboTrans
CO
External output capacitance
w/ TurboTrans
Capacitance Value
Ceramic
200
(6)
Ceramic
300
(7)
Capacitance Value
Capacitance × ESR product (CO× ESR)
MTBF
(6)
(7)
(8)
Reliability
Per Telcordia SR-332, 50% stress,
TA = 40°C, ground benign
TYP
UNIT
MAX
µF
(8)
µF
(7)
5000
µF
100
1000
µF×mΩ
see table
6.1
3000
106 Hr
200 µF of ceramic input capacitance is required for proper operation.
300 µF of ceramic output capacitance is required for basic operation. The minimum output capacitance requirement increases when
TurboTrans™ (TT) technology is utilized. Additionally, low ESR capacitors are required for proper operation. See related Application
Information for more guidance.
This is the calculated maximum disregarding TurboTrans™ technology.
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TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
DESCRIPTION
VI
2
The positive input voltage power node to the module, which is referenced to common GND.
VO
5
The regulated positive power output with respect to GND.
GND
Inhibit (1) and
UVLO
Vo Adjust
3, 4
11
This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc reference for
the control inputs.
The Inhibit pin is an open-collector/drain, negative logic input that is referenced to GND. Applying a low level
ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control
is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the
module produces an output whenever a valid input source is applied.
This pin is also used for input undervoltage lockout (UVLO) programming. Connecting a resistor from this pin to
GND (pin 3) allows the ON threshold of the UVLO to be adjusted higher than the default value. For more
information, see the Application Information section.
8
A 0.05 W 1% resistor must be directly connected between this pin and pin 7 (–Sense) to set the output voltage
to a value higher than 0.69 V. The temperature stability of the resistor should be 100 ppm/°C (or better). The
setpoint range for the output voltage is from 0.69 V to 5.5 V. If left open circuit, the output voltage will default to
its lowest value. For further information, on output voltage adjustment see the related application note.
The specification table gives the preferred resistor values for a number of standard output voltages.
+ Sense
6
The sense input allows the regulation circuit to compensate for voltage drop between the module and the load.
For optimal voltage accuracy, +Sense must be connected to VO, very close to the load.
– Sense
7
The sense input allows the regulation circuit to compensate for voltage drop between the module and the load.
For optimal voltage accuracy –Sense must be connected to GND (pin 4) very close to the module (within
10 cm).
10
This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes
active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage
from 0 V up to the nominal set-point voltage. Within this range the module's output voltage follows the voltage at
the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates
at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered
from the same input bus. If unused, this input should be connected to VI.
Track
NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage
during power up. For more information, see the related application note.
TurboTrans™
SmartSync
(1)
9
This input pin adjusts the transient response of the regulator. To activate the TurboTrans™ feature, a 1%,
50 mW resistor must be connected between this pin and pin 6 (+Sense) very close to the module. For a given
value of output capacitance, a reduction in peak output voltage deviation is achieved by utililizing this feature. If
unused, this pin must be left open-circuit. The resistance requirement can be selected from the TurboTrans™
resistor table in the Application Information section. External capacitance must never be connected to this pin
unless the TurboTrans resistor value is a short, 0Ω.
1
This input pin sychronizes the switching frequency of the module to an external clock frequency. The SmartSync
feature can be used to sychronize the switching fequency of multiple PTH08T240/241W modules, aiding EMI
noise suppression efforts. If unused, this pin should be connected to GND (pin 3). For more information, please
review the Application Information section.
Denotes negative logic: Open = Normal operation, Ground = Function active
11
1
10
2
9
8
PTH08T240W/241W
(Top View)
7
6
3
8
4
5
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
TYPICAL CHARACTERISTICS (1) (2)
CHARACTERISTIC DATA (VI = 12 V)
EFFICIENCY
vs
LOAD CURRENT
OUTPUT RIPPLE
vs
LOAD CURRENT
100
POWER DISSIPATION
vs
LOAD CURRENT
16
4.0
14
3.5
VO = 2.5 V
VO = 5.0 V
VO = 3.3 V
VO = 1.8 V
70
VO = 2.5 V
VO = 1.2 V
60
50
40
VO = 5.0 V
12
10
8
VO = 3.3 V
6
4
VO = 1.8 V
VO = 1.2 V
2
30
VI = 12 V
VO = 2.5 V
20
2
4
6
8
0
6
VO = 1.2 V
0
8
0
10
2
VI = 12 V
4
6
8
IO − Output Current − A
Figure 2.
Figure 3.
AMBIENT TEMPERATURE
vs
LOAD CURRENT
AMBIENT TEMPERATURE
vs
LOAD CURRENT
AMBIENT TEMPERATURE
vs
LOAD CURRENT
TA − Ambient Temperature − °C
70
400 LFM
100 LFM
200 LFM
60
Nat Conv
50
40
20
Natural
Convection
200 LFM
60
50
100 LFM
40
4
6
8
IO − Output Current − A
Figure 4. Safe Operating Area
10
70
60
50
40
30
VO = 1.2 V
VI = 12 V
VI = 12 V
VO = 3.3 V
20
2
Nat Conv
80
80
70
10
90
400 LFM
30
VO = 5 V
VI = 12 V
0
1.0
Figure 1.
90
30
1.5
IO − Output Current − A
80
TA − AMbient Temperature − °C
4
VO = 5.0 V
2.0
IO − Output Current − A
90
(2)
2
2.5
VO = 1.8 V
VI = 12 V
0
10
VO = 3.3 V
3.0
0.5
TA − AMbient Temperature − °C
0
(1)
PD − Power Dissipation − W
80
VO − Output Voltage Ripple − mVPP
η − Efficiency − %
90
0
2
4
6
8
IO − Output Current − A
Figure 5. Safe Operating Area
20
10
0
2
4
6
8
10
IO − Output Current − A
Figure 6. Safe Operating Area
The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 1, Figure 2, and Figure 3.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please refer to the mechanical specification for more
information. Applies to Figure 5.
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TYPICAL CHARACTERISTICS (1) (2)
CHARACTERISTIC DATA (VI = 5 V)
EFFICIENCY
vs
LOAD CURRENT
OUTPUT RIPPLE
vs
LOAD CURRENT
POWER DISSIPATION
vs
LOAD CURRENT
10
100
2.5
VO = 3.3 V
80
VO = 0.69 V
VO = 2.5 V
VO = 0.9 V
VO = 1.2 V
60
VO = 1.8 V
50
40
VO = 1.8 V
PD − Power Dissipation − W
VO − Output Voltage Ripple − mVPP
η − Efficiency − %
90
70
VO = 3.3 V
VI = 5 V
2.0
8
6
VO = 3.3 V
VO = 2.5 V
1.5
VO = 1.2 V
VO = 0.9 V
4
VO = 1.8 V
VO = 1.2 V
1.0
VO = 0.69 V
VO = 0.69 V
0.5
2
VO = 2.5 V
VO = 0.9 V
VI = 5 V
VI = 5 V
30
0
2
4
6
8
0
0
10
0
IO − Output Current − A
2
4
6
8
IO − Output Current − A
Figure 7.
10
Figure 8.
0
2
4
6
8
IO − Output Current − A
10
Figure 9.
AMBIENT TEMPERATURE
vs
LOAD CURRENT
TA − Ambient Temperature − °C
90
80
Natural
Convection
70
60
50
40
30
VI = 5 V
All VO
20
0
2
4
6
8
10
IO − Output Current − A
Figure 10. Safe Operating Area
(1)
(2)
10
The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 7, Figure 8, and Figure 9.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please refer to the mechanical specification for more
information. Applies to Figure 10.
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APPLICATION INFORMATION
ADJUSTING THE OUTPUT VOLTAGE
The Vo Adjust control (pin 8) sets the output voltage of the PTH08T240/241W. The adjustment range is 0.69 V
to 5.5 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected
directly between the Vo Adjust and – Sense pins. Table 1 gives the standard value of the external resistor for a
number of standard voltages, along with the actual output voltage that this resistance value provides.
For other output voltages, the value of the required resistor can either be calculated using the following formula,
or simply selected from the range of values given in Table 2. Figure 11 shows the placement of the required
resistor.
RSET = 10 kW x
0.69
- 1.43 kW
VO - 0.69
(1)
Table 1. Standard Values of RSET for Standard Output Voltages
VO (Standard) (V)
5.0
VO (Actual) (V)
0.169
5.005
3.3
1.21
3.304
2.5
2.37
2.506
1.8
4.75
1.807
1.5
6.98
1.510
12.1
1.200
20.5
1.004
681
0.700
1.2
1
(2)
(2)
0.7
(1)
(2)
RSET (Standard Value) (kΩ)
(1)
(2)
For VO > 3.6 V, the minimum input voltage is (VO + 2) V.
The maximum input voltage is (VO× 11) or 14 V, whichever is less. The maximum allowable input
voltage is a function of switching frequency and may increase or decrease when the Smart Sync
feature is utilized. Please review the Smart Sync application section for further guidance.
+Sense
PTH08T240W/241W
VO
−Sense
GND
3
GND
4
6
+Sense
5
VO
7
VOAdj
8
RSET
1%
0.05 W
CO
−Sense
GND
(1)
RSET: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/°C (or better). Connect the
resistor directly between pins 8 and 7, as close to the regulator as possible, using dedicated PCB traces.
(2)
Never connect capacitors from VO Adjust to either + Sense, GND, or VO. Any capacitance added to the VO Adjust pin
affects the stability of the regulator.
Figure 11. Vo Adjust Resistor Placement
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Table 2. Output Voltage Set-Point Resistor Values (Standard Values)
VO Required (V)
(1)
(2)
12
RSET (kΩ)
VO Required (V)
RSET (Ω)
0.70
(1)
681
2.50
2.37 k
0.75
(1)
113
2.60
2.15 k
0.80
(1)
61.9
2.70
2.00 k
0.85
(1)
41.2
2.80
1.82 k
0.90
(1)
31.6
2.90
1.69 k
0.95
(1)
24.9
3.00
1.54 k
1.00
(1)
20.5
3.10
1.43 k
1.05
(1)
17.8
3.20
1.33 k
1.10
(1)
15.4
3.30
1.21 k
1.15
(1)
13.3
3.40
1.10 k
1.20
(1)
12.1
3.50
1.02 k
1.25 (1)
10.7
3.60
931
1.30
9.88
3.70
(2)
1.35
9.09
3.80
(2)
787
1.40
8.25
3.90
(2)
715
1.45
7.68
4.00
(2)
649
590
866
1.50
6.98
4.10
(2)
1.55
6.49
4.20
(2)
536
1.60
6.04
4.30
(2)
475
432
1.65
5.76
4.40
(2)
1.70
5.36
4.50
(2)
383
1.75
5.11
4.60
(2)
332
287
1.80
4.75
4.70
(2)
1.85
4.53
4.80
(2)
249
1.90
4.22
4.90
(2)
210
1.95
4.02
5.00
(2)
169
133
2.00
3.83
5.10
(2)
2.10
3.40
5.20
(2)
100
2.20
3.09
5.30
(2)
66.5
2.30
2.87
5.40
(2)
34.8
2.40
2.61
5.50
(2)
4.99
The maximum input voltage is (VO× 11) or 14 V, whichever is less. The maximum allowable input
voltage is a function of switching frequency and may increase or decrease when the Smart Sync
feature is utilized. Please review the Smart Sync application section for further guidance.
For VO > 3.6 V, the minimum input voltage is (VO + 2) V.
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CAPACITOR RECOMMENDATIONS FOR THE PTH08T240/241W POWER MODULE
Capacitor Technologies
Electrolytic Capacitors
When using electrolytic capacitors, high quality, computer-grade electrolytic capacitors are recommended.
Aluminum electrolytic capacitors provide adequate decoupling over the frequency range, 2 kHz to 150 kHz,
and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum,
ceramic, or OS-CON type capacitors are required.
Ceramic Capacitors
Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic
capacitors have very low ESR and a resonant frequency higher than the bandwidth of the regulator. They
can be used to reduce the reflected ripple current at the input as well as improve the transient response of
the output.
Tantalum, Polymer-Tantalum Capacitors
Tantalum type capacitors may only used on the output bus, and are recommended for applications where
the ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are
suggested over many other tantalum types due to their lower ESR, higher rated surge, power dissipation,
and ripple current capability. Tantalum capacitors that have no stated ESR or surge current rating are not
recommended for power applications.
Input Capacitor (Required)
The PTH08T241W requires a minimum input capacitance of 200 µF of ceramic type.
The PTH08T240W requires a minimum input capacitance of 220 µF electrolytic type. The ripple current rating of
the electrolytic capacitor must be at least 700 mArms when VO ≥ 3 V. The ripple current rating must be at least
450 mArms when VO < 3 V. An optional 22 µF X5R/X7R ceramic is recommended to reduce the RMS ripple
current.
Input Capacitor Information
The size and value of the input capacitor is determined by the converter’s transient performance capability. This
minimum value assumes that the converter is supplied with a responsive, low inductance input source. This
source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground
planes.
Ceramic capacitors should be located as close as possible to the module's input pins, within 0.5 inch (1,3 cm).
Adding ceramic capacitance is necessary to reduce the high-frequency ripple voltage at the module's input. This
will reduce the magnitude of the ripple current through the electroytic capacitor, as well as the amount of ripple
current reflected back to the input source. Additional ceramic capacitors can be added to further reduce the
RMS ripple current requirement for the electrolytic capacitor.
Increasing the minimum input capacitance to 680 µF is recommended for high-performance applications, or
wherever the input source performance is degraded.
The main considerations when selecting input capacitors are the RMS ripple current rating, temperature stability,
and less than 100 mΩ of equivalent series resistance (ESR).
Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended
minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability.
No tantalum capacitors were found with a sufficient voltage rating to meet this requirement.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered.
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Output Capacitor (Required)
The PTH08T241W requires a minimum output capacitance of 300 µF of ceramic type.
The PTH08T240W requires a minimum output capacitance of 220 µF of aluminum, polymer-aluminum, tantulum,
or polymer-tantalum type.
The required capacitance above the minimum will be determined by actual transient deviation requirements. See
the TurboTrans Technology application section within this document for specific capacitance selection.
Output Capacitor Information
When selecting output capacitors, the main considerations are capacitor type, temperature stability, and ESR.
When using the TurboTrans feature, the capacitance X ESR product should also be considered (see the
following section).
Ceramic output capacitors added for high-frequency bypassing should be located as close as possible to the
load to be effective. Ceramic capacitor values below 10 µF should not be included when calculating the total
output capacitance value.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered.
TurboTrans Output Capacitance
TurboTrans allows the designer to optimize the output capacitance according to the system transient design
requirement. High quality, ultra-low ESR capacitors are required to maximize TurboTrans effectiveness. When
using TurboTrans, the capacitor's capacitance (µF) × ESR (mΩ) product determines its capacitor type; Type A,
B, or C. These three types are defined as follows:
Type A = (100 ≤ capacitance × ESR ≤ 1000) (e.g. ceramic)
Type B = (1000 < capacitance × ESR ≤ 5000) (e.g. polymer-tantalum)
Type C = (5000 < capacitance × ESR ≤ 10,000) (e.g. OS-CON)
When using more than one type of output capacitor, select the capacitor type that makes up the majority of your
total output capacitance. When calculating the C×ESR product, use the maximum ESR value from the capacitor
manufacturer's datasheet.
The PTH08T241W should be used when only Type A (ceramic) capacitors are used on the output.
Working Examples:
A capacitor with a capacitance of 330 µF and an ESR of 5 mΩ, has a C × ESR product of 1650 µF x mΩ
(330 µF × 5 mΩ). This is a Type B capacitor. A capacitor with a capacitance of 1000 µF and an ESR of 8 mΩ,
has a C × ESR product of 8000 µF x mΩ (1000 µF × 8 mΩ). This is a Type C capacitor.
See the TurboTrans Technology application section within this document for specific capacitance selection.
Table 3 includes a preferred list of capacitors by type and vendor. See the Output Bus / TurboTrans column.
Non-TurboTrans Output Capacitance
If the TurboTrans feature is not used, minimum ESR and maximum capacitor limits must be followed. System
stability may be effected and increased output capacitance may be required without TurboTrans.
When using the PTH08T240W, observe the minimum ESR of the entire output capacitor bank. The minimum
ESR limit of the output capacitor bank is 7 mΩ. A list of preferred low-ESR type capacitors, are identified in
Table 3.
When using the PTH08T241W without the TurboTrans feature, the maximum amount of capacitance is 3000 µF
of ceramic type. Large amounts of capacitance may reduce system stability.
Utilizing the TurboTrans feature improves system stability, improves transient response, and reduces
the amount of output capacitance required to meet system transient design requirements.
14
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Designing for Fast Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
2.5 A/µs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using
the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a
converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent
limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability.
If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with
additional low ESR ceramic capacitor decoupling. Generally, with load steps greater than 100 A/µs, adding
multiple 10 µF ceramic capacitors plus 10 × 1 µF, and numerous high frequency ceramics (≤ 0.1 µF) is all that is
required to soften the transient higher frequency edges. The PCB location of these capacitors in relation to the
load is critical. DSP, FPGA and ASIC vendors identify types, location and amount of capacitance required for
optimum performance. Low impedance buses, unbroken PCB copper planes, and components located as close
as possible to the high frequency devices are essential for optimizing transient performance.
Table 3. Input/Output Capacitors (1)
Capacitor Characteristics
Capacitor Vendor,
Type Series (Style)
Working
Value
Voltage
(µF)
(V)
Quantity
Max.
ESR
at 100
kHz
(mΩ)
Max
Ripple
Current
at
85°C
(Irms)
(mA)
Output Bus
Physical
Size (mm)
Input
Bus
No
TurboTrans
TurboTrans
(Cap
Type) (2)
90
755
10 × 12,5
≥1 (3)
≥ 1 (4)
N/R (5)
EEUFC1E271
≥
1 (4)
N/R (5)
EEUFC1E561S
Vendor Part No.
Panasonic
FC (Radial)
25
270
FC (Radial)
25
560
65
1205
12,5 × 15
≥1 (3)
FC(SMD)
25
470
65
1200
12,5 × 16,5
≥1 (3)
≥ 1 (4)
N/R (5)
EEVFC1E471LQ
FK(SMD)
25
470
80
850
10 ×10,2
≥1 (3)
≥ 1 (4)
N/R (5)
EEVFK1E471P
6.3
330
25
2600
7,3x4,3x2.8
N/R (6)
1 ~ 4 (4)
C ≥ 2 (2)
≥1
United Chemi-Con
PTB(SMD) Poly-Tantalum
4PTB337MD6TER (VO≤ 5.1V) (7)
LXZ, Aluminum (Radial)
25
330
90
760
10 × 12,5
≥1 (3)
PS, Poly-Alum(Radial)
16
330
14
5060
10 × 12,5
≥1 (3)
1~3
B ≥ 2 (2)
16PS330MJ12
PXA, Poly-Alum(SMD)
16
330
14
5050
10 × 12,2
≥1 (3)
1~3
B ≥ 2 (2)
PXA16VC331MJ12TP
PS, Poly-Alum(Radial)
10
270
14
4420
8 × 11,5
N/R (6)
1~2
B ≥ 2 (2)
10PS270MH11
PXA, Poly-Alum(Radial)
10
330
14
4420
8 × 12
N/R (6)
1~2
B ≥ 2 (2)
PXA10VC331MH12
HD (Radial)
25
220
72
760
8 × 11,5
≥1 (3)
≥ 1 (4)
N/R (5)
UHD1E221MPR
PM (Radial)
25
330
95
750
10 × 15
≥1 (3)
≥ 1 (4)
N/R (5)
UPM1E331MPH6
PM (Radial)
35
560
48
1360
16 × 15
≥1 (3)
≥ 2 (4)
N/R (5)
UPM1V561MHH6
(4)
N/R (5)
LXZ25VB331M10X12LL
Nichicon, Aluminum
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Capacitor Supplier Verification
Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of
limited availability or obsolete products.
RoHS, Lead-free and Material Details
See the capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements.
Component designators or part number deviations can occur when material composition or soldering requirements are updated.
Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection
Capacitor Types:
• Type A = (100 ≤ capacitance × ESR ≤ 1000)
• Type B = (1,000 < capacitance × ESR ≤ 5,000)
• Type C = (5,000 < capacitance × ESR ≤ 10,000)
In addition to the required input electrolytic capacitance, ≥ 20 µF of ceramic capacitance is required to reduce the high-frequency
reflected ripple current.
Total bulk nonceramic capacitors on the output bus with ESR of ≥ 15mΩ to ≤ 30mΩ requires an additional ≥ 200 µF of ceramic
capacitance.
Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher capacitance × ESR products. Aluminum and higher
ESR capacitors can be used in conjunction with lower ESR capacitance.
N/R – Not recommended. The voltage rating does not meet the minimum operating limits.
The voltage rating and derating of this capacitor only allows it to be used for voltages that are equal or less than 5.1 V.
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Table 3. Input/Output Capacitors (continued)
Capacitor Characteristics
Capacitor Vendor,
Type Series (Style)
Panasonic,
Poly-Aluminum
Working
Value
Voltage
(µF)
(V)
Quantity
Max.
ESR
at 100
kHz
(mΩ)
Max
Ripple
Current
at
85°C
(Irms)
(mA)
Output Bus
Physical
Size (mm)
Input
Bus
No
TurboTrans
TurboTrans
(Cap
Type) (2)
Vendor Part No.
2.0
390
5
4000
7,3×4,3×4,2
N/R (6)
N/R (6)
B ≥ 2 (2)
EEFSE0J391R (VO≤ 1.6V) (8)
TPE, Poscap (SMD)
10
330
25
3000
7,3 × 4,3
N/R (6)
1~3
C ≥ 2 (2)
10TPE330MF
TPE Poscap(SMD)
2.5
470
7
4400
7,3 × 4,3
N/R (6)
1~2
B ≥ 2 (2)
2R5TPE470M7 (VO≤ 1.8V) (8)
6100
7,3 × 4,3
N/R (6)
1
B≥
1 (2)
2R5TPD1000M5 (VO≤ 1.8V) (8)
2 (2)
16SEP330M
Sanyo
TPD Poscap (SMD)
2.5
1000
5
SEP, OS-CON (Radial)
16
330
16
4700
10 ×13
≥1 (3)
1~3
B≥
SP OS-CON ( Radial)
16
270
18
4400
10 × 11,5
≥1 (3)
1~3
B ≥ 2 (2)
16SP270M
SEPC, OS-CON (Radial)
16
270
11
5000
8 × 13
≥1 (3)
1~2
B ≥ 2 (2)
16SEPC270M
SVP, OS-CON (SMD)
16
330
16
4700
10 × 12,6
≥1 (3)
1 ~ 3 (4)
B ≥ 2 (2) (4)
10
330
40
1828
7,3×4,3×4,1
N/R (6)
1 ~ 6 (4)
N/R (5)
3000
7,3×4,3×4,1
N/R (6)
1~
3 (4)
1~
5 (4)
16SVP330M
AVX, Tantalum
Series III
TPM Multianode
10
330
23
C≥
2 (4) (2)
TPSE337M010R0040 (VO≤ 5.1V) (7)
TPME337M010#0023 (VO≤ 5.1V) (7)
4
1000
35
2405
7,3 × 5,7
N/R (6)
T520 (SMD)
10
330
25
2600
7,3×4,3×4,1
N/R (6)
1 ~ 4 (4)
C ≥ 2 (2)
T520X337M010ASE025
T530 (SMD)
6.3
330
15
3800
7,3×4,3×4,1
N/R (6)
2~3
B ≥ 2 (2)
T530X337M006ASE015 (VO≤ 5.1V) (8)
T530 (SMD)
4
680
5
7300
7,3×4,3×4,1
N/R (6)
1
B ≥ 1 (2)
T530X687M004ASE005 (VO≤ 3.5V) (8)
T530 (SMD)
2.5
1000
5
7300
7,3 × 4,3
N/R (6)
1
B ≥ 1 (2)
T530X108M2R5ASE005 (VO≤ 2.0V) (8)
597D, Tantalum (SMD)
16
220
40
2300
7,2×5,7×4,1
N/R (6)
1~5
C ≥ 2 (2)
597D227X16E2T
94SP, OS-CON (Radial)
16
270
18
4400
10 × 10,5
≥1 (3)
1~3
C ≥ 2 (2)
94SP277X0016FBP
94SVP OS-CON(SMD)
16
330
17
4500
10 × 12,7
≥1 (3)
1~3
B ≥ 2 (2)
94SVP337X016F12
Kemet, Ceramic X5R
16
10
2
–
3225
≥2 (3)
≥ 1 (9)
A (2)
C1210C106M4PAC
(SMD)
6.3
47
2
N/R (10)
≥ 1 (11)
A (12)
C1210C476K9PAC
2
N/R (10)
≥
1 (11)
A (12)
GRM32ER60J107M
TPS Series III (SMD)
N/R (5)
TPSV108K004R0035 (VO≤ 2.1V) (8)
Kemet, Poly-Tantalum
Vishay-Sprague
Murata, Ceramic X5R
6.3
100
(SMD)
6.3
47
N/R (10)
≥ 1 (11)
A (12)
GRM32ER60J476M
25
22
≥ 1 (13)
≥ 1 (11)
A (12)
GRM32ER61E226K
16
10
≥2 (13)
≥ 1 (11)
A (12)
GRM32DR61C106K
TDK, Ceramic X5R
6.3
100
N/R (10)
≥ 1 (11)
A (12)
C3225X5R0J107MT
(SMD)
6.3
47
N/R (10)
≥ 1 (11)
A (12)
C3225X5R0J476MT
16
10
≥2 (13)
≥ 1 (11)
A (12)
C3225X5R1C106MT0
16
22
≥1 (13)
≥ 1 (11)
A (12)
C3225X5R1C226MT
(8)
(9)
(10)
(11)
(12)
(13)
16
2
–
–
3225
3225
The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage.
Any combination of ceramic capacitor values is limited to 500 µF for PTH08T240W and 5000 µF for PTH08T241W. The total
capacitance for PTH08T240W is limited to 10,000 µF which includes all ceramic and non-ceramic types.
N/R – Not recommended. The voltage rating does not meet the minimum operating limits.
Any combination of ceramic capacitor values is limited to 500 µF for PTH08T240W and 5000 µF for PTH08T241W. The total
capacitance for PTH08T240W is limited to 10,000 µF which includes all ceramic and non-ceramic types.
Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection
Capacitor Types:
• Type A = (100 ≤ capacitance × ESR ≤ 1000)
• Type B = (1,000 < capacitance × ESR ≤ 5,000)
• Type C = (5,000 < capacitance × ESR ≤ 10,000)
In addition to the required input electrolytic capacitance, ≥ 20 µF of ceramic capacitance is required to reduce the high-frequency
reflected ripple current.
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TurboTrans™ Technology
TurboTrans technology is a feature introduced in the T2 generation of the PTH/PTV family of power modules.
TurboTrans optimizes the transient response of the regulator with added external capacitance using a single
external resistor. Benefits of this technology include reduced output capacitance, minimized output voltage
deviation following a load transient, and enhanced stability when using ultra-low ESR output capacitors. The
amount of output capacitance required to meet a target output voltage deviation will be reduced with TurboTrans
activated. Likewise, for a given amount of output capacitance, with TurboTrans engaged, the amplitude of the
voltage deviation following a load transient will be reduced. Applications requiring tight transient voltage
tolerances and minimized capacitor footprint area will benefit greatly from this technology.
TurboTrans™ Selection
Utilizing TurboTrans requires connecting a resistor, RTT, between the +Sense pin (pin 6) and the TurboTrans pin
(pin 9). The value of the resistor directly corresponds to the amount of output capacitance required. All T2
products require a minimum value of output capacitance whether or not TurboTrans is utilized. For the
PTH08T240W, the minimum required capacitance is 220 µF. The minimum required capacitance for the
PTH08T241W is 300 µF of ceramic type. When using TurboTrans, capacitors with a capacitance × ESR product
below 10,000 µF×mΩ are required. (Multiply the capacitance (in µF) by the ESR (in mΩ) to determine the
capacitance × ESR product.) See the Capacitor Selection section of the datasheet for a variety of capacitors that
meet this criteria.
Figure 12 thru Figure 17 show the amount of output capacitance required to meet a desired transient voltage
deviation with and without TurboTrans for several capacitor types; Type A (e.g. ceramic), Type B (e.g.
polymer-tantalum), and Type C (e.g. OS-CON). To calculate the proper value of RTT, first determine your
required transient voltage deviation limits and magnitude of your transient load step. Next, determine what type
of output capacitors will be used. (If more than one type of output capacitor is used, select the capacitor type
that makes up the majority of your total output capacitance.) Knowing this information, use the chart in Figure 12
thru Figure 17 that corresponds to the capacitor type selected. To use the chart, begin by dividing the maximum
voltage deviation limit (in mV) by the magnitude of your load step (in Amps). This gives a mV/A value. Find this
value on the Y-axis of the appropriate chart. Read across the graph to the 'With TurboTrans' plot. From this
point, read down to the X-axis which lists the minimum required capacitance, CO, to meet that transient voltage
deviation. The required RTT resistor value can then be calculated using the equation or selected from the
TurboTrans table. The TurboTrans tables include both the required output capacitance and the corresponding
RTT values to meet several values of transient voltage deviation for 25% (2.5 A), 50% (5 A), and 75% (7.5 A)
output load steps.
The chart can also be used to determine the achievable transient voltage deviation for a given amount of output
capacitance. By selecting the amount of output capacitance along the X-axis, reading up to the desired 'With
TurboTrans'' curve, and then over to the Y-axis, gives the transient voltage deviation limit for that value of output
capacitance. The required RTT resistor value can be calculated using the equation or selected from the
TurboTrans table.
As an example, let's look at a 12-V application requiring a 50 mV deviation during an 5 A, 50% load transient. A
majority of 330 µF, 10 mΩ ouput capacitors will be used. Use the 12-V, Type B capacitor chart, Figure 14.
Dividing 50 mV by 5 A gives 10 mV/A transient voltage deviation per amp of transient load step. Select 10 mV/A
on the Y-axis and read across to the 'With TurboTrans'' plot. Following this point down to the X-axis gives a
minimum required output capacitance of approximately 680 µF. The required RTT resistor value for 680 µF can
then be calculated or selected from Table 5. The required RTT resistor is approximately 7.32 kΩ.
To see the benefit of TurboTrans, follow the 10 mV/A marking across to the 'Without TurboTrans' plot. Following
that point down shows that you would need a minimum of 3000 µF of output capacitance to meet the same
transient deviation limit. This is the benefit of TurboTrans.
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PTH08T241W - Type A Ceramic Capacitors
12-V Input
5-V Input
30
30
WIth TurboTrans
Without TurboTrans
WIth TurboTrans
Without TurboTrans
20
Transient − mV/A
10
9
8
7
6
10
9
8
7
6
5
5
4
4
PTH08T241W
Type A Ceramic Capacitors
PTH08T241W
Type A Ceramic Capacitors
5000
4000
3000
2000
500
600
700
800
900
1000
200
5000
4000
3000
2000
500
600
700
800
900
1000
400
300
200
400
3
3
300
Transient − mV/A
20
C − Capacitance − µF
C − Capacitance − µF
Figure 12. Capacitor Type A, 100 ≤ C(µF)×ESR(mΩ) ≤
1000 (e.g. Ceramic)
Figure 13. Capacitor Type A, 100 ≤ C(µF)xESR(mΩ) ≤
1000 (e.g. Ceramic)
Table 4. Type A TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
12-V Input
5-V Input
25% load step
(2.5 A)
50% load step
(5 A)
75% load step
(7.5 A)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
50
100
150
300
open
300
open
45
90
135
310
1180
370
140
40
80
120
380
118
470
49.9
35
70
105
470
47.5
610
23.2
30
60
90
610
22.6
830
10.0
25
50
75
830
10.0
1200
2.61
20
40
60
1220
2.49
3050
short
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 2
R TT + 40
ƪ1 * ǒC Oń1500Ǔƫ
ƪǒ5
COń1500Ǔ * 1ƫ
(kW)
(2)
Where CO is the total output capacitance in µF. CO values greater than or equal to 1500 µF require RTT to be a
short, 0Ω.
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the capacitor
transient response charts above.
18
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PTH08T240W Type B Capacitors
12-V Input
5-V Input
30
30
10
9
8
7
6
10000
3000
200
2000
1000
2000
2
1000
2
10000
3
3000
3
4000
5000
6000
4
400
500
4
400
500
5
300
Transient − mV/A
5
300
WIth TurboTrans
Without TurboTrans
20
10
9
8
7
6
200
Transient − mV/A
20
4000
5000
6000
WIth TurboTrans
Without TurboTrans
C − Capacitance − µF
C − Capacitance − µF
Figure 14. Cap Type B, 1000 < C(µF)×ESR(mΩ) ≤ 5000
(e.g. Polymer-Tantalum)
Figure 15. Cap Type B, 1000 < C(µF)×ESR(mΩ) ≤ 5000
(e.g. Polymer-Tantalum)
Table 5. Type B TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
12-V Input
5-V Input
25% load step
(2.5 A)
50% load step
(5 A)
75% load step
(7.5 A)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
55
110
165
220
open
220
open
40
80
120
330
57.6
360
42.2
35
70
105
400
30.9
450
23.7
30
60
90
510
16.2
560
12.7
25
50
75
680
7.32
750
5.49
20
40
60
1000
1.58
1050
0.536
15
30
45
2100
short
2600
short
10
20
30
10500
short
exceeds limit
—
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 3. For
VO > 3.45 V please contact TI for CO and RTT values.
40
R TT +
ƪ1 * ǒCOń1100Ǔƫ
ƪǒC Oń220Ǔ * 1ƫ
(kW)
(3)
Where CO is the total output capacitance in µF. CO values greater than or equal to 1100 µF require RTT to be a
short, 0Ω. (RTT results in a negative value when CO > 1100 µF).
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the capacitor
transient response charts above.
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PTH08T240W Type C Capacitors
12-V Input
5-V Input
30
30
20
10000
3000
200
4000
5000
6000
2000
500
2000
2
10000
2
3000
3
1000
3
300
4
200
4
4000
5000
6000
5
1000
5
10
9
8
7
6
500
10
9
8
7
6
300
Transient − mV/A
20
Transient − mV/A
WIth TurboTrans
Without TurboTrans
WIth TurboTrans
Without TurboTrans
C − Capacitance − µF
C − Capacitance − µF
Figure 16. Cap Type C, 5000 < C(µF)×ESR(mΩ) ≤ 10,000
(e.g. OS-CON)
Figure 17. Cap Type C, 5000 < C(µF)×ESR(mΩ) ≤ 10,000
(e.g. OS-CON)
Table 6. Type C TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
12-V Input
5-V Input
25% load step
(2.5 A)
50% load step
(5 A)
75% load step
(7.5 A)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
75
150
225
220
open
250
1300
60
120
180
270
294
330
133
45
90
135
400
68.1
480
45.3
35
70
105
580
31.6
700
21.5
30
60
90
720
20.0
860
13.7
25
50
75
950
11.8
1150
7.68
20
40
60
1300
5.23
1550
2.61
15
30
45
2000
short
2800
short
10
20
30
7400
short
exceeds limit
—
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 4 . For
VO > 3.45 V please contact TI for CO and RTT values.
40
R TT +
ƪǒǒǒ5
ƪ1 * ǒCOń1980Ǔƫ
Ǔ
ƫ
C OǓ ) 880Ǔń1980 * 1
(kW)
(4)
Where CO is the total output capacitance in µF. CO values greater than or equal to 1980 µF require RTT to be a
short, 0Ω. (RTT results in a negative value when CO > 1980 µF).
To ensure stability, the value of RTT must be calculated using the minimum required output capacitance
determined from the capacitor transient response charts above.
20
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TurboTrans
10
1
VI
AutoTrack
TurboTrans
+Sense
Smart
Sync
2
PTH08T240W
VI
11 Inhibit/
Prog UVLO
3
4
6
+Sense
5
VO
VO
−Sense
GND
CI
220 mF
(Required)
RTT
0 kW
9
7
VOAdj
8
RSET
1%
0.05 W
L
O
A
D
CO
1320 mF
Type B
−Sense
GND
GND
Figure 18. Typical TurboTrans™ Application
Without TurboTrans
100 mV/div
With TurboTrans
100 mV/div
2.5 A/ms
50% Load Step
Figure 19. Typical TurboTrans Waveforms
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UNDERVOLTAGE LOCKOUT (UVLO)
The PTH08T240/241W power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature
prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. This
enables the module to provide a clean, monotonic powerup for the load circuit, and also limits the magnitude of
current drawn from the regulator’s input source during the power-up sequence.
The UVLO characteristic is defined by the ON threshold (VTHD) voltage. Below the ON threshold, the Inhibit
control is overridden, and the module does not produce an output. The hysteresis voltage, which is the
difference between the ON and OFF threshold voltages, is set at 500 mV. The hysteresis prevents start-up
oscillations, which can occur if the input voltage droops slightly when the module begins drawing current from
the input source.
The UVLO feature of the PTH08T240/241W module allows for limited adjustment of the ON threshold voltage.
The adjustment is made via the Inhbit/UVLO Prog control pin (pin 11) using a single resistor (see Figure 20).
When pin 11 is left open circuit, the ON threshold voltage is internally set to its default value, which is 4.3 volts.
The ON threshold might need to be raised if the module is powered from a tightly regulated 12-V bus. Adjusting
the threshold prevents the module from operating if the input bus fails to completely rise to its specified
regulation voltage.
Equation 5 determines the value of RUVLO required to adjust VTHD to a new value. The default value is 4.3 V, and
it may only be adjusted to a higher value.
R UVLO +
9690 * ǒ137
ǒ137
VIǓ
(kW)
VIǓ * 585
(5)
Table 7 shows a chart of standard resistor values for RUVLO for different options of the on-threshold (VTHD)
voltage.
Table 7. Standard RUVLO values for Various VTHD values
VTHD (V)
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
RUVLO (kΩ)
88.7
52.3
37.4
28.7
23.2
19.6
16.9
14.7
13.0
11.8
10.5
9.76
8.87
PTH08T240W/241W
VI
2
VI
11 Inhibit/
UVLO Prog
GND
3
CI
4
RUVLO
GND
Figure 20. Undervoltage Lockout Adjustment Resistor Placement
22
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Soft-Start Power Up
The Auto-Track feature allows the power-up of multiple PTH/PTV modules to be directly controlled from the
Track pin. However in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track
pin should be directly connected to the input voltage, VI (see Figure 21).
10
Track
PTH08T240W/241W
VI
2
VI
GND
3,4
CI
GND
Figure 21. Defeating the Auto-Track Function
When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This
allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is
under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate.
From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically
2 ms–10 ms) before allowing the output voltage to rise.
VI (5 V/div)
VO (2 V/div)
II (2 A/div)
t − Time − 4 ms/div
Figure 22. Power-Up Waveform
The output then progressively rises to the module’s setpoint voltage. Figure 22 shows the soft-start power-up
characteristic of the PTH08T240/241W operating from a 12-V input bus and configured for a 3.3-V output. The
waveforms were measured with a 10-A constant current load and the Auto-Track feature disabled. The initial
rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors.
Power-up is complete within 15 ms.
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On/Off Inhibit
For applications requiring output voltage on/off control, the PTH08T240/241W incorporates an Inhibit control pin.
The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be
turned off.
The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VI with respect to GND.
Figure 23 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input
has its own internal pull-up. An external pull-up resistor should never be used with the inhibit pin. The input is
not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for
control.
VI
2
VI
PTH08T240W/241W
11
Inhibit/
UVLO
GND
3,4
CI
1 = Inhibit
Q1
BSS 138
GND
Figure 23. On/Off Inhibit Control Circuit
Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then
turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within
15 ms. Figure 24 shows the typical rise in both the output voltage and input current, following the turn-off of Q1.
The turn off of Q1 corresponds to the rise in the waveform, VINH. The waveforms were measured with a 10-A
constant current load.
VO (2 V/div)
II (2 A/div)
VINH (2 V/div)
t − Time − 4 ms/div
Figure 24. Power-Up Response from Inhibit Control
24
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Overcurrent Protection
For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that
exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown,
the module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup
mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the
load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once
the fault is removed, the module automatically recovers and returns to normal operation.
Overtemperature Protection (OTP)
A thermal shutdown mechanism protects the module’s internal circuitry against excessively high temperatures. A
rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the
internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns
the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The
recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases
by about 10°C below the trip point.
The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator.
Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term
reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits
for the worst-case conditions of ambient temperature and airflow.
Differential Output Voltage Remote Sense
Differential remote sense improves the load regulation performance of the module by allowing it to compensate
for any IR voltage drop between its output and the load in either the positive or return path. An IR drop is caused
by the output current flowing through the small amount of pin and trace resistance. With the sense pins
connected, the difference between the voltage measured directly between the VO and GND pins, and that
measured at the Sense pins, is the amount of IR drop being compensated by the regulator. This should be
limited to a maximum of 0.3 V. Connecting the +Sense (pin 6) to the positive load terminal improves the load
regulation at the connection point. For optimal behavior the –Sense (pin 7) must be connected to GND (pin 4)
close to the module (within 10 cm).
If the remote sense feature is not used at the load, connect the +Sense pin to VO (pin 5) and connect the
–Sense pin to the module GND (pin 4).
The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency
dependent components that may be placed in series with the converter output. Examples include OR-ing
diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense
connection they are effectively placed inside the regulation control loop, which can adversely affect the
stability of the regulator.
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Smart Sync
Smart Sync is a feature that allows multiple power modules to be synchronized to a common frequency. Driving
the Smart Sync pins with an external oscillator set to the desired frequency, synchronizes all connected modules
to the selected frequency. The synchronization frequency can be higher or lower than the nominal switching
frequency of the modules within the range of 240 kHz to 400 kHz (see Electrical Specifications table for
frequency limits). Synchronizing modules powered from the same bus, eliminates beat frequencies reflected
back to the input supply, and also reduces EMI filtering requirements. Eliminating the low beat frequencies
(usually < 10 kHz) allows the EMI filter to be designed to attenuate only the synchronization frequency. Power
modules can also be synchronized out of phase to minimize source current loading and minimize input
capacitance requirements. Figure 25 shows a standard circuit with two modules syncronized 180° out of phase
using a D flip-flop.
0
o
Track SYNC
VI = 5 V
TT
+Sense
VI
VO1
VO
PTH08T220W
SN74LVC2G74
–Sense
INH / UVLO
GND
VOAdj
Vcc
CLR
PRE
CLK
Ci1
330 mF
Q
RSET1
C o1
220 mF
fclock = 2 X fmodules
D
Q
GND
GND
180
o
Track SYNC
TT
+Sense
VI
VO2
VO
PTH08T240W
INH / UVLO
–Sense
GND
VOAdj
Ci2
220 mF
RSET2
Co2
220 mF
GND
Figure 25. Smart Sync Schematic
26
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The maximum input voltage allowed for proper synchronization is duty cycle limited. When using Smart Sync,
the maximum allowable input voltage varies as a function of output voltage and switching frequency.
Operationally, the maximum input voltage is inversely proportional to switching frequency. Synchronizing to a
higher frequency causes greater restrictions on the input voltage range. For a given switching frequency,
Figure 26 shows how the maximum input voltage varies with output voltage.
For example, for a module operating at 400 kHz and an output voltage of 1.2 V, the maximum input voltage is
10 V. Exceeding the maximum input voltage may cause in an increase in output ripple voltage and increased
output voltage variation.
As shown in Figure 26, input voltages below 6 V can operate down to the minimum output voltage over the
entire synchronization frequency range. See the Electrical Characteristics table for the synchronization
frequency range and pulse limits.
INPUT VOLTAGE
vs
OUTPUT VOLTAGE
15
14
VI − Input Voltage − V
13
12
11
fSW = 400 kHz
10
9
fSW = 350 kHz
8
fSW = 300 kHz
7
fSW = 240 kHz
6
5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
VO − Output Voltage − V
Figure 26.
Auto-Track™ Function
The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track
was designed to simplify the amount of circuitry required to make the output voltage from each module power up
and power down in sequence. The sequencing of two or more supply voltages during power up is a common
requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP
family, microprocessors, and ASICs.
How Auto-Track™ Works
Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1).
This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is
raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin
of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the
regulated output does not go higher than 2.5 V.
When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a
volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow
a common signal during power up and power down. The control signal can be an externally generated master
ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input
incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable
rising waveform at power up.
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PTH08T240W, PTH08T241W
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
Typical Sequencing Application
The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track
compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the
same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common
Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage
supervisor IC. See U3 in Figure 27.
To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be
done at or before input power is applied to the modules. The ground signal should be maintained for at least
20 ms after input power has been applied. This brief period gives the modules time to complete their internal
soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC,
that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power
up.
Figure 27 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced
power up of PTH08T240/241W modules. The output of the TL7712A supervisor becomes active above an input
voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the input voltage
has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately
28 ms after the input voltage has risen above U3's voltage threshold, which is 4.3 V. The 28-ms time period is
controlled by the capacitor CT. The value of 2.2 µF provides sufficient time delay for the modules to complete
their internal soft-start initialization. The output voltage of each module remains at zero until the track control
voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises.
This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches
its respective set-point voltage.
Figure 28 shows the output voltage waveforms after input voltage is applied to the circuit. The waveforms, VO1
and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively.
VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic.
The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage
threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts,
forcing the output of each module to follow, as shown in Figure 29. Power down is normally complete before the
input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the
modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage
applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is
limited by the Auto-Track slew rate capability.
Notes on Use of Auto-Track™
1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module
regulates at its adjusted set-point voltage.
2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp
speeds of up to 1 V/ms.
3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI.
4. The module cannot follow a voltage at its track control input until it has completed its soft-start
initialization. This takes about 20 ms from the time that a valid voltage has been applied to its input.
During this period, it is recommended that the Track pin be held at ground potential.
5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When
Auto-Track is disabled, the output voltage rises according to its softstart rate after input power has been
applied.
6. The Auto-Track pin should never be used to regulate the module's output voltage for long-term,
steady-state operation.
28
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www.ti.com
SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
RTT1
U1
AutoTrack TurboTrans
Smart
+Sense
Sync
VI = 12 V
VI
VO
PTH08T240W
VO1 = 3.3 V
Inhibit/
UVLO Prog
−Sense
VOAdj
GND
+
CO1
CI1
U3
7
2
1
3
RSET1
1.62 kW
8
V CC
SENSE
RESET
5
RESIN
TL7712A
REF
RESET
6
AutoTrack TurboTrans
Smart
+Sense
Sync
GND
4
CREF
0.1 mF
CT
2.2 mF
RTT2
U2
CT
RRST
10 kW
VI
VO
PTH08T220W
Inhibit/
UVLO Prog
VO2 = 1.8 V
−Sense
GND
VOAdj
+
CO2
CI2
RSET2
4.75 kW
Figure 27. Sequenced Power Up and Power Down Using Auto-Track
VTRK (1 V/div)
VTRK (1 V/div)
VO1 (1 V/div)
VO1 (1 V/div)
VO2 (1 V/div)
VO2 (1 V/div)
t − Time − 20 ms/div
t − Time − 400 ms/div
Figure 28. Simultaneous Power Up
With Auto-Track Control
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Figure 29. Simultaneous Power Down
With Auto-Track Control
29
PTH08T240W, PTH08T241W
www.ti.com
SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
Prebias Startup Capability
A prebias startup condition occurs as a result of an external voltage being present at the output of a power
module prior to its output becoming active. This often occurs in complex digital systems when current from
another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another
path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can
cause problems with power modules that incorporate synchronous rectifiers. This is because under most
operating conditions, these types of modules can sink as well as source output current.
The PTH family of power modules incorporate synchronous rectifiers, but does not sink current during startup(1),
or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain
conditions must be maintained(2). Figure 30 shows an application demonstrating the prebias startup capability.
The startup waveforms are shown in Figure 31. Note that the output current (IO) is negligible until the output
voltage rises above the voltage backfed through the intrinsic diodes.
The prebias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it
sinks current if the output voltage is below that of a back-feeding source. To ensure a pre-bias hold-off one of
two approaches must be followed when input power is applied to the module. The Auto-Track function must
either be disabled(3), or the module’s output held off (for at least 50 ms) using the Inhibit pin. Either approach
ensures that the Track pin voltage is above the set-point voltage at start up.
1. Startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the
rise of the output voltage under the module’s internal soft-start control. Startup is complete when the
output voltage has risen to either the set-point voltage or the voltage at the Track pin, whichever is
lowest.
2. To ensure that the regulator does not sink current when power is first applied (even with a ground signal
applied to the Inhibit control pin), the input voltage must always be greater than the output voltage
throughout the power-up and power-down sequence.
3. The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s
Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the
Track pin to VI.
3.3 V
VI = 5 V
Track
VI
+Sense
PTH08T240W
Inhibit GND
Vadj
Vo = 2.5 V
VO
Io
-Sense
VCCIO
VCORE
+
+
+
CI
CO
RSET
2.37 kW
ASIC
Figure 30. PreBias Startup Application Circuit
30
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
VIN (1 V/div)
VO (1 V/div)
IO (2 A/div)
t - Time - 4 ms/div
Figure 31. Prebias Startup Waveforms
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PTH08T240W, PTH08T241W
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SLTS264E – NOVEMBER 2005 – REVISED FEBRUARY 2007
TAPE & REEL AND TRAY
32
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PACKAGE OPTION ADDENDUM
www.ti.com
31-Jan-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
PTH08T240WAD
ACTIVE
DIP MOD
ULE
EBS
11
49
Pb-Free
(RoHS)
Call TI
N / A for Pkg Type
PTH08T240WAH
ACTIVE
DIP MOD
ULE
EBS
11
49
TBD
Call TI
N / A for Pkg Type
PTH08T240WAS
ACTIVE
DIP MOD
ULE
EBT
11
49
TBD
Call TI
N / A for Pkg Type
PTH08T240WAST
ACTIVE
DIP MOD
ULE
EBT
11
250
TBD
Call TI
N / A for Pkg Type
PTH08T240WAZ
ACTIVE
DIP MOD
ULE
BBT
11
49
Pb-Free
(RoHS)
Call TI
Level-3-260C-168 HR
PTH08T240WAZT
ACTIVE
DIP MOD
ULE
BBT
11
250
Pb-Free
(RoHS)
Call TI
Level-3-260C-168 HR
PTH08T241WAD
ACTIVE
DIP MOD
ULE
EBS
11
49
Pb-Free
(RoHS)
Call TI
N / A for Pkg Type
PTH08T241WAS
ACTIVE
DIP MOD
ULE
EBT
11
49
TBD
Call TI
Level-1-235C-UNLIM
PTH08T241WAST
ACTIVE
DIP MOD
ULE
EBT
11
250
TBD
Call TI
Level-1-235C-UNLIM
PTH08T241WAZ
ACTIVE
DIP MOD
ULE
BBT
11
49
Pb-Free
(RoHS)
Call TI
Level-3-260C-168 HR
PTH08T241WAZT
ACTIVE
DIP MOD
ULE
BBT
11
250
Pb-Free
(RoHS)
Call TI
Level-3-260C-168 HR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
31-Jan-2007
to Customer on an annual basis.
Addendum-Page 2
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