TESDO5V0A Ultra Low Capacitance ESD Protection Array Small Signal Diode MSOP-10 A Features F E B Meet IEC61000-4-2 (ESD) ±15kV (air), ±8kV (contact) Meet IEC61000-4-4 (EFT) rating. 40A (5/50ήs) C Meet IEC61000-4-5 (Lightning) rating. 5A (8/20μs) Protects four high speed I/O lines Low working Voltage : 5V C D Pb free version, RoHS compliant, and Halogen free Mechanical Data Unit (mm) Dimensions Case : MSOP-10 small outline plastic package Unit (inch) Min Max Min Max Terminal: Matte tin plated, lead free, solderable per MIL-STD-202, Method 208 guaranteed A 2.90 3.10 0.114 0.122 B 2.90 3.10 0.114 0.122 High temperature soldering guaranteed: 260°C/10s C Polarity : Indicated by cathode band D 0.17 0.27 0.50REF Weight : 12mg (Appro.) E Marking Code : R0544 F Ordering Information Part No. Package Packing TESDO5V0A MSOP-10 3K / 7" Reel 0.007 0.011 0.020REF 0.193REF 4.9REF - 1.11 - 0.044 Pin Configuration Packing Code ROG Marking R0544 Maximum Ratings and Electrical Characteristics Rating at 25°C ambient temperature unless otherwise specified. 10 NC 7 8 9 NC VCC NC 6 NC 1 IO# 2 3 4 5 IO# GND IO# IO# Maximum Ratings Symbol Value Units Peak Pulse Power (tp=8/20μs waveform) PPP 125 W Peak Pulse Current (tp = 8/20μs) IPP 5 A ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) VESD ±15 ±18 KV Type Number TJ, TSTG Junction and Storage Temperature Range . -55 to + 150 °C . Electrical Characteristics Type Number Reverse Stand-Off Voltage Reverse Breakdown Volta IR= Reverse Leakage Current VR= IPP= IPP= Clamping Voltage Junction Capacitance 1mA 5V 1A 5A VR=0V, f=1.0MHz Symbol VRWM Min - V(BR) 6 - V IR - 1 15 20 uA Vc CJ Max 5 1(Typ.) Units V V pF Version : A11 TESDO5V0A Ultra Low Capacitance ESD Protection Array Small Signal Diode Rating and Characteristic Curves FIG 1 Non-Repetitive Peak Pulse Power vs. Pulse Time FIG 2 Pulse Waveform 10 110 Waveform Parameters: tr = 8μs, td = 20μs 90 Percent of IPP Peak Pulse Power Ppp (KW) 100 80 1 70 60 50 e 40 0.1 30 -1 td=Ipp/2 20 10 0 0.01 0.1 1 10 100 0 1000 5 10 FIG 3 Admissible Power Dissipation Curve 20 25 30 FIG 4 Typical Junction Capacitance 1 150 Normalized Capacitance 125 Power Rating (%) 15 Time (us) Pulse Duration (us) 100 75 50 25 0.8 0.6 0.4 0.2 f = 1.0MHz 0 0 0 20 40 60 80 100 120 140 160 180 0 1 2 3 4 5 Reverse Voltage (V) o Ambient Tempeatature ( C) FIG 5 Clamping Voltage vs. Peak Pulse Current Clamping Voltage (V) 20 16 12 8 4 Waveform Parameters: tr = 8μs, td = 20μs 0 0 1 2 3 4 5 Peak Pulse Current (A) Version : A11 TESDO5V0A Ultra Low Capacitance ESD Protection Array Small Signal Diode Applications Information Designed for protection of high-speed interfaces such as HDMI Ultra low capacitance between the pairs while being rated to handle >±8kV ESD contact discharges and >±15kV air discharge Each device is in a leadless package that is less than 1.1mm wide Designed such that the traces flow straight through the device, The narrow package and flow-through design reduces discontinuities and minimizes impact on signal integrity TESDO5V0A is ultra low capacitance ESD protection array designed to protect high speed data interfaces The combination of small size, low capacitance, and high level of ESD protection makes them a flexible solution for applications of high speed interface, ex HDMI, DisplayPortTM, MDDI, and eSATA interfaces. Circuit Board Layout Recommendations for HDMI application The PCB traces are used to connect the pin pairs for each line (pin 1 to pin 10, pin 2 to pin 9, pin 4 to pin 7, pin 5 to pin 6) Signal line enters at pin 1 and exits at Pin 10 and the PCB trace connects pin 1 and 10 together. Ground is connected at pins 3 and 8. One large ground pad should be used in lieu of two separate pads TESDO5V0A TMDS D2+ TMDS_GND 1 10 TMDS D2- 2 9 3 8 4 7 5 6 1 10 2 9 3 8 TMDS CLK TMDS GND 4 7 TMDS_CLK- 5 6 TMDS D1+ TMDS_GND HDMI Connector TMDS D1- TMDS D0+ TMDS GND TMDS_D0- TESDOV0A CEC N/C DDC CLK DDC DAT GND +5V Hot Plug Detection TESDS5V0A Version : A11 TESDO5V0A Ultra Low Capacitance ESD Protection Array Small Signal Diode Tape & Reel specification Item TSC label Symbol Dimension (mm) Carrier depth K 1.22 Max. Sprocket hole D 1.50 +0.10 Reel outside diameter A 180 ± 1 Top Cover Tape Carieer Tape Any Additional Label (If Required) 10 Pitches Cumulative Tolerance on Tape ±2.0mm ( ±0.008") P0 D P1 T E Reel inner diameter D1 50 Min. Feed hole width D2 13.0 ± 0.5 Sprocke hole position E 1.75 ±0.10 Sprocke hole pitch P0 4.00 ±0.10 Embossment center P1 2.00 ±0.10 Overall tape thickness T 0.6 Max. Tape width W 8.30 Max. Reel width W1 14.4 Max. Dimensions Unit (inch) Unit (mm) A 0.161 4.10 B 0.012 0.30 C 0.020 0.50 D 0.063 1.60 E 0.098 2.50 F 0.224 5.70 F K0 W BB0 0 B1 D' Top Cover Tape See Note1 K For Components 2.0mm X 1.2mm and Larger A0 Center Lines of Cavity Embossment For Machine Reference Only Including Draft and RADLL Concentric Around B 0 W1 A D2 D1 Direction of Feed Suggested PAD Layout D A E F C B Note 1: A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min. to 0.5 mm max. The component cannot rote more than 10o within the determined cavity. Note 2: If B1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. Note 3: The suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary despending on application. Version : A11