TS4268 180mA Fixed-Voltage Ultra Low LDO SOP-8 Pin Definition: 1. IN 8. OUT 2. N/C 7. WI 3. RO 6. RADJ 4. GND 5. RD General Description TS4268 is a 5V low-drop fixed-voltage regulator. The maximum input voltage is 45 V. It can deliver an output current of at least 180mA. TS4268 is short-circuit proof and features temperature protection that disables the circuit in the event of impermissibly high temperatures. The watchdog function is disabled as a function of the load, so that a controller is not interrupted during sleep mode by a watchdog reset. Application Description TS4268 regulates an input voltage in the range 5.5V ~ 45V. In the event of an output voltage Vout < VRT, a reset signal is generated. The wiring of the reset switching threshold input enables the value of VRT to be reduced. The reset delay time can be adjusted using an external capacitor. The integrated watchdog monitors the connected active controller. If there is no positive-going edge at the watchdog input, the reset output is set to low. The reset delay capacitor provides a wide adjustment range for the pulse repetition time. The watchdog function is only activated if the load exceeds 8mA. This ensures that a microcontroller is not activated during power-down and the current drain is not increased. The IC is protected against overload and over temperature. Features ● ● ● ● ● ● ● ● ● ● Ordering Information Output voltage tolerance <±2% Very low current consumption Low-drop voltage Watchdog Settable reset threshold Over temperature protection Reverse polarity protection Short-circuit proof Suitable for use in automotive electronics Wide temperature range Part No. TS4268CS50 RL Package Packing SOP-8 2.5Kpcs / 13” Reel Pin Description Pin No. Symbol 1 2 IN N/C 3 RO 4 GND 5 RD 6 RADJ 7 WI 8 OUT Pin Description Input Voltage. block to ground directly with ceramic capacitor Not Connected Reset Output. the open collector output is connected to the 5V output via an integrated resistor of 30kΩ Ground Reset Delay. connect a capacitor to ground for delay time adjustment. Reset Switching Threshold. for setting the switching threshold, output to ground with voltage divider. If this input is connected to ground, the reset is triggered at an output voltage of 4.5V. Watchdog Input. positive-edge-triggered input for monitoring a microcontroller. Output Voltage. block to ground with 22uF capacitor, ESR <3Ω 1/7 Version: B07 TS4268 180mA Fixed-Voltage Ultra Low LDO Absolute Maximum Ratings Parameter Symbol min. max. Unit Input voltage VIN -30 45 V Input current IIN Notes Input Internally limited Reset Output Voltage VRES Current IRES -0.3 7 V Internally limited Reset Delay Voltage VRD Current IRD -0.3 7 V Internally limited Watchdog Watchdog input VWI -0.3 7 V VRT -0.3 7 V Output voltage VOUT -0.3 7 V Output current IOUT Reset Input Reset threshold Output Internally limited Ground Current IQ -100 50 Junction temperature TJ -40 150 Storage temperature TSTG -50 150 Symbol min. max. Input voltage VIN -- 45 Junction temperature TJ -40 150 Symbol min. max. Junction to ambient (soldered) RθJA -- 185 Junction pin RθJP -- 72 mA Temperatures ºC Operation Range Parameter Unit Notes ºC Thermal Resistance Parameter Unit ºC/W Notes (note 1) (note 2) 1. Package mounted on PCB 80 x 80 x 1.5mm3, footprint only, zero airflow. 2. Measure to pin 2 Operation at up to the maximum junction temperature of 150ºC is possible in principle. Note, however, operation at the maximum permitted rating could be affected the reliability of the device. 2/7 Version: B07 TS4268 180mA Fixed-Voltage Ultra Low LDO Electrical Characteristics (Vin=13.5V, -40≤TJ≤125ºC, unless otherwise specified.) Parameter Test Conditions Min Typ Max Unit Output Voltage 5mA ≤ IL ≤ 150mA, 6V ≤ VIN ≤ 28V 4.90 5.00 5.10 V Current Limit VOUT = 0 180 250 -- mA IQ= 0mA -- 300 400 uA IQ= 100mA -- 13 20 mA Dropout Voltage (note 1) IL=150mA -- 250 500 mV Line Regulation 6V≤ VIN ≤28V, IL=150mA -- 10 30 mV Load Regulation 5mA≤ IL ≤150mA -- 10 30 mV Reset threshold 4.20 4.50 4.80 V Reset adjust threshold 1.28 1.35 1.45 V Quiescent Current Reset Function Reset low voltage 1mA external -- 0.20 0.50 V Saturation voltage VOUT < VRT -- 0.03 0.10 V Charging current VRD < 1.0V 5 12 18 uA 1.4 1.8 2.2 V Upper reset timing threshold Reset delay time CRD = 100nF 10 15 25 mS Reset reaction time CRD = 100nF -- 2 -- uS Pull-up With resp. to VOUT 18 30 46 KΩ 0.20 0.40 0.55 V Lower reset timing threshold Watchdog Input Discharge current VRD < 1.0V 1.5 3.5 5.2 uA Charging current VRD < 1.0V 5 12 18 uA Upper timing threshold 1.4 1.8 2.2 V Lower timing threshold 0.20 0.40 0.55 V Watchdog period CRD = 100nF 30 55 75 mS Watchdog trigger time CRD = 100nF 25 40 60 mS Activating current Activates watchdog 2 8 15 mA Slew rate from 20% up to 80% VOUT 5 -- -- V/us Note 1: Drop voltage = VIN-VOUT (measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input) Note 2: The reset output is low in range from VOUT = 1V to VOUT,RT 3/7 Version: B07 TS4268 180mA Fixed-Voltage Ultra Low LDO Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If The externally scaled down output voltage at the reset threshold input drops below 1.35 V, the external reset delay capacitor is discharged by the reset generator. If the voltage on the capacitor reaches the lower threshold VST, a reset signal is generated on the reset output and not cancelled again until the upper threshold voltage is exceeded. If the reset threshold input is connected to GND, reset is triggered at an output voltage of 4.5 V. A connected microcontroller is monitored by the watchdog logic. If pulses are missing, the rest output is set to low. The pulse sequence time can be set within a wide range with the reset delay capacitor. TS4268 is also incorporates a member of internal circuits for protection against: • Over load • Over temperature • Reverse polarity Block Diagram 4/7 Version: B07 TS4268 180mA Fixed-Voltage Ultra Low LDO Test Circuit Reset Timing The power-on reset delay time is defined by charging time of an external capacitor CD which can be calculated as follow: CD = ( ∆trd x ID,C ) / ∆V Definitions: CD = delay capacitor ∆trd = delay time ID,C = charge current, typical 12uA ∆V = VDU, typical 1.8 V VDU = upper delay switching threshold at CD for reset delay time The reset reaction time trr is the time it takes the voltage regulator to set the reset out LOW after the output voltage has dropped below the reset threshold. It is typically 1uS for delay capacitor of 47nF. For other values for CD the reaction time can be estimated using the following equation: Trr ≈ 20 s/F x CD 5/7 Version: B07 TS4268 180mA Fixed-Voltage Ultra Low LDO Timing (Watchdog Disabled) Timing (Watchdog Function) 6/7 Version: B07 TS4268 180mA Fixed-Voltage Ultra Low LDO Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. 7/7 Version: B07