ETC US1881

Features and Benefits
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Chopper stabilized amplifier stage
Optimized for BDC motor applications
New miniature package / thin, high reliability package
Operation down to 3.5V
CMOS for optimum stability, quality and cost
Applications
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Solid state switch
Brushless DC motor commutation
Speed sensing
Linear position sensing
Angular position sensing
Current sensing
Ordering Information
Part No.
Temperature Suffix
Package
US1881
E ( -40oC to 85oC )
SO (SOT-23) or UA (TO-92 flat)
US1881
L ( -40oC to 150oC )
SO (SOT-23) or UA (TO-92 flat)
*Contact factory or sales representative for legacy temperature options
Functional Diagram
VDD
Description
The US1881 is the industry’s first Hall integrated
circuit in a SOT-23 package. The US1881 is a
bipolar Hall effect sensor IC fabricated from mixed
signal CMOS technology. It incorporates advanced
chopper stabilization techniques to provide accurate
and stable magnetic switch points. There are many
applications for this HED in addition to those listed
above. The design, specifications and performance
have been optimized for commutation applications in
5V and 12V brushless DC motors.
Output
Voltage
Regulator
Chopper
The output transistor will be latched on (BOP) in the
presence of a sufficiently strong South pole
magnetic field facing the marked side of the
package. Similarly, the output will be latched off
(BRP) in the presence of a North field.
GND
UA Package
Pin 1 - VDD
Pin 2 - GND
Pin 3 - Output
SO Package
Pin 1 - VDD
Pin 2 - Output
Pin 3 - GND
The SOT-23 device is reversed from the UA
package. The SOT-23 output transistor will be
latched on in the presence of a sufficiently strong
North pole magnetic field applied to the marked
face.
Note: Static sensitive device; please observe ESD precautions.
Reverse VDD protection is not included. For reverse voltage
protection, a 100W resistor in series with VDD is recommended.
3901001881
Rev. 012
Page 1
Aug/02
US1881 Electrical Specifications
DC Operating Parameters: TA = 25, VDD = 12VDC (unless otherwise specified).
Parameter
Symbol Test Conditions
Min
Supply Voltage
VDD
Operating
3.5
Supply Current
IDD
B<BOP
1.1
Saturation Voltage
VDS(on)
Output Leakage
Max
Units
24
V
2.5
5.0
mA
IOUT = 20 mA, B>BOP
0.4
0.5
V
IOFF
B<BRP, VOUT = 24V
0.01
10.0
A
Output Rise Time
tr
VDD = 12V, RL = 1.1K , CL = 20pf
0.04
s
Output Fall Time
tf
VDD = 12V, RL = 1.1K , CL = 20pf
0.18
s
Typ
US1881 Magnetic Specifications
Parameter
Symbol Test Conditions
Min
Typ
Max
Units
Operating Point
BOP
EUA,ESO,LUA,LSO 25°C, Vdd=3.5 & 24 volts DC
1.0
5.0
9.0
mT
Release Point
BRP
EUA,ESO,LUA,LSO 25°C, Vdd=3.5 & 24 volts DC
-9.0
-5.0
-1.0
mT
Hysteresis
Bhys
EUA,ESO,LUA,LSO 25°C, Vdd=3.5 & 24 volts DC
7.0
10.0
12.0
mT
Operating Point
BOP
EUA, ESO 85°C, Vdd=3.5 & 24 volts DC
0.5
5.0
9.5
mT
Release Point
BRP
EUA, ESO 85°C, Vdd=3.5 & 24 volts DC
-9.5
-5.0
-0.5
mT
Hysteresis
Bhys
EUA, ESO 85°C, Vdd=3.5 & 24 volts DC
7.0
10.0
12.0
mT
Operating Point
BOP
LUA, LSO 150°C, Vdd=3.5 & 24 volts DC
0.5
5.0
9.5
mT
Release Point
BRP
LUA, LSO 150°C, Vdd=3.5 & 24 volts DC
-9.5
-5.0
-0.5
mT
Hysteresis
Bhys
LUA, LSO 150°C, Vdd=3.5 & 24 volts DC
6.0
10.0
12.5
mT
3901001881
Rev. 012
Page 2
Aug/02
Performance Graphs
Typical Magnetic Switch Points
vs. Vdd
Typical Magnetic Switch Points
versus
Temperature
1881
12.5
10.0
1881
12
BHYS
7.5
5.0
2.5
Flux Density (mT)
Field Strength (mT)
7.5
0.0
-2.5
-5.0
BOP
2.5
-2.5
BRP
-7.5
-7.5
-10.0
-12.5
0
10
20
30
-12.5
-40
40
0
40
80
12
0
16
0
20
0
Temperature (o C)
Vdd (V)
Min/Max Magnetic Switch Range
versus
Temperature
Output Voltage
versus
Flux Density
1881
12.5
1881
30
B OP Max
7.5
VDD
2.5
B OPMin
-2.5
Output Voltage (V)
Flux Density (mT)
24
BRP Max
18
B OP
12
B RP
-7.5
BRP Min
6
Vout
-12.5
-40
0
40
80
12
0
16
0
20
0
0
Temperature (o C)
-30
-20
-10
0
10
20
30
Flux Density (mT)
3901001881
Rev. 012
Page 3
Aug/02
Power Dissipation
versus
Temperature
All Devices
500
All Devices
280
400
260
Solder Temperature (o C)
Package Power Dissipation (mW)
Wave Soldering
Parameters
UA Package
RθJA =206oC/W
300
200
100
240
220
200
SO Package
RθJA =575oC/W
0
-40
0
40
80
12
0
16
0
20
0
0
Temperature (o C)
5
1
0
1
5
2
0
2
5
3
0
Time in Wave Solder (Seconds)
Absolute Maximum Ratings
Supply Voltage (Operating), VDD
Supply Current (Fault), IDD
Output Voltage, VOUT
Output Current (Fault), IOUT
Power Dissipation, PD
Operating Temperature Range, TA
Storage Temperature Range, TS
Maximum Junction Temp,TJ
3901001881
Rev. 012
3.5V to 24V
50mA
3.5V to 24V
50mA
100mW
-40 to 150°C
-65°C to 150°C
175°C
Page 4
Aug/02
Performance Graphs
Typical Saturation Voltage
versus
Temperature
V DD = 12 V, I OUT = 20mA
Typical Supply Current
versus
Supply Voltage
1881
5
4
400
VDS( ON)
TA = -40o C
VDS(ON) (mV)
Supply Curre nt (mA)
1881
500
3
T A = 25oC
2
300
200
TA = 125o C
1
100
0
0
0
5
10
15
20
25
30
-40
0
40
80
120
160
200
Temperature (oC)
Supply Voltage (V)
Unique Features
CMOS Hall IC Technology
The chopper stabilized amplifier uses switched
capacitor techniques to eliminate the amplifier
offset voltage, which, in bipolar devices, is a
major source of temperature-sensitive drift.
CMOS makes this advanced technique possible.
The CMOS chip is also much smaller than a
bipolar chip, allowing very sophisticated circuitry
to be placed in less space. The small chip size
also contributes to lower physical stress and less
power consumption.
EMC conditions, use the application circuit on the
following page.
Installation
Consider Temperature Coefficients of Hall IC and
magnetics, as well as air gap and life time
variations. Observe ESD control procedures.
Observe temperature limits during wave
soldering.
Applications
If reverse supply protection is desired, use a
resistor in series with the VDD pin that will limit the
Supply Current (Fault), IDD, to 50 mA. For severe
3901001881
Rev. 012
Page 5
Aug/02
Applications Examples
Automotive and Severe
Environment Protection Circuit
Two Wire Optional Current
Biasing Circuit
R1 100 Ω
D1
Z1
C1
Supply
Voltage
V
DD
OUT
Hall IC
RL
I IN
Iout
RL
1.2K
IDD
V DD
4.7nF
C2
4.7nF
Rb
VSS
Hall
IC
The resistors Rb and RL can be used to bias the input current, Iin. Refer
to the part specification for limiting values. This circuit will help in getting
the precise ON and OFF currents desired.
B RP = Ioff = (VDD / Rb + IDD )
B OP = Ion = (Ioff + VDD / RL )
3901001881
Rev. 012
Page 6
Aug/02
Physical Characteristics
UA Package Dimensions
45 o
Typical
1.60
1.40
2.13
1.87
4.30
3.90
0.84
0.63
UA Hall Plate / Chip Location
0.45
0.41
5o
Typical
2.64
2.34
1.53
1.27
U18 *
805
3.20
2.80
Marked
Surface
0.48
0.43
1.75
1.55
All Dimensions in millimeters
0.38
Typical
(see note 3)
0.20
0.00
0.41
0.35
1
2
3
NOTES:
1.) Controlling dimension: mm
2.) Leads must be free of flash and
plating voids
3.) Do not bend leads within 1mm of
the lead to package interface.
4.) Package dimensions exclude
molding flash
5.) Tolerance is 0.254mm unless
otherwise specified
Line 2:
1st digit (8)
2nd and 3rd digits(05)
= Year (1998)
= Week of Year
0.50
0.35
0.20
MIN
3
*
1651
1
V DD
GND
Output
0.41
0.35
2.57
2.51
SOT-23 Package Dimensions
(Top View)
1.80
1.50
chip
0.66
0.56
2
2.10
1.70
0.25
0.10
Pin #
3.10
2.70
0.10
0.00
3901001881
Rev. 012
= Supplier (Melexis)
= Series (1880)
PINOUT:
Pin 1
Pin 2
Pin 3
1.30
1.24
3.00
2.60
15.0
14.0
* MARKING:
Line 1:
1st digit (U)
2nd and 3rd digits (18)
0.90
0.70
NOTES:
1. MARKING:
1st Digit (1)
= Series (1880)
2nd Digit(6)
= Year - 1996
Last Digits (51) = Week of Year
2. PINOUT (See Top View at left):
Pin 1
VDD
Pin 2
Output
Pin 3
GND
3. Controlling dimension: mm.
4. Lead thickness after solder plating will be 0.254
mm maximum.
5. Package dimensions exclude molding flash.
6. The end flash shall not exceed 0.127 mm on each
side of package.
7. Tolerance is +/- 0.254 mm unless otherwise
specified.
SOT-23 Hall Plate /
Chip Location
(Bottom View)
0.95
0.85
1.55
1.45
1.30
1.00
Page 7
Aug/02
Reliability Information
Melexis devices are classified and qualified regarding suitability for infrared, vapor phase and
wave soldering with usual (63/37 SnPb-) solder (melting point at 183degC).
The following test methods are applied:
IPC/JEDEC J-STD-020A (issue April 1999)
Moisture/Reflow Sensitivity Classification For Nonhermetic Solid State Surface Mount Devices
CECC00802 (issue 1994)
Standard Method For The Specification of Surface Mounting Components (SMDs) of Assessed
Quality
MIL 883 Method 2003 / JEDEC-STD-22 Test Method B102
Solderability
For all soldering technologies deviating from above mentioned standard conditions (regarding
peak temperature, temperature gradient, temperature profile etc) additional classification and
qualification tests have to be agreed upon with Melexis.
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding
assurance of adhesive strength between device and board.
For more information on manufacturability/solderability see quality page at our website:
http://www.melexis.com/
ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD).
Always observe Electro Static Discharge control procedures whenever handling semiconductor
products.
3901001881
Rev. 012
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Aug/02
Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with
Melexis for current information. This product is intended for use in normal commercial applications.
Applications requiring extended temperature range, unusual environmental requirements, or high
reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall
not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental
or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall
arise or flow out of Melexis’ rendering of technical or other services.
© 2002 Melexis NV. All rights reserved.
For the latest version of this document, go to our website at:
www.melexis.com
Or for additional information contact Melexis Direct:
Europe and Japan:
All other locations:
Phone: +32 13 67 04 95
E-mail: [email protected]
Phone: +1 603 223 2362
E-mail: [email protected]
QS9000, VDA6.1 and ISO14001 Certified
3901001881
Rev. 012
Page 9
Aug/02