US4881 CMOS Low Voltage High Sensitivity Latch Preliminary Datasheet Features and Benefits • • • • • • y r a in il m e r P Chopper stabilized amplifier stage Optimized for BDC motor applications New miniature package / thin, high reliability package Operation down to 2.2V CMOS for optimum stability, quality, and cost Low IDD current Applications • • • Solid state switch Brushless DC motor commutation Speed sensing Ordering Information Part No. US4881 US4881 Temperature Suffix Package Temperature Range E SO or UA -40 to 85oC Extended L SO or UA -40 to 150oC Automotive Contact factory or sales representative for legacy temperature code options Functional Diagram V DD Description The US4881 is a bipolar Hall effect sensor IC fabricated from mixed signal CMOS technology. It incorporates advanced chopper stabilization techniques to provide accurate and stable magnetic switch points. There are many applications for this HED in addition to those listed above. The design specifications and performance have been optimized for commutation applications in brushless DC motors and automotive speed sensing. Output Voltage Regulator The output transistor will be latched on (BOP) in the presence of a sufficiently strong South pole magnetic field facing the marked side of the package. Similarly, the output will be latched off (BRP) in the presence of a North field. Chopper GND UA Package Pin 1 - V D D Pin 2 - GND Pin 3 - Output The SOT-23 device is reversed from the UA package. The SOT-23 output transistor will be latched on (BOP) in the presence of a sufficiently strong North pole magnetic field subjected to the marked face. SO Package Pin 1 - VD D Pin 2 - Output Pin 3 - GND Note: Static sensitive device; please observe ESD precautions. Re verse VDD protection is not included. For reverse voltage protec tion, a 100Ω resistor in series with VDD is recommended. US4881 CMOS Low Voltage High Sensitivity Latch 3901004881 Rev 1.5 24/July/01 Page 1 US4881 CMOS Low Voltage High Sensitivity Latch US4881 Electrical Specifications DC operating parameters: TA = 25oC, VDD = 12VDC (unless otherwise specified). Parameter Supply Voltage Symbol Test Conditions VDD Operating Min 2.2 Typ Max 18 Units V Supply Current IDD B<BOP 1.5 2.5 4.0 mA Saturation Voltage VDS(on) IOUT = 20 mA, B>BOP 0.4 0.5 V Output Leakage IOFF B<BRP, VOUT = 18V 0.01 5.0 ìA Output Rise Time tr VDD = 12V, RL = 1.1KÙ, CL = 20pf 0.04 ìs Output Fall Time tf VDD = 12V, RL = 1.1KÙ, CL = 20pf 0.18 ìs US4881 Magnetic Specifications DC operating parameters: TA = 25oC, VDD =12 VDC (unless otherwise specified). Parameter Symbol Test Conditions Min Typ Max Units Operating Point BOP 0.5 2.0 4.5 mT Release Point BRP -4.5 -2.0 -0.5 mT Hysteresis Bhys 2.0 4.0 6.5 mT Note: 1 mT = 10 Gauss. Absolute Maximum Ratings Supply Voltage (Operating), VDD Supply Current (Fault), IDD Output Voltage, VOUT Output Current (Fault), IOUT Power Dissipation, PD 18V 50mA 18V 50mA 100mW Operating Temperature Range, T A -40 to 150°C Storage Temperature Range, T S -65 to 150°C Maximum Junction Temp, TJ 175°C ESD Sensitivity (All Pins) +/- 4KV Melexis Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function o r design. Melexis does not assume any liability arising from the use of any product or application of any product or circuit described herein. US4881 CMOS Low Voltage High Sensitivity Latch 3901004881 Rev 1.5 24/July/01 Page 2 US4881 CMOS Low Voltage High Sensitivity Latch Preliminary Datasheet Performance Graphs Typical Magnetic Switch Points versus Supply Voltage Typical Magnetic Switch Points versus Temperature 4881 12.5 4881 12 B HYS 7.5 7.5 Flux Density (mT) Flux Density (mT) BOP 2.5 -2.5 B OP 2.5 -2.5 BRP B RP -7.5 -7.5 -12.5 -12.5 0 5 10 15 20 25 30 -40 0 40 160 200 o Supply Voltage (V) Temperature ( C) Min/Max Magnetic Switch Range versus Temperature Output Voltage versus Flux Density 4881 12.5 120 80 4881 30 24 7.5 2.5 B OP Min -2.5 B RP Max Output Voltage (V) Flux Density (mT) B OP Max BRP Min -7.5 V DD 18 B OP 12 6 B RP V out 0 -12.5 -40 0 40 80 120 160 200 -30 -10 0 10 20 30 Flux Density (mT) Temperature ( oC) US4881 CMOS Low Voltage High Sensitivity Latch -20 3901004881 Rev 1.5 24/July/01 Page 3 US4881 CMOS Low Voltage High Sensitivity Latch Performance Graphs Typical Saturation Voltage versus Temperature VDD = 12 V, I OUT = 20mA Typical Supply Current versus Supply Voltage 4881 5 4881 500 4 400 TA = -40 C VDS(ON) (mV) Supply Current (mA) VDS(ON) o 3 TA = 25oC 2 300 200 TA = 125oC 1 100 0 0 0 5 10 15 20 25 30 -40 0 120 160 200 Temperature ( C) Power Dissipation versus Temperature Wave Soldering Parameters All Devices All Devices 280 400 260 UA Package R θJA =206oC/W Solder Temperature (oC) Package Power Dissipation (mW) 80 o Supply Voltage (V) 500 40 300 200 100 240 220 200 SO Package RθJA =575oC/W 0 -40 0 40 80 120 160 200 0 Temperature ( oC) US4881 CMOS Low Voltage High Sensitivity Latch 5 10 15 20 25 30 Time in Wave Solder (Seconds) 3901004881 Rev 1.5 24/July/01 Page 4 US4881 CMOS Low Voltage High Sensitivity Latch Preliminary Datasheet Application Comments Unique Features CMOS Hall IC Technology The chopper stabilized amplifier uses switched capacitor techniques to eliminate the amplifier offset voltage, which, in bipolar devices, is a major source of temperature sensitive drift. CMOS makes this advanced technique possible. The CMOS chip is also much smaller than a bipolar chip, allowing very sophisticated circuitry to be placed in less space. The small chip size also contributes to lower physical stress and less power consumption. If reverse supply protection is desired, use a resistor in series with the VDD pin. The resistor will limit the Supply Current(Fault), IDD, to 50 mA. For severe EMC conditions, use the application circuit below. Installation Comments Consider temperature coefficients of Hall IC and magnetics, as well as air gap and life time variations. Observe temperature limits during wave soldering. Applications Examples Automotive and Severe Environment Protection Circuit Two Wire Optional Current Biasing Circuit R1 100Ω D1 Supply Voltage Z1 C1 4.7n F V DD RL 1.2 K Hall IC VSS RL IIN Iout IDD VDD OUT C2 4.7n F Hall IC Rb The resistors R b and R L can be used to bias the input current, Iin. Refer to the part specification for limiting values. This circuit will help in getting the precise ON and OFF currents desired. B RP = Ioff = (V DD / Rb + I DD ) B OP = Ion = (Ioff + VDD / R L ) US4881 CMOS Low Voltage High Sensitivity Latch 3901004881 Rev 1.5 24/July/01 Page 5 US4881 CMOS Low Voltage High Sensitivity Latch Physical Characteristics UA Package Dimensions 45o Typical 1.60 1.40 2.13 1.87 4.30 3.90 0.84 0.63 UA Hall Plate / Chip Location 0.45 0.41 5o Typical 2.64 2.34 1.53 1.27 U48 * 105 3.20 2.80 0.48 0.43 45o Typical Marked Surface 1.75 1.55 All Dimensions in millimeters 0.38 Typical (see note 3) 0.20 0.00 0.41 0.35 1 2 NOTES: 1.) Controlling dimension: mm 2.) Leads must be free of flash and plating voids 3.) Do not bend leads within 1mm of lead to package interface. 4.) Package dimensions exclude molding flash 5.) Tolerance is 0.254mm unless otherwise specified 3 1.30 1.24 0.50 0.35 4105 * = Supplier (Melexis) = Series (4880) Line 2: 1st digit (1) 2nd and 3rd digits(05) = Year (2001) = Week of Year PINOUT: Pin 1 Pin 2 Pin 3 V DD GND Output 0.41 0.35 2.57 2.51 SOT-23 Package Dimensions 3.00 2.60 15.5 14.5 * MARKING: Line 1: 1st digit (U) 2nd and 3rd digits (48) 0.20 MIN 1.80 1.50 chip 0.66 0.56 0.25 0.10 2.10 1.70 3.10 2.70 0.10 0.00 0.90 0.70 1.30 1.00 * MARKING: 1st Digit (4) = Series (4880) 2nd Digit(1) = Year - 2001 Last Digits (05) = Week of Year SOT-23 Hall Plate / Chip Location NOTES: 1.) Controlling dimension: mm 2.) Lead thickness after solder plating will be 0.254 mm maximum 3.) Package dimensions exclude molding flash 4.) The end flash shall not exceed 0.127 mm on each side of package 5.) Tolerance is 0.254mm unless otherwise specified 3 Bottom View of Package 0.95 0.85 2 1 1.55 1.45 PINOUT: Pin 1 Pin 2 Pin 3 V DD Output GND For the latest version of this document, Go to our website at: WWW.melexis.com Or for additional information Contact Melexis Direct: Europe and Japan E-mail: [email protected] Phone: 011-32-13-670-780 US4881 CMOS Low Voltage High Sensitivity Latch USA and rest of the world E-mail: [email protected] Phone (603)-223-2362 3901004881 Rev 1.5 24/July/01 Page 6