US2881/2882 CMOS High Sensitivity Latch Features and Benefits • • • • • • Chopper stabilized amplifier stage Optimized for BDC motor applications New miniature package / thin, high reliability package Operation down to 3.5V CMOS for optimum stability, quality, and cost Ultra low IDD current Applications • • • • • • Solid state switch Brushless DC motor commutation Speed sensing Linear position sensing Angular position sensing Current sensing Ordering Information Part No. US2881 / US2882 US2881 / US2882 Temperature Suffix Package Temperature Range E SO or UA -40oC to 85oC Extended L SO or UA -40oC to 150oC Full Temp. *Contact Factory or Sales Representative for Legacy Temperature Versions Functional Diagram V DD Description The design specifications and performance of the Melexis US2881 have been optimized for commutation applications in brushless DC motors and automotive speed sensing. Output The output transistor will be latched on (BOP) in the presence of a sufficiently strong South pole magnetic field facing the marked side of the package. Similarly, the output will be latched off (BRP) in the presence of a North field. The SOT-23 device is reversed from the UA package. The SOT-23 output transistor will be latched on (BOP) in the presence of a sufficiently strong North pole magnetic field subjected to the marked face. Voltage Regulator Chopper GND UA Package Pin 1 - V D D Pin 2 - GND Pin 3 - Output SO Package Pin 1 - VD D Pin 2 - Output Pin 3 - GND Note: Static sensitive device; please observe ESD precautions. Re verse VDD protection is not included. For reverse voltage protection, a 100Ω resistor in series with VDD is recommended. US2881 CMOS High Sensitivity Latch 3901002881 Rev 5.6 23/July/00 Page 1 US2881/2882 CMOS High Sensitivity Latch US2881 and US2882 Electrical Specifications DC operating parameters: TA = 25oC, VDD = 12VDC (unless otherwise specified). Parameter Symbol Test Conditions Min Supply Voltage VDD Operating 3.5 Supply Current IDD B<BOP 1.5 Saturation Voltage VDS(on) Output Leakage Typ Max Units 27 V 2.0 4.0 mA IOUT = 20 mA, B>BOP 0.4 0.5 V IOFF B<BRP, VOUT = 27V 0.01 5.0 ìA Output Rise Time tr VDD = 12V, RL = 1.1KÙ, CL = 20pf 0.04 ìs Output Fall Time tf VDD = 12V, RL = 1.1KÙ, CL = 20pf 0.18 ìs US2881 Magnetic Specifications Parameter Operating Point Symbol Test Conditions BOP Min 0.5 Typ 2.0 Max 4.5 Units mT Release Point BRP -4.5 -2.0 -0.5 mT Hysteresis Bhys 3.0 4.0 5.0 mT US2882 Magnetic Specifications Parameter Symbol Test Conditions Min Typ Max Units Operating Point BOP -2.0 2.0 6.0 mT Release Point BRP -6.0 -2.0 2.0 mT Hysteresis Bhys 3.0 4.0 5.0 mT Note: 1 mT = 10 Gauss. Absolute Maximum Ratings Supply Voltage (Operating), VDD Supply Current (Fault), IDD Output Voltage, VOUT Output Current (Fault), IOUT Power Dissipation, PD Melexis Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Melexis does not assume any liability arising from the use of any product or application of any product or circuit described herein. US2881 CMOS High Sensitivity Latch 24V 50mA 24V 50mA 100mW Operating Temperature Range, T A -40 to 150°C Storage Temperature Range, T S -65 to 150°C Maximum Junction Temp, TJ 175°C ESD Sensitivity (All Pins) +/- 4KV 3901002881 Rev 5.6 23/July/00 Page 2 US2881/2882 CMOS High Sensitivity Latch Performance Graphs Typical Magnetic Switch Points versus Supply Voltage Typical Magnetic Switch Points versus Temperature 2881 12.5 2881 12 BHYS 7.5 7.5 Flux Density (mT) Flux Density (mT) B OP 2.5 -2.5 B OP 2.5 -2.5 B RP BRP -7.5 -7.5 -12.5 -12.5 0 5 10 15 20 25 30 -40 0 40 160 200 Temperature ( C) Min/Max Magnetic Switch Range versus Temperature Output Voltage versus Flux Density 2881 2881 30 B OP Max VDD 24 7.5 BOP 2.5 Output Voltage (V) Flux Density (mT) 120 o Supply Voltage (V) 12.5 80 B OP Min -2.5 B RP Max -7.5 B RP Min 18 12 6 BRP Vout -12.5 -40 0 0 40 80 120 160 200 -30 -10 0 10 20 30 Flux Density (mT) Temperature (oC) US2881 CMOS High Sensitivity Latch -20 3901002881 Rev 5.6 23/July/00 Page 3 US2881/2882 CMOS High Sensitivity Latch Performance Graphs Typical Saturation Voltage versus Temperature VDD = 12 V, IOUT = 20mA Typical Supply Current versus Supply Voltage 2881 5 4 400 TA = -40oC VDS(ON) (mV) Supply Current (mA) 2881 500 3 TA = 25oC 2 300 V DS(ON) 200 TA = 125oC 1 100 0 0 0 5 10 15 20 25 30 -40 0 Power Dissipation versus Temperature 120 160 200 All Devices 280 400 260 UA Package Rθ JA =206oC/W Solder Temperature (oC) Package Power Dissipation (mW) 80 Wave Soldering Parameters All Devices 500 40 Temperature (oC) Supply Voltage (V) 300 200 100 240 220 200 SO Package RθJA =575oC/W 0 -40 0 40 80 120 160 200 0 Temperature (oC) US2881 CMOS High Sensitivity Latch 5 10 15 20 25 30 Time in Wave Solder (Seconds) 3901002881 Rev 5.6 23/July/00 Page 4 US2881/2882 CMOS High Sensitivity Latch Application Comments Unique Features CMOS Hall IC Technology The Chopper Stabilized Amplifier, using switched capacitor techniques, eliminates the amplifier offset voltage, which in bipolar devices is a major source of temperature sensitive drift. CMOS makes this advanced technique possible. If reverse supply protection is desired, use a resistor in series with the VDD pin. The resistor will limit the Supply Current (Fault), IDD, to 50mA. For severe EMC conditions, use the application circuit below. The CMOS chip is also much smaller than the Bipolar chip, allowing very sophisticated circuitry to be placed in less space. The small chip size also contributes to lower physical stress and less power consumption. Installation Consider temperature coefficients of Hall IC and magnetics, as well as air gap and life time variations. Observe temperature limits during wave soldering. Applications Examples Automotive and Severe Environment Protection Circuit Two Wire Optional Current Biasing Circuit R1 100Ω V VDD Supply Voltage R 1.2L K Z1 C1 4.7n F RL IIN Iout IDD D1 DD Hall IC OUT VSS C2 4.7n F Hall IC Rb The resistors Rb and RL can be used to bias the input current, Iin. Refer to the part specification for limiting values. This circuit will help in getting the precise ON and OFF currents desired. B RP = Ioff = (VDD / Rb + DD I ) B OP = Ion = (Ioff + VDD / RL ) US2881 CMOS High Sensitivity Latch 3901002881 Rev 5.6 23/July/00 Page 5 US2881/2882 CMOS High Sensitivity Latch Physical Characteristics UA Package Dimensions 45o Typical 1.60 1.40 2.13 1.87 4.30 3.90 0.84 0.63 UA Hall Plate / Chip Location 0.45 0.41 5o Typical 2.64 2.34 1.53 1.27 U28 * 105 3.20 2.80 0.48 0.43 45o Typical Marked Surface 1.75 1.55 All Dimensions in millimeters 0.38 Typical (see note 3) 0.20 0.00 0.41 0.35 1 2 NOTES: 1.) Controlling dimension: mm 2.) Leads must be free of flash and plating voids 3.) Leads must not arc toward the rear of package 4.) Package dimensions exclude molding flash 5.) Tolerance is 0.254mm unless otherwise specified 3 = Supplier (Melexis) = Series (2880) Line 2: 1st digit (1) 2nd and 3rd digits(05) = Year (2001) = Week of Year PINOUT: Pin 1 Pin 2 Pin 3 1.30 1.24 0.50 0.35 0.20 MIN 3 * 2104 1 V DD GND Output 0.41 0.35 2.57 2.51 SOT-23 Package Dimensions (Top View) 3.00 2.60 15.5 14.5 * MARKING: Line 1: 1st digit (U) 2nd and 3rd digits (28) 1.80 1.50 chip 0.66 0.56 2 2.10 1.70 0.25 0.10 Pin # 3.10 2.70 0.10 0.00 0.90 0.70 1.30 1.00 NOTES: 1. MARKING: 1st Digit (2) = Series (2881) 2nd Digit(1) = Year - 2001 Last Digits (04) = Week of Year 2. PINOUT (See Top View at left): Pin 1 VDD Pin 2 Output Pin 3 GND 3. Controlling dimension: mm. SOT-23 Hall Plate / Chip Location (Bottom View) 0.95 0.85 4. Lead thickness after solder plating will be 0.254 mm maximum. 5. Package dimensions exclude molding flash. 6. The end flash shall not exceed 0.127 mm on each side of package. 7. Tolerance is +/- 0.254 mm unless otherwise specified. 1.55 1.45 For the latest version of this document, Go to our website at: WWW.melexis.com Or for additional information Contact Melexis Direct: Europe and Japan E-mail: [email protected] Phone: 011-32-13-670-780 US2881 CMOS High Sensitivity Latch USA and rest of the world E-mail: [email protected] Phone: (603)-223-2362 3901002881 Rev 5.6 23/July/00 Page 6 US2881/2882 CMOS High Sensitivity Latch Revision History. Note: This page is intended to record changes, but not to be printed for distribution or conversion to a pdf. Revision Date By 5.5 9/28/00 rsa Change On Page 2, changed units of measure for output rise / fall times from “ms” to “ì s.” US2881 CMOS High Sensitivity Latch 3901002881 Rev 5.6 23/July/00 Page 7