S3842P Semiconductor Current Mode PWM Controller Descriptions The S3842, high performance current mode controller, Provides the necessary features to off-line and DC-DC fixed frequency current control applications offering the designer a cost effective solution with minimal external components. Internally protection circuity includes built-in input and reference under-voltage lockout and current limiting with hysteresis. Also other characteristics of internal circuit provide improved line regulation, enhanced load response, trimmed oscillation for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator and totempole output designed to source and sink high peak current from a capacitive load such as the gate of a power MOSFET. Features • Optimized for off-line control • Current mode operation to 500 ㎑ • Low start up and operating current • Under voltage lockout with 6V hysteresis • Pulse by pulse current limiting • Internally trimmed bandgap reference about 5V • Enhanced load response characteristic • Automatic feed forward compensation Ordering Information Type NO. S3842P Marking Package Code S3842P DIP-8 Outline Dimensions unit : mm PIN Connections 1. Output / Compensation 2. Voltage feedback. Input 3. Current sense Input 4. Rt/Ct 5. GND 6. Output 7. Vcc 8. Vref KSI-L006-000 1 S3842P Absolute Maximum Ratings Characteristic Ta=25°C Symbol Ratings Unit Supply voltage Vcc 30 V Current Sense and Vfb Input VIN -0.3 to Vcc V ICC+ IZ 30 mA Output Sink of Source Current Io 1 A Error AMP Output Sink Current Ieo 10 mA Operating Ambient Temperature Ta 0 to 70 °C Tstg -65 to 150 °C Pd 1 W Total Power Supply and Zener Current Storage Temperature Range Power Dissipation at Ta≤ 50°C note) All voltages are with respect to PIN5, and current are positive into the specified pin. PIN Description PIN NO Function Description 1 Compensation Voltage feedback Error amplifier output and is made available for loop compensation. Inverting input of error amplifier, normally connected to the switching power supply output through a resistor driver. A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output. The oscillator frequency and maximum output duty cycle are programmed by connecting resistor Rt to Vref and capacitor Ct to ground. This pin is the combined control circuitry and power ground. This output directly drives the gate of a power MOSFET. Peak current up to 1.0A are sourced and sinked by this pin. This pin is the positive supply of the control IC. This is the reference output. it provides charging current for capacitor Ct through resistor Rt. 2 3 Current sense 4 Rt/Ct 5 Ground 6 Output 7 VCC 8 Vref Block Diagram KSI-L006-000 2 S3842P Electrical Characteristics (Unless otherwise stated, these specifications apply for Characteristic Symbol 0 ≤ Ta ≤ 70°C; VCC =15V(Note.4), RL =10 ㏀, CL =3.3nF) Test Condition Min. Typ. Max. Unit 4.90 5.00 5.10 V 1. Reference Section Ta=25°C, IO=1mA Output Voltage Vref Line Regulation △Vref 12V ≤ VCC ≤ 25V - 6 20 mV Load Regulation △Vref 1mA ≤ IO ≤ 20mA - 6 25 mV (Note 1) - 0.2 0.4 mV/°C - 50 - uV - 5 - mV Temperature Stability △VT /△VT Output Noise Voltage Vn Long Term Stability S Output Short Circuit ISC - -30 -100 -180 mA Initial Accuracy fSC Ta=25°C 47 52 57 KHz Voltage Stability △f /△V 12 ≤ Va ≤25V - 0.05 1.0 % Temperature Stability △f /△T Tmin ≤ Ta ≤ Tmax (Note 1) - 5 - % V4 VPIN4 Peak to Peak - 1.7 - V Input Voltage V2 VPIN1=2.5V 2.42 2.50 2.58 V Input Bias Current Ib - - -0.3 -2.0 ㎂ 10Hz ≤ f ≤10KHz,Ta=25°C(Note 1) Ta=125°C, 1000Hrs (Note 1) 2. Oscillator Section Amplitude 3. Error Amp Section Open Loop Voltage Gain AVO1 2V ≤ VO ≤ 4V 65 90 - ㏈ Supply Voltage Rejection SVR 12V ≤ Va ≤ 25V 60 70 - ㏈ 2 6 - mA -0.5 -0.8 - mA Output Sink Current IO VPIN2=2.7V, VPIN1=1.1V Output Source Current IO VPIN2=2.3V, VPIN1=5V VOUT High Vch VPIN2=2.3V, RL=15 ㏀ to Ground 5 6 - V VOUT Low Vc1 VPIN2=2.7V, RL=15 ㏀ Pin8 - 0.7 1.1 V Gain GV (Note 2 & 3) 2.8 3.0 3.2 V/V Maximum Input Signal V3 VPIN 1=5V (Note 2) 0.9 1.0 1.1 V 12 ≤ Va ≤ 25V (Note 2) - 70 - ㏈ - - -2 -10 ㎂ ISINK=20mA - 0.1 0.4 V ISINK=200mA - 1.5 2.2 V ISOURCE=20mA 13.0 13.5 - V ISOURCE=200mA 12.0 13.5 - V 4. Current Sense Section Supply Volt Rejection Input Bias Current SVR Ib 5.Output Section Output Low Level VOl Output High Level VOh Rise time tr Ta=25°C, Cl=1nF (Note 1) - 50 150 ns Fall time tf Ta=25°C, Cl=1nF (Note 1) - 50 150 ns KSI-L006-000 3 S3842P Electrical Characteristics(continued) Characteristic Symbol Test Condition Min. Typ. Max. Unit VPIN7 where VPIN8 ≥ 4.9V 14.5 16.0 17.5 V 6. Under-Voltage Lockout Section Start Threshold Vth Min. Operation Voltage After Turn-On VCC(min) VPIN7 where VPIN8 ≤ 1V 8.5 10.0 11.5 V DCmax - 93 97 100 ns 7. PWM Section Maximum Duty Cycle 8. Total Standby Section Start-Up Current Ist VCC = 15V before turn on - 0.4 0.7 mA Operating Supply Current ICC VPIN2= VPIN3= 0V - 11 20 mA ICC= 25mA - 36 - V Zener Voltage VZ NOTE: 1.Thes parameters, although guaranteed.are not 100% tested in production 2.Parameter measured at trip piont of latch with Vpin2=0 3.Gain defined as : A =△VPIN1/△VPIN3 ; 0 ≤ VPIN3 ≤ 0.8V 4.Adjust VCC above the start threshold before setting at 15V Information in Using IC 1. Under voltage Lockout To prevent erratic output behavior which activating V cc the power switch with extraneous leakage currents, 7 O N /O F F C O M M A N D T O R ES ET O F IC during under voltage lockout. Output(pin6) should be shunted to ground with a bleeder resister. V o n -16V V o f f -10V The Vcc comparator upper and lower threshold are Icc 16V/10V. The large hysteresis and low start up currents makes it ideally suited in off-line converter application where efficient bootstrap start-up <17mA techniques are required. <1mA 10V 16V V cc KSI-L006-000 4 S3842P 2. Oscillator Waveforms and Maximum Duty Cycle The oscillator frequency is programmed by the values selected for the timing components Rt and Ct. Ct is LARGE Rt SMALL Ct Vpin4 8 charged from 5V, Vref, through resistor Rt to approximately 2.8V and discharged to 1.2V by an Rt INTERNAL CLOCK 4 During the discharge of Ct, the oscillator generates an SMALL Rt LARGE Ct Ct internal current sink. internal blanking pulse and the center input NOR gate high. Vpin4 This makes output to be in a low state and control the 5 INTERNAL CLOCK amount of output dead time. 3. Error AMP Configuration 2.50V Error amp output(Pin1) is provided for external loop 0.5mA + Compensation and error amp can source or sink up to 0.5mA. The non-inverting input is internally biased at 2.5V and is not pinned out. The converter output voltage is typically V in 2 Zt - divided down and monitored by the inverting input(pin2). COMP Zf 1 4. Current Sense Circuit ERROR AMP 2R Iβ R IV 1 R(V pin1 - 2V be) COMP Ipeak = R 3R x Rs 3 C CURRENT SENSE GND Rs 5 A normal operating conditions occurs when the power supply output is overloaded or if output voltage to 1.0V Therefore the maximum peak switch current is lpk(max)=1.0V/Rs, and under the normal operating conditions the KSI-L006-000 5 S3842P peak inductor current controlled by the voltage at pin1. 5. Shutdown Techniques 4.7K 8 V 3 4.7K 1 RE F Shutdown of the S3842 can be CO MP accomplished by two methods; ISEN SE either raise pin3 above 1V or pull 5.00 S HUT DO W N pin1 below a voltage two diodes S HUT DO W N drops above ground. Either causes T O CUR R E NT S E NS E R ES I S T O R the output of the PWM method comparator to be high (refer to block diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at pins 1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SCR which turn off, allowing the SCR to reset. 6. Open Loop Test V REF RT 2N2222 4.7K 4.7K V REF 5 1 COMP I SENSE ADJUST 2 V in 3 I SENSE 4 RT/CT S3842 ERROR 1K AMP ADJUST V cc 100K V cc 6 OUTPUT 7 GND 0.1uF 0.1uF 1K/1W OUTPUT 8 GROUND High peak currents associated with capacitive leads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Pin5 in a single point ground. The transistor and 5 ㏀ potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Pin3. 7. Slope Compensation V A fraction of the oscillator ramp can be resistively 0.1u F RE F 8 summed with the current sense signal to provide RT slope compensation for converters requiring duty R T /C T 4 CT cycle over 50%. Note that capacitor C, forms a R1 R2 I SEN SE I SEN SE spikes. 3 C filter with R2 to suppress the leading edge switch R SEN SE KSI-L006-000 6 S3842P Electrical Characteristic Curves OUTPUT DEAD-TIME vs. OSCILLATOR FREQUENCY TIMING RESISTOR vs. OSCILLATOR FREQUENCY 80 V c c =15V Ta = 25o C 50 50 5.0n F 2.0n F R T TIMING RESISTOR (KΩ) %DT PERCENT OUTPUT DEAD-TIME 100 1.0n F 20 Ct =10n F 500pF 10 5.0 200pF 100pF 2.0 1.0 10K 20K 50K 100K 200K 500K 1.0M 500pF 20 200pF 8.0 5.0 2.0 V c c =15V Ta = 25o C 0.8 10K 20K 2.0n F 1.0n F C T =10n F 50K 100K 200K 500K 1.0M f OSC OS CILLATOR FREQUENCY (KHz ) f OSC OS CILLATOR FREQUENCY (KHz ) Error Amplifier Open-Loop Frequency Response Output Saturation Characteristics 0 80 -45 60 φ 40 -90 o ) 20 -135 AV 0 SATURATION VOLTAGE (V) 4 PHASE ( VOLTAGE GAIN (dB) 100pF 5.0n F Vcc=15V Ta = 25o C 3 Ta=-55o C 2 SOURCE SAT(Vcc-VOH) 1 -180 SINK SAT(VOL) 0 10 100 1K 10K 100K 1M 10M 0.1 0.2 0.3 0.4 0.5 0.7 1 2 3 4 5 7 10 OUTPUT CURRENT SOURCE OR SINK (A) FREQUENCY (Hz) KSI-L006-000 7