® 3656 Transformer Coupled ISOLATION AMPLIFIER FEATURES APPLICATIONS ● INTERNAL ISOLATED POWER ● 8000V ISOLATION TEST VOLTAGE ● MEDICAL Patient Monitoring and Diagnostic Instrumentation ● INDUSTRIAL Ground Loop Elimination and Off-ground Signal Measurement ● 0.5µA MAX LEAKAGE AT 120V, 60Hz ● 3-PORT ISOLATION ● IMR: 125dB REJECTION AT 60Hz ● 1" x 1" x 0.25" CERAMIC PACKAGE ● NUCLEAR Input/Output/Power Isolation DESCRIPTION The 3656 was the first amplifier to provide a total isolation function, both signal and power isolation, in integrated circuit form. This remarkable advancement in analog signal processing capability was accomplished by use of a patented modulation technique and miniature hybrid transformer. Versatility and performance are outstanding features of the 3656. It is capable of operating with three Input ISO Power completely independent grounds (three-port isolation). In addition, the isolated power generated is available to power external circuitry at either the input or output. The uncommitted op amps at the input and the output allow a wide variety of closed-loop configurations to match the requirements of many different types of isolation applications. Input Demodulator Pulse Generator Modulator Output Demodulator Rectifiers and Filters Rectifiers and Filters + – Output ISO Power This product is covered by the following United States patents: 4,066,974; 4,103,267; 4,082,908. Other patents pending may also apply upon the allowance and issuance of patents thereon. The product may also be covered in other countries by one or more international patents corresponding to the above-identified U.S. patents. InternationalAirportIndustrialPark • MailingAddress:POBox11400,Tucson,AZ85734 • StreetAddress:6730S.TucsonBlvd.,Tucson,AZ 85706 • Tel:(520)746-1111 • Twx:910-952-1111 Internet:http://www.burr-brown.com/ • FAXLine:(800)548-6133(US/CanadaOnly) • Cable:BBRCORP • Telex:066-6491 • FAX:(520)889-1510 • ImmediateProductInfo:(800)548-6132 ® © SBOS132 1987 Burr-Brown Corporation PDS-403G 1 Printed in U.S.A. January, 1997 3656 SPECIFICATIONS ELECTRICAL At +25°C, V± = 15VDC and 15VDC between P+ and P–, unless otherwise specified. 3656AG, BG, HG, JG, KG PARAMETER ISOLATION Voltage Rated Continuous(1), DC Test, 10s(1) Test, 60s(1) Rejection DC 60Hz, < 100Ω in I/P Com(2) 60Hz, 5kΩ in I/P Com(2) 3656HG 3656AG, BG, JG, KG Capacitance(1) Resistance(1) Leakage Current GAIN Equations Accuracy of Equations Initial(3) 3656HG 3656AG, JG, KG 3656BG vs Temperature 3656HG 3656AG, JG 3656BG, KG vs Time Nonlinearity External Supplies Used at Pins 12 and 16, 3656HG 3656AG, JG, KG 3656BG Internal Supplies Used for Output Stage OFFSET VOLTAGE(5), RTI Initial(3), 3656HG 3656AG, JG 3656BG, KG vs Temperature, 3656HG 3656JG 3656AG 3656KG 3656BG vs Supply Voltage 3656HG 3656AG, BG, JG, KG vs Current(6) CONDITIONS MIN G1 = 10V/V 3500 (1000) 8000 (3000) 2000 (700) TYP MAX VDC VDC Vrms 160 125 dB dB 6 (6.3) 1012 (1012) 0.28 dB dB pF Ω µA 108 112 120V, 60Hz 0.5 See Text G < 100V/V 1.5 1 0.3 480 120 60 % % % ppm/°C ppm/°C ppm/°C % ±0.15 ±0.1 ±0.05 % % % 0.02 (1 + log khrs.) RA + RF = RB ≥ 2MΩ Unipolar or Bipolar Output Bipolar Output Voltage Swing, Full Load(4) ±0.15 15Vp between P+ and P– % ±[4 + (40/G1)] ±[2 + (20/G1)] ±[1 + (10/G1)] ±[200 + (1000/G1)] ±[50 + (750/G1)] ±[25 + (500/G1)] ±[10 + (350/G1)] ±[5 + (350/G1)] mV mV mV µV/°C µV/°C µV/°C µV/°C µV/°C ±[0.6 + (3.5/G1)] ±[0.3 + (2.1/G1)] ±[0.2 + (20/G1)] mV/V mV/V mV/mA Supply between P+ and P– ±[0.1 + (10/G1)] ±[10 + (100/G1)] • (1 + log khrs.) vs Time AMPLIFIER PARAMETERS, Apply to A1 and A2 Bias Current(7) Initial vs Temperature vs Supply Offset Current(7) Impedance Common-Mode Input Noise Voltage fB = 0.05Hz to 100Hz fB = 10Hz to 10kHz Input Voltage Range(8) Linear Operation Internal Supply External Supply Output Current VOUT = ±5V ±15V External Supply Internal Supply VOUT = ±10V ±15V External Supply VOUT = ±2V, VP+, P– = 8.5V Internal Supply Quiescent Current µV 100 0.5 0.2 5 100 || 5 5 5 20 nA nA/°C nA/V nA MΩ || pF µVp-p µVrms ±5 Supply –5 V V ±5 ±2.5 mA mA ±2.5 mA ±1 150 ® 3656 UNITS 2 450 mA µA SPECIFICATIONS (CONT) ELECTRICAL At +25°C, V± = 15VDC and 15VDC between P+ and P–, unless otherwise specified. 3656AG, BG, HG, JG, KG PARAMETER CONDITIONS FREQUENCY RESPONSE ±3dB Response Full Power Slew Rate Settling Time OUTPUT Noise Voltage (RTI) MIN TYP Small Signal Direction Measured at Output to 0.05% UNITS 30 1.3 kHz kHz V/µs µs +0.1, –0.04 500 fB = 0.05Hz to 100Hz √(5)2 + (22/G1)2 µVp-p fB = 10Hz to 10kHz √(5)2 + (11/G1)2 5 µVrms mVp-p Residual Ripple(9) POWER SUPPLY IN, at P+, P– Rated Performance Voltage Range(10) Ripple Current(9) Quiescent Current(11) Current vs Load Current(12) MAX 15 Derated Performance 8.5 10 14 0.7 Average vs Current from +V, –V, V+, V– ISOLATED POWER OUT, At +V, –V, V+, V– pins(13) Voltage, No Load 15V Between P+ and P– Voltage, Full Load ±5mA (10mA sum) Load(12) Voltage vs Power Supply vs Supply Between P+ and P– Ripple Voltage(9) No Load Full Load ±5mA Load TEMPERATURE RANGE Specification 3656AG, BG 3656HG, JG, KG Operation(10) Storage(14) 8.5 7 VDC VDC mAp-p mA/DC mA/mA 16 25 18 9 8 0.66 9.5 9 40 80 –25 0 –55 –65 V V V/V 200 mVp-p mVp-p +85 +70 +100 +125 °C °C °C °C NOTES: (1) Ratings in parenthesis are between P- (pin 20) and O/P Com (pin 17). Other isolation ratings are between I/P Com and O/P Com or I/P Com and P–. (2) See Performance Curves. (3) May be trimmed to zero. (4) If output swing is unipolar, or if the output is not loaded, specification same as if external supply were used. (5) Includes effects of A1 and A2 offset voltages and bias currents if recommended resistors used. (6) Versus the sum of all external currents drawn from V+, V–, +V, –V (= ISO). (7) Effects of A1 and A2 bias currents and offset currents are included in Offset Voltage specifications. (8) With respect to I/P Com (pin 3) for A1 and with respect to O/P Com (pin 17) for A2. CMR for A1 and A2 is 100dB, typical. (9) In configuration of Figure 3. Ripple frequency approximately 750kHz. Measurement bandwidth is 30kHz. (10) Decreases linearly from 16VDC at 85°C to 12VDC at 100°C. (11) Instantaneous peak current required from pins 19 and 20 at turn-on is 100mA for slow rising voltages (50ms) and 300mA for fast rises (50µs). (12) Load current is sum drawn form +V, –V, V+, V– (= IISO). (13) Maximum voltage rating at pins 1 and 4 is ±18VDC; maximum voltage rating at pins 12 and 16 is ±18VDC. (14) Isolation ratings may degrade if exposed to 125°C for more than 1000 hours or 90°C for more than 50,000 hours. PACKAGE INFORMATION Example of the ratings for 3-port continuous isolation. 20 PRODUCT 3500VDC 3656 1000VDC 3 3500VD C 1 2 3 4 5 6 7 8 9 10 DESCRIPTION +V MOD Input Input DEMOD COM –V Balance A1 Inverting Input A1 Noninverting Input Balance A1 Output Input DEMOD PACKAGE DRAWING NUMBER(1) 20-Lead ISO Omni 102A NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. 17 ABSOLUTE MAXIMUM RATINGS PIN DESIGNATIONS NO. PACKAGE NO. 11 12 13 14 15 16 17 18 19 20 Supply Without Damage ...................................................................... 16V Input Voltage Range Using Internal Supply ......................................... ±8V Input Voltage Range Using External Supply ................................... Supply Continuous Isolation Voltage(1) ..................................... 3500, (1000) VDC Storage Temperature ...................................................... –65°C to +125°C Lead Temperature, (soldering, 10s) .............................................. +300°C DESCRIPTION Output DEMOD V– A2 Noninverting Input A2 Inverting Input A2 Output V+ Output DEMOD COM No Pin P+ P– NOTE: (1) Ratings in parenthesis are between P– (pin 20) and O/P Com (pin 17). Other isolation ratings are between I/P Com and O/P Com or I/P Com and P–. ® 3 3656 TYPICAL PERFORMANCE CURVES All specifications typical at +25°C, unless otherwise specified. PHASE RESPONSE SMALL SIGNAL FREQUENCY RESPONSE 30 5 G1 = 10 0 0 –5 Phase Shift (°C) G1 = 100 –10 –15 VP = 15V V+, V– = +15V, –15V VOUT = 300mVrms G2 = 2 –20 –25 –30 100 120 G1 = 1000 150 180 VP = 15V V+, V– = +15V, –15 VOUT = 300mVrms 240 3k 30k 10k G1 = 10 G1 = 100 90 210 1k 300 60 270 100 100k 1k 10k OUTPUT SWING vs SUPPLY VOLTAGE OUTPUT SWING AND DISTORTION vs FREQUENCY 11 7 7 7 r V± o , int. ±15V 2kΩ = = ± RL .V , ext 1kΩ RL = A ) = 5m 1 (±V 5 Distortion 6 6 mA V ±5 15 )= V =± (± V± = 2 ext. G 2 Ω, k =3 RL 9 )= 1 (±V Output Voltage (±V) Output Voltage (±V) Output Swing 0 G = 1000 5 5 4 4 G = 100 3 3 2 2 G = 10 1 3 1 G=1 0 0 8 10 12 14 16 10 100 1k Power Supply Voltage P± (V) 10k 50k Frequency (Hz) OUTPUT VOLTAGE SWING vs TEMPERATURE AND ISOLATED SUPPLY LOAD NOISE VOLTAGE vs FREQUENCY 9 7 IISO = 0, –VOUT Noise Voltage (nV/ Hz) RB = 2MΩ Derated Vp± 10k IISO = 0, +VOUT Output Voltage (±V) 100k Frequency (Hz) Frequency (Hz) IISO = max, +VOUT 5 IISO = max, –VOUT 3 1k Output Stage 100 Input Stage IISO (see note 12 of electrical specs) 1 10 –75 –55 –50 –25 0 25 50 0.1 75 85 100 10 100 Frequency (Hz) Temperature (°C) ® 3656 1 4 1k 10k 100k Harmonic Distortion (%) Relative Gain (dB) G1 = 1 G1 = 1000 G1 = 1 30 TYPICAL PERFORMANCE CURVES (CONT) All specifications typical at +25°C, unless otherwise specified. 1.8 Derated Vp± 1.4 1 0.6 –75 –55 –50 –25 0 25 50 8 16 6 12 ±V at IISO = 0 4 2 Voltage Current 0 –75 75 85 100 –55 –50 –25 0 25 50 75 85 100 Temperature (°C) QUIESCENT CURRENT AND ISOLATED VOLTAGE OUTPUT vs SUPPLY VOLTAGE ISOLATION-MODE REJECTION vs GAIN 15 10 200 13 8 at I IS O e ltag =0 Vo 11 6 A 5m ge lta Vo 9 O at I IS =± 4 nt rre Cu 7 Isolation-Mode Rejection (dB) f = 60Hz Isolated Voltage Output (±V) Quiescent Current at Vp+p– (mA) 4 0 Temperature (°C) 2 8 10 12 14 180 RC is resistance in series with input common, pin 3. 160 RC = 0 140 120 RC = 5kΩ 100 Shielded Unshielded 80 60 16 1 10 100 1000 Supply Voltage at VP± (V) Gain (V/V) ISOLATION MODE REJECTION vs FREQUENCY AC AND DC LEAKAGE CURRENT vs ISOLATION VOLTAGE 20 50 2.5 40 2 30 1.5 0 –10 –20 –30 20 DC Leakage Current (nA) 10 AC Leakage Current (µA) Normalized Isolation Mode Rejection (dB) 8 ±V at IISO = max Isolated Voltage Output (±V) Normalized Quiescent Current (at VP+P–) 2.2 ISOLATED OUTPUT VOLTAGE AND CURRENT vs TEMPERATURE Derated Vp± Maximum Recommended IISO Current (±mA) QUIESCENT CURRENT vs TEMPERATURE 1 DC 10 0.5 –40 AC, 60Hz 0 –50 10 100 1k 10k 0 100k Frequency (Hz) 2k 4k 0 6k 8k 10k Isolation Voltage (Vp) ® 5 3656 THEORY OF OPERATION Details of the 3656 are shown in Figure 1. The external connections shown, place it in its simplest gain configuration —unity gain, noninverting. Several other amplifier gain configurations and power isolation configurations are possible. See Installation and Operating Instructions and Applications sections for details. at pin 15 equal to the input voltage at pin 7 with no galvanic connection between them. Several amplifier and power connection variations are possible: 1. The input stage may be connected in various operational amplifier gain configurations. Isolation of both signal and power is accomplished with a single miniature toroid transformer with multiple windings. A pulse generator operating at approximately 750kHz provides a two-part voltage waveform to transformer, T1. One part of the waveform is rectified by diodes D1 through D4 to provide the isolated power to the input and output stages (+V, –V and V+, V–). The other part of the waveform is modulated with input signal information by the modulator operating into the V2 winding of the transformer. 2. The output stage may be operated at gains above unity. 3. The internally generated isolated voltages which provide power to A1 and A2 may be overridden and external supply voltages used instead. Versatility and its three independent isolated grounds allow simple solutions to demanding analog signal conditioning problems. See the Installation and Operating Instructions and Applications sections for details. The modulated signal is coupled by windings W6 and W7 to two matched demodulators—one in the input stage and one in the output stage—which generate identical voltages at their outputs, pins 10 and 11 (Voltages identical with respect to their respective commons, pins 3 and 17). In the input stage the input amplifier, A1, the modulator and the input demodulator are connected in a negative feedback loop. This forces the voltage at pin 6 (connect as shown in Figure 1) to equal the input signal voltage applied at pin 7. Since the input and the output demodulators are matched and produce identical output voltages, the voltage at pin 11 (referenced to pin 17, the output common) is equal to the voltage at pin 10 (referenced to pin 3, the input common). In the output stage, output amplifier A2 is connected as a unity gain buffer, thus the output voltage at pin 15 equals the output demodulator voltage at pin 11. The end result is an isolated output voltage INSTALLATION AND OPERATING INSTRUCTIONS The 3656 is a very versatile device capable of being used in a variety of isolation and amplification configurations. There are several fundamental considerations that determine configuration and component value constraints: 1. Consideration must be given to the load placed on the resistance (pin 10 and pin 11) by external circuitry. Their output resistance is 100kΩ and a load resistor of 2MΩ or greater is recommended to prevent a voltage divider loading effect in excess of 5%. T1 P+ 5 W1 Input Demodulator 10 BAL Pulse Generator 19 0.47µF P– W6 20 + 15VDC – 100kΩ BAL 8 100kΩ 14 6 7 A1 9 2 Modulator W7 1 Output Demodulator D2 +V D1 11 13 A2 15 V+ 16 W2 + 0.47µF W3 + VIN – 4 D3 D4 V– 12 –V W4 0.47µF W5 – 3 17 FIGURE 1. Block Diagram. ® 3656 6 VOUT 2. Demodulator loadings should be closely matched so their output voltages will be equal. (Unequal demodulator output voltages will produce a gain error.) At the 2MΩ level, a matching error of 5% will cause an additional gain error of 0.25%. ages. These two features of 3656 provide a great deal of versatility in possible isolation and power supply hook-ups. When external supplies are applied, the rectifying diodes (D1 through D4) are reverse biased and the internal voltage sources are decoupled from the amplifiers (see Figure 1). Note that when external supplies are used, they must never be lower than the internal supply voltage. 3. Voltage swings at demodulator outputs should be limited to 5V. The output may be distorted if this limit is exceeded. This constrains the maximum allowed gains of the input and output stages. Note that the voltage swings at demodulator outputs are tested with 2MΩ load for a minimum of 5V. Three-Port The power supply connections in Figure 2 show the full three-port isolation configuration. The system has three separate grounds with no galvanic connections between them. The two external 0.47µF capacitors at pins 12 and 16 filter the rectified isolated voltage at the output stage. Filtering on the input stage is provided by internal capacitors. In this configuration continuous isolation voltage ratings are: 3500V between pins 3 and 17; 3500V between pins 3 and 19; 1000V between pins 17 and 19. 4. Total current drawn from the internal isolated supplies must be limited to less than ±5mA per supply and limited to a total of 10mA. In other words, the combination of external and internal current drawn from the internal circuitry which feeds the +V, –V, V+ and V– pins should be limited to 5mA per supply (total current to +V, –V, V+ and V– limited to 10mA). The internal filter capacitors for ±V are 0.01µF. If more than 0.1mA is drawn to provide isolated power for external circuitry (see Figure 12), additional capacitors are required to provide adequate filtering. A minimum of 0.1µF/mA is recommended. Two-Port Bipolar Supply Figure 3 shows two-port isolation which uses an external bipolar supply with its common connected to the output stage ground (pin 17). One of the supplies (either + or – could be used) provides power to the pulse generator (pins 19 and 20). The same sort of configuration is possible with the external supplies connected to the input stage. With the connection shown, filtering at pins 12 and 16 is not required. In this configuration continuous isolation voltage rating is: 3500VDC between pins 3 and 17; not applicable between pins 17 and 19; 3500VDC between pins 3 and 19. 5. The input voltage at pin 7 (noninverting input to A1) must not exceed the voltage at pin 4 (negative supply voltage for A1) in order to prevent a possible lockup condition. A low leakage diode connected between pins 7 and 4, as shown in Figure 2, can be used to limit this input voltage swing. 6. Impedances seen by each amplifier’s + and – input terminals should be matched to minimize offset voltages caused by amplifier input bias currents. Since the demodulators have a 100kΩ output resistance, the amplifier input not connected to the demodulator should also see 100kΩ. Two-Port Single Supply Figure 4 demonstrates two-port isolation using a single polarity supply connected to the output common (pin 17). The other polarity of supply for A2 is internally generated (thus the filtering at pin 12). This isolated power configuration could be used at the input stage as well and either polarity of supply could be employed. In this configuration continuous isolation voltage rating is: 3500V between pins 3 and 17; 3500V between pins 3 and 19; not applicable between pins 17 and 19. 7. All external filter capacitors should be mounted as close to the respective supply pins as possible in order to prevent excessive ripple voltages on the supplies or at the output. (Optimum spacing is less than 0.5”. Ceramic capacitors recommended.) SIGNAL CONFIGURATIONS Unity Gain Noninverting The signal path portion of Figure 2 shows the 3656 is its simplest gain configuration: unity gain noninverting. The two 100kΩ resistors provide balanced resistances to the inverting and noninverting inputs of the amplifiers. The diode prevents latch up in case the input voltage goes more negative than the voltage at pin 4. POWER AND SIGNAL CONFIGURATIONS NOTE: Figures 2, 3 and 4 are used to illustrate both signal and power connection configurations. In the circuits shown, the power and signal configurations are independent so that any power configuration could be used with any signal configuration. Noninverting With Gain The signal path portion of Figure 3 demonstrates two additional gain configurations: gain in the output stage and noninverting gain in the input stage. The following equations apply: ISOLATED POWER CONFIGURATIONS The 3656 is designed with isolation between the input, the output, and the power connections. The internally generated isolated voltages supplied to A1 and A2 may be overridden with external voltages greater than the internal supply volt- ® 7 3656 100kΩ 9 2 10 D M 6 14 D + 15 A2 13 11 A1 17 16 12 7 – 0.47µF 4 RC 100kΩ 0.47µF 1 3 O/P PWR + VIN Pulse GEN – 19 + 15V 0.47µF 20 – I/P PWR FIGURE 2. Power: Three-Port Isolation; Signal: Unity-Gain Noninverting. RF RX RK 9 2 10 D M 6 14 D RA 15 + A2 13 11 A1 17 16 RB 12 7 15V + – 4 RC 1 3 + VIN Pulse GEN – 20 I/P PWR FIGURE 3. Power: Two-Port, Dual Supply; Signal: Noninverting Gain. ® 3656 – + 15V O/P PWR 8 19 0.47µF – VOUT VOUT Inverting Gain, Voltage or Current Input The signal portion of Figure 4 shows two possible inverting input stage configurations: current and input, and voltage input. Total amplifier gain: (1) G = G1 • G2 = VOUT VIN Input Stage: (2) G1 = 1 + (RA/FA) (Select G1 to be less than 5V/full scale VIN to limit demodulator output to 5V). Input Stage: For the voltage input case: (3) RA + RF ≥ 2MΩ (Select to load input demodulator with at least 2MΩ). RA (RF + 100kΩ) (4) RC = RA || (RF + 100kΩ) = RA + RF + 100kΩ (Balance impedances seen by the + and – inputs of A1 to reduce input offset caused by bias current). G1 = –RF/RS (Select G1 to be less than 5V/full scale VIN to limit the demodulator output voltage to 5V). (8) RF = 2MΩ (Select to load the demodulator with at least 2MΩ). (9) RC = RS || (R1 + 100kΩ) = Output Stage: G2 = 1 + (RX/RK) (Select ratio to obtain VOUT between 5V and 10V full scale with VIN at its maximum). (5) RX || RK = 100kΩ (Balance impedances seen by the + and – inputs of A2 to reduce effect of bias current on the output offset). (6) RS (RF + 100kΩ) RS + RF + 100kΩ (10) (Balance the impedances seen by the + and– inputs of A1). For the current input case: VOUT = –IIN RF • G2 (11) RC = RF (12) RF may be made larger than 2MΩ if desired. The 10pF capacitors are used to compensate for the input capacitance of A1 and to insure frequency stability. (7) RB = RA + RF (Load output demodulator equal to input demodulator). Output Stage: The output stage is the same as shown in equations (5), (6), and (7). RF = 2MΩ 100kΩ 9 10pF 2 10 D M 6 14 D RS + 15 + VIN A2 IIN – VOUT 13 11 A1 RC RB = 2MΩ 17 16 12 7 – 0.47µF 4 10pF 1 3 O/P PWR Pulse GEN 20 19 0.47µF + – I/P PWR FIGURE 4. Power: Two-Port, Single Supply; Signal: Inverting Gains. ® 9 3656 Illustrative Calculations: Step 6 G2 = 1 + (RX/RK) = 2.0 ∴RX/RK = 1.0 ∴RX = RK The maximum input voltage is 100mV. It is desired to amplify the input signal for maximum accuracy. Noninverting output is desired. (15) Input Stage: Step 7 Step 1 The resistance seen by the + input terminal of the output stage amplifier A2 (pin 13) is the output resistance 100kΩ of the output demodulator. The resistance seen by the (–) input terminal of A2 (pin 14) should be matched to the resistance seen by the + input terminal. G1 max = 5V/max Input Signal = 5V 0.1V = 50V/V With the above gain of 50V/V, if the input ever exceeds 100mV, it would drive the output to saturation. Therefore, it is good practice to allow reasonable input overrange. The resistance seen by pin 14 is the parallel combination of RX and RK. So, to allow for 25% input overrange without saturation at the output, select: ∴RX || RK = 100kΩ (RX • RK/(RX + RK) = 100kΩ RK/[1 +(RK/RX)] = 100kΩ G1 = 40V/V G1 = 1 + (RF + RA) = 40 ∴ RF + RA = 39 (13) Solving equations (15) and (16) RK = 20kΩ and RX = 200kΩ. Step 2 RA + RF forms a voltage divider with the 100kΩ output resistance of the demodulator. To limit the voltage divider loading effect to no more than 5%, RA + RF should be chosen to be at least 2MΩ. For most applications, the 2MΩ should be sufficiently large for RA + RF. Resistances greater than 2MΩ may help decrease the loading effect, but would increase the offset voltage drift. Step 9 The output demodulator must be loaded equal to the input demodulator. ∴RB = RA + RF = 2MΩ (See equation (14) above in Step 2). The voltage divider with RA + RF = 2MΩ is 2MΩ/(2MΩ + 100kΩ) = 2/(2 + 0.1) = 95.2%, i.e., the percent loading is 4.8%. Choose RA + RF = 2MΩ Use the resistor values obtained in Steps 3, 4, 8 and 9, and connect the 3656 as shown in Figure 3. OFFSET TRIMMING (14) Figure 5 shows an optional offset voltage trim circuit. It is important that RA + RF = RB. Step 3 Solving equations (13) and (14) CASE 1: Input and output stages in low gain, use output potentiometer (R2) only. Input potentiometer (R1) may be disconnected. For example, unity gain could be obtained by setting RA = RB = 20MΩ, RC = 100kΩ, RF = 0, RX = 100kΩ, and RK = ∞. RA = 50kΩ and RF = 1.95MΩ Step 4 The resistances seen by the + and – input terminals of the input amplifier A1 should be closely matched in order to minimize offset voltage due to bias currents. CASE 2: Input stage in high gain and output stage in low gain, use input potentiometer (R1) only. Output potentiometer (R2) may be disconnected. For example, GT = 100 could be obtained by setting RF = 2MΩ, RB = 2MΩ returned to pin 17, RA = 20kΩ, RX = 100kΩ, and RK = ∞. ∴RC = RA || (RF + 100kΩ) = 50kΩ || (1.95MΩ + 100kΩ) ≈ 49kΩ Output Stage: CASE 3: When it is necessary to perform a two-stage precision trim (to maintain a very small offset change under conditions of changing temperature and changing gain in A1 and A2), use step 1 to adjust the input stage and step 2 for the output stage. Carbon composition resistors are acceptable, but potentiometers should be stable. Step 5 VOUT = VIN MAX • G1 • G2 As discussed in Step 1, it is good practice to provide 25% input overrange. So we will calculate G2 for 10V output and 125% of the maximum input voltage. ∴VOUT = (1.25 • 0.1)(G1)(G2) i.e., 10V = 0.125 • 40 • G2 ∴G2 = 10V/5V = 2V/V Step 1: Input stage trim (RA = RC = 20kΩ, RI = RB = 20MΩ. RX = 100kΩ, RK = ∞, R2 disconnected); A1 high, A2 low gain. Adjust R1 for 0V ±5mV or desired setting at VOUT, pin 15. ® 3656 (16) Step 8 10 RF RX RK 9 2 10 D M 6 14 RA D 15 + A2 VOUT 5 R1 100kΩ 13 8 11 A1 – 17 16 RB 12 7 15V – + 4 1 RC 3 – 15V O/P PWR Pulse GEN 20 + R2 100kΩ 19 0.47µF I/P PWR FIGURE 5. Optional Offset Voltage Trim. Step 2: Output stage trim (RA = RB = 20MΩ, RC = 100kΩ, RF = 0, RX = 100kΩ, RK = ∞, R1 and R2 connected); A1 low, A2 low gain. Adjust R2 for 0V ±1mV or desired setting at VOUT, pin 15 (±110mV approximate total range). pass section (0.05Hz cutoff) is formed by the 1µF capacitor and 3MΩ resistor which are connected in series between the output demodulator and the inverting input of the output stage amplifier. The low-pass section (100Hz cutoff) is formed by the 68MΩ resistor and 22pF capacitor located in the feedback loop of the output stage. The diodes provide for quick recovery of the high-pass filter to overvoltages at the input. The 100kΩ pot and the 100MΩ resistor allow the output voltage to be trimmed to compensate for increased offset voltage caused by unbalanced impedances seen by the inputs of the output stage amplifier. NOTE: Other circuit component values can be used with valid results. APPLICATIONS ECG AMPLIFIER Although the features of the circuit shown in Figure 6 are important in patient monitoring applications, they may also be useful in other applications. The input circuitry uses an external, low quiescent current op amp (OPA177 type) powered by the isolated power of the input stage to form a high impedance instrumentation amplifier input (true threewire input). R3 and R4 give the input stage amplifier of the 3656 a noninverting gain of 10 and an inverting gain of –9. R1 and R2 give the external amplifier a noninverting gain of 1 + 1/9. The inputs are applied to the noninverting inputs of the two amplifiers and the composite input stage amplifier has a gain of 10. In many modern electrocardiographic systems, the patient is not grounded. Instead, the right-leg electrode is connected to the output of an auxiliary operational amplifier as shown in Figure 7. In this circuit, the common-mode voltage on the body is sensed by the two averaging resistors, R1 and R2, inverted, amplified, and fed back to the right-leg through resistor R4. This negative feedback drives the commonmode voltage to a low value. The body’s displacement current id does not flow to ground, but rather to the output circuit of A3. This reduces the pickup as far as the ECG amplifier is concerned and effectively grounds the patient. The value of R4 should be as large as practical to isolate the patient from ground. The resistors R3 and R4 may be selected by these equations: The 330kΩ, 1W, carbon resistors and diodes D1 - D4 provide protection for the input amplifiers from defibrillation pulses. R3 = (R1/2) (VO/VCM) and R4 = (VCM – VO)/id The output stage in Figure 6 is configured to provide a bandpass filter with a gain of 22.7 (68MΩ/3MΩ). The high- (–10V≤ VO ≤ +10V and –10V ≤ VCM ≤+10V) ® 11 3656 R3 3MΩ 9 68MΩ(1) 2 R1 11kΩ(2) 3MΩ 10 1µF 22pF R2 100kΩ R4 330kΩ OPA177 LA D M 6 1N4148s 14 100MΩ(4) D 330kΩ 1W High 15 A2 13 11 A1 16 1N4148s 300kΩ 7 D2 D1 12 Low 0.47µF (3) 4 D3 330kΩ RA 1W 17 D4 100kΩ 1 3 O/P PWR 19 RL + Pulse GEN 24V 0.5W 15VDC 0.47µF 20 – I/P PWR NOTES: (1) Bandpass 0.05Hz to 100Hz. (2) Adjustable resistor may be used to achieve max common-mode rejection between LA /RA and RL.(3) Negative 15V supply may be connected in place of 0.47µF capacitor if available. (4) See offset trimming section. FIGURE 6. ECG Amplifier. +V 9 D1 2 +V 330kΩ LA 3MΩ 10 1/2 OPA1013 D D2 300kΩ –V –V M 6 14 D R1 20kΩ 15 A2 +V +V D3 20 17 13 1/2 OPA1013 330kΩ RA R2 20kΩ 7 270kΩ 16 A1 19 11 12 –V 3MΩ D4 3656 100kΩ –V VO 4 0.1µF 1 R3 3 0.1µF 3MΩ 24V 0.5W +V R4 OPA177 +V –V id –V D1 = D2 = D3 = D4 = 1N459 FIGURE 7. Driven Right-Leg Amplifier. ® 3656 High Out 12 – + 15VDC Low Out where VO is the output voltage of A3, and VCM is the common-mode voltage between the inputs LA and RA and the input common at pin 3 of the 3656. be used to provide 15V for the pulse generator (pins 19 and 20). The input stage is configured as a unity gain buffer, although other configurations such as current input could be used. The circuit uses the isolation feature between the output stage and the primary power supply to generate the output current configuration that can work into a grounded load. Note that the output transistors can only drive positive current into the load. Bipolar current output would require a second transistor and dual supply. This circuit has the added benefit of having higher commonmode rejection than the circuit in Figure 6 (approximately 10dB improvement). BIPOLAR CURRENT OUTPUT The three-port capability of the 3656 can be used to implement a current output isolation amplifier function—usually difficult to implement when grounded loads are involved. The circuit is shown in Figure 8 and the following equations apply: G = IOUT/VIN = 1 + RF R2 X RA ISOLATED 4mA TO 20mA OUTPUT Figure 10 shows the circuit of an expanded version of the isolated current output function. It allows any input voltage range to generate the 4mA to 20mA output excursion and is also capable of zero suppression. The “span” (gain) is adjusted by R2 and the “zero” (4mA output for minimum input) is set by the 200kΩ pot in the output stage. A threeterminal 5V reference is used to provide a stable 4mA operating point. The reference is connected to insert an adjustable bias between the demodulator output and the noninverting input of the output stage. (R1 + R2) • RS IOUT ≤ ±2.5mA V1 ≤ ±4V (compliance) RL ≤ 1.6kΩ RF + RA = R1 + R2 ≤ 2MΩ DIFFERENTIAL INPUT Figure 11 shows the proper connections for differential input configuration. The 3656 is capable of operating in this input configuration only for floating loads (i.e., the source VIN has no connection to the ground reference established at pin 3). For this configuration the usual 2MΩ resistor used in CURRENT OUTPUT— LARGER UNIPOLAR CURRENTS A more practical version of the current output function is shown in Figure 9. If the circuit is powered from a source greater than 15V as shown, a three-terminal regulator should RF 9 2 10 D M 6 14 D IOUT RA + 15 A2 RL VL 13 11 A1 R2 17 RS – 16 12 7 R1 0.47µF 4 RC 0.47µF 1 3 O/P PWR + VIN Pulse GEN – 20 19 0.47µF + 15V – I/P PWR FIGURE 8. Bipolar Current Output. ® 13 3656 100kΩ 9 2 10 D M 6 14 D 15 A2 13 11 A1 17 250Ω 16 12 7 IOUT 0.47µF 10Ω 4 100kΩ 0.47µF 1 3 10Ω VIN Pulse GEN – 15V 19 0.47µF 20 + – 24V Supply RL O/P PWR + I/P PWR FIGURE 9. Isolated 1 to 5VIN/ 4mA to 20mA IOUT. 400kΩ 9 2 R1 10 RF D M 6 14 R2 2N2219A D R3 15 A2 RA 1.5MΩ 13 RC 7 11 A1 17 REF02 5V 200kΩ 200Ω 16 12 IOUT 200kΩ 0.47µF + 4 VIN 0.47µF 1 – 3 O/P PWR Pulse GEN 20 I/P PWR FIGURE 10. Isolated 4mA to 20mA IOUT. ® 3656 14 15V + 19 24V Supply 0.47µF – Ripple Filter RL RF 1MΩ 100kΩ 9 2 10 D M 6 14 D R1 15 + A2 + VOUT VIN – 13 11 A1 R1 2MΩ 17 16 12 7 – 4 1 RF 1MΩ + 3 15V O/P PWR Pulse GEN – 0.47µF 19 + 15V 20 I/P PWR – VOUT = –VIN (RF/R1) RF = R1 FIGURE 11. Differential Input, Floating Source. the input stage is split into two halves, RF and RF–. The demodulator load (seen by pin 10 with respect to pin 3) is still 2MΩ for the floating load as shown. Notice pin 19 is common in Figure 11 whereas pin 20 is common in previous figures. in Figure 13. Here the instrumentation grade OPA177 is supplied from the isolated power of the input stage. The 3656 is configured as a unity-gain buffer. The gain of the OPA177 stage must be chosen to limit its full scale output voltage to 5V and avoid overdriving the 3656’s demodulators. Since the 3656 draws a significant amount of supply current, extra filtering or the input supply is required as shown (2 x 0.47µF). SERIES STRING SOURCE Figure 12 shows a situation where a small voltage, which is part of a series string of other voltages, must be measured. The basic problem is that the small voltage to be measured is 500V above the system ground (i.e., a system commonmode voltage of 500V exists). The circuit converts this system CMV to an amplifier isolation mode voltage. Thus, the isolation voltage ratings and isolation-mode rejection specifications apply. ELECTROMAGNETIC RADIATION The transformer coupling used in 3656 for isolation makes the 3656 a source of electromagnetic radiation unless it is properly shielded. Physical separation between the 3656 and sensitive components may not give sufficient attenuation by itself. In these applications, the use of an electromagnetic shield is a must. A shield, Burr-Brown 100MS, is specially designed for use with the 3656 package. Note that the offset voltage appearing at pin 15 may change by 4mV to 12mV with use of the shield; however, this can be trimmed (see Offset Trimming section). IMPROVED INPUT CHARACTERISTICS In situations where it is desired to have better DC input amplifier characteristics than the 3656 normally provides, it is possible to add a precision operational amplifier as shown The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 15 3656 RF 100kΩ 9 2 6 10 RA D M 14 D 13 ≈ 500V RC + VS – 11 A1 VOUT 2MΩ – 17 16 12 7 4 VIN = 500mV 1 + 3 15V – O/P PWR 0.47µF 19 1000V Pulse GEN RS = 10Ω + 15 A2 ≈ 500V + 15V – 20 VOUT = [VIN ( 500V/1MR)] [ 1 + (RF/RA)] RA + RF = 2MΩ I/P PWR FIGURE 12. Series Source. 100kΩ 9 2 10 D M 6 14 D 15 A2 R1 13 R2 7 OPA177 VOUT 11 A1 17 16 12 – + 4 VIN 1 + 3 15V – O/P PWR 0.47µF Pulse GEN 0.47µF – 0.47µF 19 20 I/P PWR FIGURE 13. Isolator for Low-Level Signals. ® 3656 + 16 VOUT = [1 + (R1/R2)] VIN + 15V – IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated