® REF200 REF 200 REF 200 DUAL CURRENT SOURCE/CURRENT SINK FEATURES APPLICATIONS ● COMPLETELY FLOATING: No Power Supply or Ground Connections ● SENSOR EXCITATION ● BIASING CIRCUITRY ● HIGH ACCURACY: 100µA ±0.5% ● LOW TEMPERATURE COEFFICIENT: ±25ppm/°C ● WIDE VOLTAGE COMPLIANCE: 2.5V to 40V ● OFFSETTING CURRENT LOOPS ● LOW VOLTAGE REFERENCES ● CHARGE-PUMP CIRCUITRY ● HYBRID MICROCIRCUITS ● ALSO INCLUDES CURRENT MIRROR DESCRIPTION The REF200 combines three circuit building-blocks on a single monolithic chip—two 100µA current sources and a current mirror. The sections are dielectrically isolated, making them completely independent. Also, since the current sources are twoterminal devices, they can be used equally well as current sinks. The performance of each section is individually measured and laser-trimmed to achieve high accuracy at low cost. The sections can be pin-strapped for currents of 50µA, 100µA, 200µA, 300µA or 400µA. External circuitry can be used to obtain virtually any current. These and many other circuit techniques are shown in the Applications section of this Data Sheet. I1 High I2 High Substrate Mirror In 8 7 6 5 100µA 100µA 1 2 3 4 I1 Low I2 Low Mirror Common Mirror Out The REF200 is available in plastic 8-pin mini-DIP and SOIC packages. International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1988 Burr-Brown Corporation SBVS020 PDS-851D Printed in U.S.A. October, 1993 SPECIFICATIONS ELECTRICAL At TA = +25°C, VS = 15V, unless otherwise noted. REF200AP, AU PARAMETER CONDITION CURRENT SOURCES Current Accuracy Current Match Temperature Drift Output Impedance MIN Specified Temp Range 2.5V to 40V 3.5V to 30V BW = 0.1Hz to 10Hz f = 10kHz TMIN to TMAX Noise Voltage Compliance (1%) Capacitance CURRENT MIRROR 20 200 TYP MAX UNITS ±0.25 ±0.25 25 100 500 1 20 See Curves 10 ±1 ±1 % % ppm/°C MΩ MΩ nAp-p pA/√Hz 1 25 100 0.05 1.4 See Curves 5 1.005 pF I = 100µA Unless Otherwise Noted Gain Temperature Drift Impedance (output) Nonlinearity Input Voltage Output Compliance Voltage Frequency Response (–3dB) 0.995 2V to 40V I = 0µA to 250µA 40 Transfer TEMPERATURE RANGE Specification Operating Storage ppm/°C MΩ % V MHz –25 –40 –40 +85 +85 +125 °C °C °C ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Top View DIP/SOIC I1 Low 1 8 I1 High I2 Low 2 7 I2 High Mirror Common 3 6 Substrate Mirror Output 4 5 Mirror Input Applied Voltage ..................................................................... –6V to +40V Reverse Current ........................................................................... –350µA Voltage Between Any Two Sections ................................................. ±80V Operating Temperature ................................................... –40°C to +85°C Storage Temperature ..................................................... –40°C to +125°C Lead Temperature (soldering, 10s) .............................................. +300°C (SOIC 3s) ........................................................ +260°C PACKAGE/ORDERING INFORMATION ELECTROSTATIC DISCHARGE SENSITIVITY PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) REF200AP REF200AU 8-Pin Plastic DIP 8-Pin SOIC 006 182 TEMPERATURE RANGE –25°C to +85°C –25°C to +85°C NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Grade designation “A” may not be marked. Absence of grade designation indicates A grade. This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® REF200 2 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = +15V, unless otherwise noted. CURRENT SOURCE TEMPERATURE DRIFT DISTRIBUTION 100.1 600 100 500 99.9 400 Quantity (Units) Current (µA) CURRENT SOURCE TYPICAL DRIFT vs TEMPERATURE 99.8 Drift specified by “box method” (See text) 99.7 85°C 501 454 Distribution of three production lots — 1284 Current Sources. 300 200 117 99.6 86 100 99.5 0 –50 –25 0 25 50 75 100 125 0 30 15 5 6 0 1 1 10 15 20 25 30 35 40 45 50 55 60 65 Temperature (°C) Temperature Drift (ppm/°C) CURRENT SOURCE OUTPUT CURRENT vs VOLTAGE CURRENT SOURCE OUTPUT CURRENT vs VOLTAGE 100.5 100.4 100.6 100.3 100.4 100.2 Current (µA) 101 100.8 100.2 100 99.8 100.1 25°C 100 99.9 99.6 99.8 99.4 99.7 99.2 99 99.6 –55°C 125°C 99.5 0 5 10 15 20 25 30 35 40 0 1 2 3 4 Voltage (V) Voltage (V) CURRENT SOURCE CURRENT NOISE (0.1Hz to 10Hz) CURRENT SOURCE REVERSE CURRENT vs REVERSE VOLTAGE 5 1000 900 12kΩ 800 Reverse Current (µA) Output Current (500pA/div) Current (µA) 66 5 2 7V Reverse Voltage Circuit Model 700 600 5kΩ 500 400 Safe Reverse Current 300 200 Safe Reverse Voltage 100 0 0 Time (500ms/div) –2 –4 –6 –8 –10 –12 Reverse Voltage (V) ® 3 REF200 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = +15V, unless otherwise noted. MIRROR TRANSFER NONLINEARITY MIRROR GAIN ERROR vs CURRENT 0.1 5 4 Nonlinearity (% of 250µA) VO = 1V 2 Error (%) 1 0 –1 VO = 1.5V –2 –3 0.06 0.04 0.02 0 –0.02 –0.04 –0.06 –0.08 –4 –5 –0.01 10µA 100µA 0 1mA Mirror Current (A) MIRROR INPUT VOTAGE/OUTPUT COMPLIANCE VOLTAGE vs CURRENT 4 3 Input Voltage (V) Data from Three Representative Units (Least-square fit) 0.08 VO = 1.25V 3 2 Input Voltage Output Compliance Voltage 1 0 1µA 10µA 100µA 1mA 10mA Current ® REF200 4 50 100 150 Current (µA) 200 250 APPLICATIONS INFORMATION The three circuit sections of the REF200 are electrically isolated from one another using a dielectrically isolated fabrication process. A substrate connection is provided (pin 6), which is isolated from all circuitry. This pin should be connected to a defined circuit potential to assure rated DC performance. The preferred connection is to the most negative constant potential in your system. In most analog systems this would be –VS. For best AC performance, leave pin 6 open and leave unused sections unconnected. 5 8,7 4 5kΩ Drift performance is specified by the “box method,” as illustrated in the Current vs Temperature plot of the typical performance curves. The upper and lower current extremes measured over temperature define the top and bottom of the box. The sides are determined by the specified temperature range of the device. The drift of the unit is the slope of the diagonal—typically 25ppm/°C from –25°C to +85°C. 1kΩ 1kΩ 3 Current Mirror If the current sources are subjected to reverse voltage, a protection diode may be required. A reverse voltage circuit model of the REF200 is shown in the Reverse Current vs Reverse Voltage curve. If reverse voltage is limited to less than 6V or reverse current is limited to less than 350µA, no protection circuitry is required. A parallel diode (Figure 2a) will protect the device by limiting the reverse voltage across the current source to approximately 0.7V. In some applications, a series diode may be preferable (Figure 2b) because it allows no reverse current. This will, however, reduce the compliance voltage range by one diode drop. (Substrate) Current Source (1 of 2) 8X 12kΩ 4kΩ 6 Applications for the REF200 are limitless. Application Bulletin AB-165 shows additional REF200 circuits as well as other related current source techniques. A collection of circuits is shown to illustrate some techniques. Also, see AB-165A. 1,2 FIGURE 1. Simplified Circuit Diagram. NOTE: All diodes = 1N4148. D1 D3 100µA Bidirectional Current Source D1 Bidirectional Current Source 100µA 100µA D4 (a) (b) D2 D2 (c) (d) FIGURE 2. Reverse Voltage Protection. ® 5 REF200 +VS 100µA IOUT 5 In 4 Out 50µA Mirror Com 3 100µA –VS FIGURE 3. 50µA Current Source. 300µA 200µA 100µA 100µA 100µA 5 In 100µA 400µA 100µA 100µA 4 Out 5 In Mirror 4 Out Mirror Com 3 Com 3 Compliance = 4V Compliance = 4V (a) (b) (c) FIGURE 4. 200µA, 300µA, and 400µA Floating Current Sources. Compliance to Ground +VS 50µA +VS Compliance to –VS + 5V 100µA Compliance to –VS + 5.1V 27kΩ 50µA 5 In 4 Out 5 In Mirror Com 3 4 Out 5 In Mirror 100µA 4 Out Mirror Com 3 0.01µF 50µA 100kΩ 100µA Com 3 5.1V 1N4689 100µA –VS (a) –VS –VS (b) (c) FIGURE 5. 50µA Current Sinks. ® REF200 6 SERIES-CONNECTED CURRENT SOURCES CURRENT vs APPLIED VOLTAGE +VS 101 High 100µA 100µA Current (µA) 100µA 100µA/200µA 5 In 100µA Low 100 4 Out Mirror 99 Com 3 0 10 20 30 40 50 60 70 80 Applied Voltage (V) –VS Compliance to –VS + 1.5V Provides 2X Higher Compliance Voltage FIGURE 6. Improved Low-Voltage Compliance. FIGURE 7. 100µA Current Source—80V Compliance. +VS +VS 100µA 0.01µF L o a d 5.1V 1N4689 100µA –VS (a) Compliance approximate to Gnd. HV compliance limited by FET breakdown. (b) Compliance to +VS – 5V. L o a d 27kΩ High L o a d 100µA +VS –VS 100µA 33kΩ 1N4148 1N4148 –VS 100µA 40kΩ 0.01µF 40kΩ 100µA (c) 0.01µF ± 0.01µF 40kΩ ± 0.01µF 100µA Low 1N4148 (d) Floating 200µA cascoded current source. 100µA 40kΩ 1N4148 (e) Bidirectional 200µA cascoded current source. NOTES: (1) FET cascoded current sources offer improved output impedance and high frequency operation. Circuit in (b) also provides improved PSRR. (2) For current sinks (Circuits (a) and (b) only), invert circuits and use “N” channel JFETS. FIGURE 8. FET Cascode Circuits. ® 7 REF200 Using Standard Potentiometer +VS Using Bourns Op Amp Trimpot +VS VIN ® VIN RB RA RB RA 100µA 100µA VOUT VOUT Op Amp Op Amp 51Ω To Other Amps (1) To Other Amps 2kΩ Linear (1) 100Ω ® Bourns Trimpot 51Ω 100µA 100µA VOUT = VIN (–R B /RA ) Offset Adjustment Range = ±5mV –VS VOUT = –VIN (R B /RA ) Offset Adjustment Range = ±5mV –VS NOTE: (1) For N Op Amps, use Potentiometer Resistance = N • 100Ω. FIGURE 9. Op Amp Offset Adjustment Circuits. ® REF200 8 R2 +VS 100µA NOTE: (1) Burr Brown® OPA602 or OPA128 0.01µF EXAMPLES (1) I OUT = N • 100µA R1 (N • R2 ) R1 R2 IOUT 100Ω 10kΩ 10kΩ 10MΩ 1MΩ 1kΩ 1nA 1µA 1mA Use OPA128 R1 (N • R 2 ) I OUT = N • 100µA (1) 0.01µF 100µA R2 –VS (a) (b) FEATURES: (1) Zero volts shunt compliance. (2) Adjustable only to values above reference value. NOTE: Current source/sink swing to the “Load Return” rail is limited only by the op amp's input common mode range and output swing capability. Voltage drop across “R” can be tailored for any amplifier to allow swing to zero volts from rail. +VS 100µA OPA602 0.01µF NR IO = (N +1) 100µA R NR 0.01µF EXAMPLES R R NR IOUT 1kΩ 1kΩ 100kΩ 4kΩ 9kΩ 9.9kΩ 500µA 1mA 10mA OPA602 100µA Reference IO = (N +1) 100µA –VS (c) (d) IO = (N +1) 100µA 100µA OPA602 IO = 100µA (N + 1). Compliance ≈ 3.5V with 0.1V across R. Max IO limited by FET. For IO = 1A, R = 0.1Ω, NR = 1kΩ. 10pF 0.01µF R NR (e) FIGURE 10. Adjustable Current Sources. ® 9 REF200 ROFFSET Cable Shield INA110 Instrumentation Amplifier RTD VOUT = Gain • 200µA • ∆ RTD 200µA Reference Current 200µA Compensation Current +VS 8 6 7 5 I A B 1 2 O C 3 REF200 4 –VS FIGURE 11. RTD Excitation With Three Wire Lead Resistance Compensation. 2Vp-p Triangle Output C OPA602 Square Output 2Vp-p R 10kΩ Frequency = 1/4RC (Hz) Frequency = 25/C (Hz) (C is in µF and R = 10kΩ) 1N4148 1N4148 Bidirectional Current Source 1/2 REF200 1N4148 1N4148 FIGURE 12. Precision Triangle Waveform Generator. ® REF200 10 100kΩ VIN –10V ≤ VIN ≤ +10V C 100µA + Bridge (See Figure 12) 1/4 OPA404 1/4 OPA404 1/4 OPA404 100µA + Bridge (See Figure 12) 12Vp-p Duty Cycle Out 60kΩ VIN = +10V: 100% Duty Cycle VIN = 0V: 50% Duty Cycle VIN = –10V: 0% Duty Cycle FIGURE 13. Precision Duty-Cycle Modulator. For current source, invert circuitry and use P-Channel FET. IOUT IOUT For current source, invert circuitry and use P-Channel FET. 50kΩ 0.1µF Siliconix J109 Siliconix J109 0.1µF 0.1µF 50kΩ 100µA 100µA 50kΩ 100µA –15V –15V FIGURE 14. Low Noise Current Sink. FIGURE 15. Low Noise Current Sink with Compliance Below Ground. ® 11 REF200 High 300µA 0.01µF 20kΩ 100µA High 400µA 100µA 2N5116 0.01µF 20kΩ 100µA 2N5116 2N4340 0.01µF 2N4340 27kΩ 5 In 4 Out 5 In 100µA Mirror Com 3 4 Out Mirror Com 3 300µA Low 400µA Low (a) Regulation (15V to 30V = 0.00003%/V (10GΩ) (10G (a) Regulation (15V to 30V = 0.000025%/V (10GΩ) (10G FIGURE 16. Floating 300µA and 400µA Cascoded Current Sources. High +VS Compliance 4V to 30V 100µA 25mA 10kΩ 100Ω C 10kΩ VI OPA602 100µA VO = –VI 100Ω Diodes: 1N4148 or PWS740-3 Diode Bridge for reduced VOS . VO Rate Limit = 100µA/C 100µA +VS –VS –VS 100Ω 100Ω FIGURE 17. Rate Limiter. 10kΩ 40.2Ω Low NOTE: Each amplifier 1/4 LM324. Op amp power supplies are derived within the circuitry, and this quiescent current is included in the 25mA. FIGURE 18. 25mA Floating Current Source. ® REF200 12 +15V VO 100µA R (50kΩ) +10 R (50kΩ) VI +5 1N4148 –10 –5 +5 +10 VI 10pF –5 1N4148 For VI > –5V: VO = 0 For VI < –5V: VO = –VI – 5V (Dead to 100µA • R) VO OPA602 –10 R (50kΩ) R (50kΩ) VO +10 VI 1N4148 +5 –10 100µA –5 +5 +10 VI 10pF 1N4148 –15V VO OPA602 –5 For VI < 5V: VO = 0 For VI > 5V: VO = 5V – VI (Dead to –100µA • R) –10 FIGURE 19. Dead-Band Circuit. +15V VO +10 100µA R (50kΩ) R (50kΩ) +5 –10 1N4148 –5 +5 +10 VI –5 10pF 1N4148 10kΩ OPA602 –10 For VI > 5V: VO = VI – 5V For VI < –5V: VO = VI + 5V (Dead to ±100µA • R) 10kΩ VI 10kΩ VO R (50kΩ) OPA602 R (50kΩ) 1N4148 100µA 10pF 1N4148 –15V OPA602 FIGURE 20. Double Dead-Band Circuit. ® 13 REF200 +VS +VS 100µA 100µA VO = 100µV OPA602 VO = 1V 1Ω 0.01µF FIGURE 21. Low-Voltage Reference. 10kΩ FIGURE 22. Voltage Reference. VO +10 +7.5V (R = 75kΩ) 1kΩ +5V (R = 50kΩ) +5 100µF +2.5V (R = 25kΩ) VO OPA121 –10 –5 +5 +10 VI OPA121 VI 100µA with bridge (See Figure 2) R (50kΩ) –2.5V (R = 25kΩ) VO = V I (–5V < VI < 5V) VO = 5V (VI > 5V) VO = –5V (VI < –5V) (Bound = 100µA • R) –5 +5V (R = 50kΩ) +7.5V (R = 75kΩ) –10 FIGURE 23. Bipolar Limiting Circuit. VO 1kΩ +10 +7.5V (R = 75kΩ) 100µF 1N4148 +5V (R = 50kΩ) +5 OPA121 +2.5V (R = 25kΩ) VO –10 OPA121 –5 +5 +10 VI VI 100µA R (50kΩ) VO = V I (V I < 5V) VO = 5V (VI > 5V) (VLIMIT = 100µA • R) FIGURE 24. Limiting Circuit. ® REF200 14 –5 –10 +VS +5V 100µA VO 1kΩ The Window 5V 1/2 LM393 0 –VW +VW VI VCENTER (2) 0.01µF (1) R(3) (1) (3) –VW , +VW = 100µA • R VCENTER(2) VO 0.01µF R 1/2 LM393 VI 100µA –VS NOTES: (1) Capacitors optional to reduce noise and switching time. (2) Programs center of threshold voltage. (3) Programs window voltage. FIGURE 25. Window Comparator. +VS 100µA 100µA 1/2 OPA1013 1/2 OPA1013 PMI MAT03 +In –In –VS INA105 VO = +In – (–In) FIGURE 26. Instrumentation Amplifier with Compliance to –VS. ® 15 REF200 PACKAGE OPTION ADDENDUM www.ti.com 26-Mar-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) REF200AP OBSOLETE PDIP P 8 TBD Call TI REF200AU ACTIVE SOIC D 8 100 Green (RoHS & no Sb/Br) CU NIPDAU Call TI Level-3-260C-168 HR REF200AU/2K5 ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR REF200AU/2K5E4 ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR REF200AUE4 ACTIVE SOIC D 8 100 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR REF200AUG4 ACTIVE SOIC D 8 100 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Mailing Address: Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated