3650 3652 ® Optically-Coupled Linear ISOLATION AMPLIFIERS FEATURES APPLICATIONS ● BALANCED INPUT ● INDUSTRIAL PROCESS CONTROL ● LARGE COMMON-MODE VOLTAGES: ±2000V Continuous 140dB Rejection ● ULTRA LOW LEAKAGE: 0.35µA max at 240V/60Hz 1.8pF Leakage Capacitance ● DATA ACQUISITION ● INTERFACE ELEMENT ● BIOMEDICAL MEASUREMENTS ● PATIENT MONITORING ● TEST EQUIPMENT ● CURRENT SHUNT MEASUREMENT ● EXCELLENT GAIN ACCURACY: 0.05% Linearity 0.05%/1000 Hrs Stability ● GROUND-LOOP ELIMINATION ● SCR CONTROLS ● WIDE BANDWIDTH: 15kHz ±3dB 1.2V/µs Slew Rate DESCRIPTION The 3650 and 3652 are optically coupled integrated circuit isolation amplifiers. Prior to their introduction commercially available isolation amplifiers had been modular or rack mounted devices using transformer coupled modulation demodulation techniques. Compared to these earlier isolation amplifiers, the 3650 and 3652 have the advantage of smaller size, 6 lower cost, wider bandwidth and integrated circuit reliability. Also, because they use a DC analog modulation technique as opposed to a carrier-type technique, they avoid the problems of electromagnetic interference (both transmitted and received) that most of the modular isolation amplifiers exhibit. 1.6MΩ 4 A1 8 RG1 11 RIN 3 1 A1 9 RG2 A3 Light Flux Coupling A4 23 10 1.6MΩ 3652 Only Common to 3650 and 3652 International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1976 Burr-Brown Corporation SBOS129 PDS-342L 1 Printed in U.S.A. August, 1997 3650/52 SPECIFICATIONS At +25°C and ±15VDC supply voltages, unless otherwise specified. 3650MG, HG(1) PRODUCT 3650JG 3650KG 3652MG, HG(1) 3652JG ISOLATION Isolation Voltage Rated Continuous, min Tested Voltage, min, 10s Duration 2000Vp or VDC 5000Vp Isolation Mode Rejection, G = 10 DC 60Hz, 5000Ω Source Unbalance Leakage Current, 240V/60Hz Isolation Impedance Capacitance Resistance 140dB 120dB 0.35µA, max 1.8pF 1012Ω GAIN Gain Equation for Current Sources G1 = 106V/Amp 106 V/V RG1 + RG2 + RIN for Voltage Sources Input Resistance, RIN, max Buffer Output Impedance, RO Gain Equation Error, max(3) Gain Nonlinearity Gain vs Temperature Gain vs Time G1 = 1.0057 x 106V/Amp(2) 106 V/V RG1 + RG2 + RIN + RO GV1 = 25Ω Not Applicable 25Ω 90Ω ±30Ω 1.5% 0.5% 0.5% 1.5%(4) 0.5%(4) ±0.05% typ ±0.2% max ±0.03% typ ±0.1% max ±0.02% typ ±0.05% max ±0.05% typ ±0.2% max ±0.05% typ ±0.1% max 300ppm/°C 100ppm/°C 50ppm/°C 300ppm/°C 200ppm/°C ±0.05%/1000hrs ±0.05%/1000hrs Frequency Response Slew Rate ±3dB Frequency Settling Time to ±0.01% to ±0.1% 0.7V/µs min, 1.2V/µs typ 15kHz 400µs 200µs INPUT STAGE(5) Input Offset Voltage at 25°C, max(3) vs Temperature, max vs Supply vs Time Input Bias Current at 25°C vs Temperature vs Supply ±5mV ±25µV/°C ±1mV ±10µV/°C 100µV/V 50µV/1000hrs ±0.5mV ±5µV/°C ±5mV ±50µV/°C ±2mV ±25µV/°C 100µV/V 100µV/1000hrs 10nA typ, 40nA max 0.3nA/°C 0.2nA/V 10pA typ, 50pA max Doubles Every +10°C 1pA/V Input Offset Current vs Temperature vs Supply Effects Included In Output Offset 10pA Doubles Every +10°C 1pA/V Input Impedance Differential Common-Mode “RIN” = 25Ω max 109Ω 1011Ω 1011Ω 4µVp-p 4µVrms 8µVp-p 5µVrms ±(|V| –5)V ±V Not Applicable(6) Not Applicable(6) ±(|V| –5) ±V ±300V for 10ms(7) ±3000V for 10ms(7) Input Noise Voltage, 0.05Hz to 100Hz 10Hz to 10kHz Input Voltage Range Common-Mode, Linear Operation, w/o damage, at +, – at +I, –I at +IR, –IR Differential, w/o damage, at +, – Differential, w/o damage, at +I, –I Differential, w/o damage, at +IR, –IR ±V Not Applicable ±V ±600V for 10ms(7) Not Applicable ±6000V for 10ms(7) Common-Mode Rejection, 60Hz 90dB at 60Hz, 5kΩ Imbalance 80dB at 60Hz, 5kΩ Imbalance ±8V to ±18V ±8V to ±18V ±1.2mA(8) +6.5mA or –6.5mA, typ +12mA or –12mA, max ±3mA(8) +8.5mA or –8.5mA, typ +16mA, or –16mA, max Power Supply (Input Stage Only) Voltage (at “+V” and “–V”) Current Quiescent with ±10V Output(7) ® 3650/52 2 SPECIFICATIONS (CONT) At +25°C and ±15VDC supply voltages, unless otherwise specified. 3650MG, HG(1) PRODUCT 3650JG 3650KG 3652MG, HG(1) 3652JG OUTPUT STAGE ±10V ±5mA Output Voltage, min Output Current, min Output Offset Voltage at 25°C, max(3) vs Temperature, max vs Supply vs Time ±25mV ±900µV/°C ±10V ±5mA ±10mV ±450µV/°C ±500µV/V ±1mV/1000hrs Output Noise Voltage 0.05Hz to 100Hz 10Hz to 1kHz ±10mV ±300µV/°C ±25mV ±900µV/°C ±10mV ±450µV/°C ±500µV/V ±1mV/1000hrs 50µVp-p 65µVrms 50µVp-p 65µVrms Power Supply (Output Stage Only) Voltage (“+VCC” and “–VCC”) Current Quiescent with ±5mA Output, max ±8V to ±18V ±2.3mA typ, ±6mA max ±11mA TEMPERATURE(9) Specification Operating Storage 0°c to +85°C –40°C to +100°C –40°C to +125°C NOTES: (1) All electrical and mechanical specifications of the 3650MG and 3652MG are identical to the 3650HG and 3652HG, respectively, except that the following specifications apply to the 3650MG and 3652MG: (a) Isolation test voltage duration increased from 10 seconds minimum to 60 seconds minimum; (b) Input offset voltage at 25°C, max: ±10mV; vs temperature max: ±100µV/°C; (c) Output offset voltage at 25°C, max; ±50mV; vs temperature max; ±1.8mV/°C. (2) If used as 3650, see Installation and Operating Instructions. (3) Trimmable to zero. (4) Gain error terms specified for inputs applied through buffer amplifiers (i.e., ±1 or ±IR pins). (5) Input stage specifications at +I and –I inputs for 3652 unless otherwise noted. (6) Maximum safe input current at either input is 10mA. (7) Continuous rating is 1/3 pulse rating. (8) Load current is drawn from one supply lead at a time: other supply current at quiescent level. For 3652 add 0.2mA/V of positive CMV. (9) dT/dt < 1°C/minute below 0°C, and long-term storage above 100°C is not recommended. Also limit the repeated thermal cycles to be within the 0°C to +85°C temperature range. PACKAGE INFORMATION PIN CONFIGURATIONS 13 14 3650 26 –V 11 +V + 20 +VCC PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) 3650 3652 32-Pin DIP 32-Pin DIP 77 77 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. 23 –VCC C 10 Bal – 12 17 ELECTROSTATIC DISCHARGE SENSITIVITY C Bal 15 16 8 29 13 14 RO 2 4 This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. 3652 1.6MΩ A1 Gain Adj 6 11 32 ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 26 –V +V + 20 +VCC 23 –VCC C 3 1 A2 1.6MΩ Bal – Gain Adj RO 2 9 17 C Bal 10 12 15 16 32 29 The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 3650/52 TYPICAL PERFORMANCE CURVES Typical at +25°C and ±15VDC power supplies, unless otherwise noted. INPUT STAGE SUPPLY CURRENT vs OUTPUT VOLTAGE ISOLATION LEAKAGE CURRENT vs ISOLATION VOLTAGE 12 5 Max at 70°C Leakage Current µA AC or 100s pA, DC Supply Current (mA) 10 Max at 25°C 8 Typ at 70°C 6 Typ at 25°C Typ at 25°C 4 3mA 2 –10 –15 –5 0 5 10 3 Typ at 60Hz 2 Typ at DC 1 1.2mA 0 4 0 15 1 0 2 Output Voltage (V) 3 4 5 6 Isolation Voltage (kV) at V– at V+ Add 2mA typ, 4mA max for 3652 REJECTION vs RESISTOR IMBALANCE NORMALIZED LINEARITY vs TEMPERATURE 1.5 160 IMR 60Hz CMR 60Hz G =100 Rejection (dB) Relative Nonlinearity 1.4 1.3 1.2 120 G =1 80 G =100 3652 1.1 3650 G =1 G =1 3652 40 1 –25 0 25 50 75 0 100 0.25 0.50 1 0.75 Input Resistor Imbalance RG2 RG1 or RG1 + RG2 RG1 + RG2 Temperature (°C) DISTORTION vs FREQUENCY GAIN ERROR vs FREQUENCY 2 10 VOUT = +10V RL = 2kΩ Gain = 1 0 Gain Error (dB) 3 Distortion (%) G =100 3650 1 0.3 –2 Gain = 100 –4 –6 0.1 –8 0.1 3 1 3 10 1 Frequency (kHz) 10 Frequency (kHz) ® 3650/52 3 4 30 TYPICAL PERFORMANCE CURVES (CONT) Typical at +25°C and ±15VDC power supplies, unless otherwise noted. OUTPUT VOLTAGE SWING vs INPUT SUPPLY VOLTAGE PHASE SHIFT vs FREQUENCY 0 15 25°C Output Voltage (V) Gain 1 to 100 –80 –120 10 70°C Typ at 25°C Guaranteed Min at Output Supply ±15V 5 –160 –200 0 0.3 1 3 10 30 5 10 Input Supply Voltage (V) 3650 COMMON-MODE AND ISOLATION-MODE REJECTION vs GAIN 3652 COMMON-MODE AND ISOLATION-MODE REJECTION vs GAIN 140 140 60Hz at I pins ins DC 60Hz 100 Rejection (dB) Rejection (dB) DC 120 120 DC 60Hz 80 IRp 60Hz at IR pins 100 60Hz at I pins DC at I or IR pins 10 100 Isolation-mode Rejection Common-mode Rejection 60Hz at IR pins 60 60 1 at r Io 80 Isolation-mode Rejection Common-mode Rejection 1 1000 10 Gain 14 120 Estimated Output Swing (+V) IMR CMR Supply Voltage 3650 80 1000 OUTPUT VOLTAGE AND GAIN ERROR vs TIME REJECTION vs FREQUENCY 100 100 Gain 140 Rejection (dB) 20 15 Frequency (kHz) +V 3652 60 0.5 70°C 70°C 12 0.1 Gain Error Change 25°C 10 0.05 –V Gain = 100 40 8 0.1 0.3 Gain Error Change (%) Phase Shift (Deg) –40 1 3 10 30 100 Frequency (kHz) 0 1k 10k 100K Time of Operation (Hours) ® 5 3650/52 DEFINITIONS NONLINEARITY Nonlinearity is specified to be the peak deviation from a best straightline expressed as a percent of peak-to-peak full scale output (i.e. ±10mV at 20Vp-p ≈ 0.05%). ISOLATION-MODE VOLTAGE, VISO The isolation-mode voltage is the voltage which appears across the isolation barrier, i.e., between the input common and the output common. (See Figure 1.) THEORY OF OPERATION Two isolation voltages are given in the electrical specifications: “rated continuous” and “test voltage”. Since it is impractical on a production basis to test a “continuous” voltage (infinite test time is implied), it is a generally accepted practice to test at a significantly higher voltage for some reasonable length of time. For the 3650 and 3652, the “test voltage” is equal to 1000V plus two times the “rated continuous” voltage. Thus, for a continuous rating of 2000V, each unit is tested at 5000V. Prior to the introduction of the 3650 family optical isolation had not been practical in linear circuits. A single LED and photodiode combination, while useful in a wide range of digital isolation applications, has fundamental limitations— primarily nonlinearity and instability as a function of time and temperature. The 3650 and 3652 use a unique technique to overcome the limitations of the single LED and photodiode isolator. Figure 2 is an elementary equivalent circuit for the 3650, which can be used to understand the basic operation without considering the cluttering details of offset adjustment and biasing for bipolar operation. COMMON-MODE VOLTAGE, VCM The common-mode voltage is the voltage midway between the two inputs of the amplifier measured with respect to input common. It is the algebraic average of the voltage applied at the amplifiers’ input terminals. In the circuit in Figure 1, (V+ + V–)/2 = VCM. (NOTE: Many applications involve a large system “common-mode voltage.” Usually in such cases the term defined here as “VCM” is negligible and the system “common-mode voltage” is applied to the amplifier as “VISO” in Figure 1.) Isolation Barrier CR3 CR1 RK CR2 I1 I2 λ1 RG +V – – ISOLATION-MODE REJECTION VIN I2 A1 IIN The isolation-mode rejection is defined by the equation in Figure 1. The isolation-mode rejection is not infinite because there is some leakage across the isolation barrier due to the isolation resistance and capacitance. +VCC λ2 A2 + I3 + –V VOUT –VCC Output Common Input Common VOUT = VIN RK RG Isolation Barrier RG1 FIGURE 2. Simplified Equivalent Circuit of Linear Isolator. + V+ Two matched photodiodes are used—one in the input (CR3) and one in the output stage (CR2)—to greatly reduce nonlinearities and time-temperature instabilities. Amplifier A1, LED CR1, and photodiode CR3 are used in a negative feedback configuration such that I1 = IIN RG (where RG is the user supplied gain setting resistor). Since CR2 and CR3 are closely matched, and since they receive equal amounts of light from the LED CR1 (i.e., λ1 = λ2), I2 = I1 = IIN. Amplifier A2 is connected as a current-to-voltage converter with VOUT = I2 RK where RK is an internal 1MΩ scaling resistor. Thus the overall transfer function is: RIN VD + RG2 V– VOUT – IL VCM C (Output) C (Input) VISO VOUT = 106 RG1 + RG2 + RIN VD + VCM CMRR – System Ground + VISO VOUT = VIN IMRR This improved isolator circuit overcomes the primary limitations of the single LED and photodiode combination. The transfer function is now virtually independent of any degradation in the LED output as long as the two photodiodes and optics are closely matched(1). Linearity is now a FIGURE 1. Illustration of Isolation-Mode and CommonMode Specifications. NOTE: (1) The only effect of decreased LED output is a slight decrease in full scale swing capability. See Typical Performance Curves. ® 3650/52 106 , (RG in Ωs) RG 6 function of the accuracy of the matching and is further enhanced by the use of negative feedback in the input stage. Advanced laser trimming techniques are used to further compensate for residual matching errors. lower bias currents (50pA) and overvoltage protection. The +IR and –IR inputs have a 10ms pulse rating of 6000V differential and 3000V common-mode (see Definitions for a discussion of common-mode and isolation-mode voltages.) The addition of the buffer amplifiers also creates a voltagein voltage-out transfer function with the gain set by RG1 and RG2. A model of the 3650 suitable for simple circuit analysis is shown in Figure 3. The output is a current dependent voltage source, VD, whose value depends on the input current. Thus, the 3650 is a transconductance amplifier with a gain of one volt per microamp. When voltage sources are used, the input current is derived by using gain setting resistors in series with the voltage source (see Installation and Operating Instructions for details). RIN is the differential input impedance. The common-mode and isolation impedances are very high and are assumed to be infinite for this model. +VCC INSTALLATION AND OPERATING INSTRUCTIONS POWER SUPPLY CONNECTIONS The power supply connections for the 3650 and 3652 are shown in Figure 5. When a DC/DC converter is used for isolated power, it is placed in parallel with the isolation barrier of the amplifier. This can lower the isolation impedance and degrade the isolation-mode rejection of the overall circuit. Therefore, a high quality, low leakage DC/DC converter such as the Burr-Brown Model 722 should be used. –VCC 11 IIN + 26 ROUT RIN 20 OFFSET VOLTAGE ADJUSTMENTS 23 + The offset nulling circuits are identical for the 3650 and 3652 and are shown in Figure 5. The offset adjust circuitry is optional and the units will meet the stated specifications with the BAL terminals unconnected. Provisions are available to null both the input and output stage offsets. If the amplifier is operated at a fixed gain, normally only one adjustment will be used: the output stage (10kΩ adjustment) for low gains and the input stage (50kΩ adjustment) for high gains, (>10). VD – – 10 17 13 C 14 C (Input) (Output) 12 VD = IIN X +V 1V µA –V Use the following procedure if it is desired to null both input and output components. (For example, if the gain of the amplifier is to be switched). The input stage offset is first nulled (50kΩ adjustment) with the appropriate input signal pins connected to input common and the amplifier set at its maximum gain. The gain is then set to its minimum value and the output offset is nulled (10kΩ adjustment). FIGURE 3. Simple Model of 3650. A simplified model of the 3652 is shown in Figure 4. The isolation and output stages are identical to the 3650. Additional input circuitry consisting of FET buffer amplifiers and input protection resistors have been added to give higher differential and common-mode input impedance (1011Ω), Same as 3650 in Figure 3. 6 RG1 +IR 1.6MΩ 4 A1 +I 8 RO 2 11 IIN 23 –I 3 A2 1.6MΩ 9 RO 2 17 10 RG2 1 12 –IR C (Output) C (Input) FIGURE 4. Simple Model of 3652. ® 7 3650/52 Model 722 DC/DC converter or equivalent C 722 V+ E –VO V– +V To Input Circuitry + –V 13 1.3kΩ +15VDC +VCC 20 –VCC RIN I2 29 32 Bal – 10kΩ(1) Bal 16 C C 17 (!) + 10 VOUT – –15VDC 23 17 C 23 RIN 26 12 11 +VO 14 + I1 P+ C 12 Output – Output Common VISO 15 50kΩ(1) NOTE: (1) Optional Offset Adjust. VOUT = (I1 – I2) X 106V/A + VISO X IMRR(2) 3MΩ(1) NOTE: (1) The offset adjustment circutry and power supply connections have been omitted for simplicity. Refer to Figure 5 for details. (2) IMRR here is in pA/V, typically 5pA/V at 60Hz and 1pA/V at DC. FIGURE 5. Power and Offset Adjust Connections. FIGURE 6a. 3650 with Differential Current Sources. INPUT CONFIGURATIONS Some possible input configurations for the 3650 and 3652 are shown in Figures 6a, 6b, 6c. Differential input sources are used in these examples. For situations with nondifferential inputs, the appropriate source term should be set to zero in the gain equations and replaced with a short in the diagrams. V1 Figure 6a shows the 3650 connected as a transconductance amplifier with input current sources. Voltage sources are shown in Figure 6b. In this case the voltages are converted to currents by RG1 and RG2. As shown by the equations, they perform as gain setting resistors in the voltage transfer function. When a single voltage source is used, it is recommended (but not essential) that the gain setting resistor remain split into two equal halves in order to minimize errors due to bias currents and common-mode rejection (see Typical Performance Curves). 11 + 23 RIN V2 RG2 C 17 (1) + 10 VOUT – C 12 – VISO Figure 6c illustrates the connections for the 3652 when the FET buffer amplifiers, A1 and A2, are used. This configuration provides an isolation amplifier with high input impedance (both common-mode and differential, and good common-mode and isolation-mode rejection. It is a true isolated instrumentation amplifier which has many benefits for noise rejection when source impedance imbalances are present. VOUT = (V1 – V2) + VISO 106Ω IMRR RG1 + RG2 + RIN + RO NOTE: (1) The offset adjustment circutry and power supply connections have been omitted for simplicity. Refer to Figure 5 for details. FIGURE 6b. 3650 with Differential Voltage Sources. In the 3652, the voltage gain of the buffer amplifiers is slightly less than unity, but the gain of the output stage has been raised to compensate for this so that the overall transfer function from the ±I or ±IR inputs to the output is correct. It should be noted that A1 and A2 are buffer amplifiers. No summing can be done at the ±I or ±IR inputs. Figure 6c shows the +I and –I inputs used. If more input voltage protection is desired, then the +IR and –IR inputs should be used. This will increase the input noise due to the contribution from the 1.6MΩ resistors, but will provide additional differential and common-mode protection (10ms rating of 3kV). ERROR ANALYSIS A model of the 3650 suitable for DC error analysis of offset voltage, voltage drift versus temperature, bias current, etc., is shown in Figure 7. A1 and A2, the input and output stage amplifiers, are considered to be ideal. Separate external generators are used to model the offset voltages and bias currents. RIN is assumed to be small relative to RG1 and RG2 and is therefore omitted from the gain equation. The feedback configuration, optics and component matching are such that I1 = I2 = I3 = I4. A simple circuit analysis gives the following expression for the ® 3650/52 RG1 8 RG1 +IR V1 RO 2 6 4 8 A1 +I 11 + +0 23 RIN RO 2 V2 –I 9 A2 3 –0 + 10 VOUT – RG2 1 C 17 (1) C 12 –IR – VOUT = (V1 – V2) + VISO 106Ω IMRR RG1 + RG2 + RIN + RO VISO NOTE: (1) The offset adjustment circutry and power supply connections have been omitted for simplicity. Refer to Figure 5 for details. FIGURE 6c. 3652 with Differential Voltage Sources. 1MΩ IB1 I1 I4 EOSO I3 – – + RG2 λ EOSI RG1 A2 A1 – + + I2 IB2 C (Output) C (Input) Optics I 1 = I2 = I3 = I4 FIGURE 7. DC Error Analysis Model for 3650. total output error voltage due to offset voltages and bias currents. 106 VOUT-TOTAL = [EOSI + (IB1 RGI – IB2 RG2)]+ EOSO (1) RG1 + RG2 The effects of temperature may be analyzed by replacing the offset terms with their corresponding temperature gradient terms: Offset current is defined as the difference between the two bias currents IB1 and IB2. If IB1 = IB and IB2 = IB +IOSI For a complete analysis of the effects of temperature, gain variations must also be considered. then, for RG1 = RG2, VOUT – IB = VOUT ➞∆ VOUT/∆T, EOSI ➞∆EOSI/∆T, etc. 106 IOS OUTPUT NOISE 2 The total output noise is given by: This component of error is not a function of gain and is therefore included as a part of EOSO specifications. The output errors due to the output stage bias current are also included in EOSO. This results in a very simple equation for the total error: VOUT-TOTAL = 106 EOSI 2RG1 + EOSO (for RG1 = RG2). EN (RMS) = √(ENIG)2 + (ENO)2 where EN (RMS) = Total output noise ENI = RMS noise of the input stage ENO = RMS noise of the output stage G = 106/(RG1 + RG2) (2) ENO includes the noise contribution due to the optics and the noise currents of the output stage. Errors created by the noise current of the input stage are insignificant compared to other noise sources and are therefore omitted. In summary, it should be noted that equation (2) should be used only when RG1 = RG2. When RG1 ≠ RG2, equation (1) applies. ® 9 3650/52 COMMON-MODE AND ISOLATION-MODE REJECTION APPLICATIONS The expression for the output error due to common-mode and isolation mode voltage is: Figure 8 shows a system where isolation amplifiers (3650) are used to measure the armature current and the armature voltage of a motor. VCM VOUT = G CMRR + VISO The armature current of the motor is converted to a voltage by the calibrated shunt RS and then amplifier (adjustable gain) and isolated by the 3650. IMRR The armature voltage is sensed by the voltage divider (adjustable) shown and then amplified and isolated by the 3650. GUARDING AND PROTECTION To preserve the excellent inherent isolation characteristics of these amplifiers, the following recommended practice should be noted. The 3650 provides the advantage of accurate current measurement in the presence of high common-mode voltage. Both 3650s provide the advantage of isolating the motor ground from the control system ground. Isolated power is provided by an isolated DC/DC converter (BB Model 722 or equivalent). 1. Use shielded twisted pair of cable at the input as with any instrumentation amplifier. 2. Care should be taken to minimize external capacitance. A symmetrical layout of external components to achieve balanced capacitance from the input terminals to output common will preserve high IMR. 3. External components and conductor patterns should be at a distance equal to or greater than the distance between the input and output terminals to prevent HV breakdown. 4. Though not an absolute requirement, the use of laminated or conformally coated printed circuit boards is recommended. 1MΩ The 3652 is ideally suited for patient monitoring applications as shown in Figure 9. The fact that it is a true balanced input instrumentation amplifier with very high differential and common-mode impedance means that it can greatly reduce the common-mode noise pick up due to imbalance in lead impedances that often appear in patient monitoring situations. The 3kV and 6kV shown in Figure 9 are the 10ms pulse ratings of the +IR and –IR inputs for the common-mode and differential input voltages with respect to input common. The rating of the isolation barrier is 2000Vpk continu- G = 1V/V 4.99kΩ 11 + 9.76kΩ 23 3650HG 17 500Ω 4.99kΩ VA (500V) 20 10 26 – I/O Com 13 14 –V 12 +V O/P Com VA/100 To Voltage Sense –VCC +VCC +VO C V– E 722 V+ O/P Com VOUT +V 14 4.75kΩ 11 +15VDC –V 12 –15VDC 13 + 500Ω VS (100mV) P+ I/O Com Motor Control 1.3kΩ –VO +VCC 26 –VCC 20 3650JG RS 4.99kΩ 17 O/P Com 10 – G = 100V/V FIGURE 8. Isolated Armature Current and Voltage Sensor. ® 3650/52 23 10 100VS To Current Sense ous. The nonrecurrent pulse rating of the isolation barrier is 5000Vpk, since each unit is factory tested at 5000Vpk. If the isolation barrier is to be subjected to higher voltages a gas filled surge voltage protection device can be used. For multichannel operation, two 3652s can be powered by one Model 722 isolated DC/DC converter. The total leakage current for both channels at 240V 60Hz would still be less than 2µA. The block diagram in Figure 10 shows the use of isolation amplifiers in SCR control application. Isolated DC/DC Converter VOUT ≈ C 6 10 es = 20es 50k P+ 1.3kΩ Input Common 8 722 25kΩ 11 +IR 6 14 +VO V+ –VO E V– +15VDC 12 26 20 3652 –6kV es –15VDC 23 VOUT To Monitor 1 17 –IR 12 10 –3kV –3kV 9 25kΩ +5kV Output Common Input Common FIGURE 9. 3652 Used in Patient Monitoring Application (ECG, VCG, EMG Amplifier). ® 11 3650/52 A 3.0 Input B Firing CKT C 3.0 Lead Neutral Firing CKT Firing CKT +VISO + +V A B C AC/DC Power Supply 3650HG Control – ±V +VISO Input Command Isolated DC/DC Converter 722 + +V 3650HG ±VISO – ±VISO –V + 3650HG – FIGURE 10. 3-Phase Bidirectional SCR Control with Voltage Feedback. ® 3650/52 12 PACKAGE OPTION ADDENDUM www.ti.com 16-Jun-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 3650HG NRND CDIP JNC 32 TBD Call TI Call TI 3650JG NRND CDIP JNC 32 TBD Call TI Call TI 3650KG NRND CDIP JNC 32 TBD Call TI Call TI 3650MG NRND CDIP JNC 32 TBD Call TI Call TI Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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