OPA128 ® Difet ® Electrometer-Grade OPERATIONAL AMPLIFIER FEATURES APPLICATIONS ● ● ● ● ● ● ● ● ● ● ● ULTRA-LOW BIAS CURRENT: 75fA max LOW OFFSET: 500µV max LOW DRIFT: 5µV/°C max HIGH OPEN-LOOP GAIN: 110dB min HIGH COMMON-MODE REJECTION: 90dB min ● IMPROVED REPLACEMENT FOR AD515 AND AD549 ELECTROMETER MASS SPECTROMETER CHROMATOGRAPH ION GAUGE PHOTODETECTOR RADIATION-HARD EQUIPMENT DESCRIPTION The OPA128 is an ultra-low bias current monolithic operational amplifier. Using advanced geometry dielectrically-isolated FET (Difet®) inputs, this monolithic amplifier achieves a performance level exceeding even the best hybrid electrometer amplifiers. Laser-trimmed thin-film resistors give outstanding voltage offset and drift performance. A noise-free cascode and low-noise processing give the OPA128 excellent low-level signal handling capabilities. Flicker noise is very low. The OPA128 is an improved pin-for-pin replacement for the AD515. Case (Guard) 8 7 +VCC –In 2 3 Noise-Free Cascode +In 6 Output Trim 1k Ω 28kΩ 28kΩ 2kΩ 2kΩ 1 Difet® Burr-Brown Corp. 5 Trim 1k Ω 4 –VCC OPA128 Simplified Circuit International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © SBOS148 1986 Burr-Brown Corporation PDS-653E Printed in U.S.A. May, 1995 SPECIFICATIONS ELECTRICAL At VCC = ±15VDC and TA = +25°C, unless otherwise noted. Pin 8 connected to ground. OPA128JM PARAMETER CONDITIONS MIN OPA128KM TYP MAX VCM = 0VDC, RL ≥ 10kΩ ±150 ±300 VCM = 0VDC, RL ≥ 10kΩ 65 MIN OPA128LM TYP MAX ±75 ±150 MIN OPA128SM TYP MAX ±40 ±75 MIN TYP MAX UNITS ±75 ±150 fA INPUT BIAS CURRENT(1) Input Bias Current OFFSET CURRENT(1) Input Offset Current 30 30 30 fA VOLTAGE(1) OFFSET Input Offset Voltage Average Drift Supply Rejection ±260 VCM = 0VDC TA = TMIN to TMAX 80 NOISE Voltage: fO = 10Hz fO = 100Hz fO = 1kHz fO = 10kHz fB = 10Hz to 10kHz fB = 0.1Hz to 10Hz Current: fB = 0.1Hz to 10Hz fO = 0.1Hz to 20kHz IMPEDANCE Differential Common-Mode VOLTAGE RANGE(4) Common-Mode Input Range Common-Mode Rejection 120 ±1 ±1000 ±20 ±140 90 ±100 120 ±1 ±500 ±10 ±140 90 ±32 120 ±1 ±500 ±5 ±140 90 ±32 120 ±1 ±500 ±10 ±32 µV µV/°C dB µV/V 92 78 27 15 2.4 4 4.2 0.22 92 78 27 15 2.4 4 3 0.16 92 78 27 15 2.4 4 2.3 0.12 92 78 27 15 2.4 4 3 0.16 nV/√Hz nV/√Hz nV/√Hz nV/√Hz µVrms µVp-p fA, p-p fA/√Hz 1013 || 1 1015 || 2 1013 || 1 1015 || 2 1013 || 1 1015 || 2 1013 || 1 1015 || 2 Ω || pF Ω || pF VIN = ±10VDC ±10 80 ±12 118 ±10 90 ±12 118 ±10 90 ±12 118 ±10 90 ±12 118 V dB RL ≥ 2kΩ 94 128 110 128 110 128 110 128 dB (2) 0.5 1 47 3 5 10 0.5 1 47 3 5 10 0.5 1 47 3 5 10 0.5 1 47 3 5 10 MHz kHz V/µs µs µs 5 µs ±13 ±10 100 1000 34 V mA Ω pF mA OPEN-LOOP GAIN, DC Open-Loop Voltage Gain FREQUENCY RESPONSE Unity Gain, Small Signal Full Power Response Slew Rate Settling Time, 0.1% 0.01% Overload Recovery, 50% Overdrive(3) 20Vp-p, RL = 2kΩ VO = ±10V, RL = 2kΩ Gain = –1, RL = 2kΩ 10V Step 0.5 Gain = –1 1 5 1 5 1 5 RATED OUTPUT Voltage Output Current Output Output Resistance Load Capacitance Stability Short Circuit Current RL = 2kΩ VO = ±10VDC DC, Open Loop Gain = +1 ±10 ±5 10 ±13 ±10 100 1000 34 ±10 ±5 55 10 ±13 ±10 100 1000 34 ±10 ±5 55 10 ±13 ±10 100 1000 34 ±10 ±5 55 10 55 POWER SUPPLY Rated Voltage Voltage Range, Derated Performance Current, Quiescent ±15 ±5 IO = 0mADC 0.9 ±15 ±18 1.5 ±5 +70 +125 +150 0 –55 –65 0.9 ±15 ±18 1.5 ±5 +70 +125 +150 0 –55 –65 0.9 ±15 ±18 1.5 ±5 +70 +125 +150 –55 –55 –65 0.9 VDC ±18 1.5 VDC mA +125 +125 +150 °C °C °C °C/W TEMPERATURE RANGE Specification Operating Storage θ Junction-Ambient Ambient Temp. Ambient Temp. Ambient Temp. 0 –55 –65 200 200 200 200 NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. Bias current doubles approximately every 11°C. (2) Sample tested. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive. (4) If it is possible for the input voltage to exceed the supply voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices can withstand overload currents of 0.3mA indefinitely without damage. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® OPA128 2 ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS) At VCC = ±15VDC and TA = TMIN and TMAX, unless otherwise noted. OPA128JM PARAMETER CONDITIONS MIN Ambient Temp. 0 TYP OPA128KM MAX MIN +70 0 TYP OPA128LM MAX MIN +70 0 TYP OPA128SM MAX MIN +70 –55 TYP MAX UNITS +125 °C ±170 pA TEMPERATURE RANGE Specification Range INPUT BIAS CURRENT(1) Input Bias Current VCM = 0VDC ±2.5 VCM = 0VDC 1.1 ±8 ±1.3 ±4 ±0.7 ±2 ±43 CURRENT(1) OFFSET Input Offset Current OFFSET VOLTAGE(1) Input Offset Voltage Average Drift Supply Rejection ±2.2mV ±20 VCM = 0VDC 74 VOLTAGE RANGE(2) Common-Mode Input Range Commmon-Mode Rejection 0.6 114 ±2 0.6 ±1mV ±10 80 ±200 114 ±2 18 ±750 ±5 80 ±100 114 ±2 pA ±1.5mV ±10 80 ±100 106 ±5 ±100 µV µV/°C dB µV/V VIN = ±10VDC ±10 74 ±11 112 ±10 80 ±11 112 ±10 80 ±11 112 ±10 74 ±11 104 V dB RL ≥ 2kΩ 90 125 104 125 104 125 90 122 dB RL = 2k VO = ±10VDC VO = 0VDC ±10 ±5 10 22 ±10 ±5 10 22 ±10 ±5 10 22 ±10 ±5 10 18 V mA mA OPEN-LOOP GAIN, DC Open-Loop Voltage Gain RATED OUTPUT Voltage Output Current Output Short Circuit Current POWER SUPPLY Current, Quiescent I = 0mADC 0.9 1.8 0.9 1.8 0.9 1.8 0.9 2 mA NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (2) If it is possible for the input voltage to exceed the supply voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices can withstand overload currents of 0.3mA indefinitely without damage. CONNECTION DIAGRAM ORDERING INFORMATION Top View Substrate and Case Offset Trim –In 8 7 +VCC 1 2 OPA128 PRODUCT PACKAGE TEMPERATURE RANGE BIAS CURRENT, max (fA) OPA128JM OPA128KM OPA128LM OPA128SM TO-99 TO-99 TO-99 TO-99 0°C to +70°C 0°C to +70°C 0°C to +70°C –55°C to +125°C ±300 ±150 ±75 ±150 6 Output PACKAGE INFORMATION +In 3 4 5 Offset Trim –VCC ABSOLUTE MAXIMUM RATINGS PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) OPA128JM OPA128KM OPA128LM OPA128SM TO-99 TO-99 TO-99 TO-99 001 001 001 001 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. Supply ........................................................................................... ±18VDC Internal Power Dissipation(1) .......................................................... 500mW Differential Input Voltage .............................................................. ±36VDC Input Voltage Range ..................................................................... ±18VDC Storage Temperature Range .......................................... –65°C to +150°C Operating Temperature Range ....................................... –55°C to +125°C Lead Temperature (soldering, 10s) ............................................... +300°C Output Short Circuit Duration(2) ................................................ Continuous Junction Temperature .................................................................... +175°C NOTES: (1) Packages must be derated based on θCA = 150°C/W or θJA = 200°C/W. (2) Short circuit may be to power supply common only. Rating applies to +25°C ambient. Observe dissipation limit and TJ. ® 3 OPA128 DICE INFORMATION PAD FUNCTION 1 2 3 4 5 6 7 8 NC Offset Trim –In +In –VCC Offset Trim Output +VCC Substrate No Connection Substrate Bias: Isolated, normally connected to common. MECHANICAL INFORMATION Die Size Die Thickness Min. Pad Size MILS (0.001") MILLIMETERS 96 x 71 ±5 20 ±3 4x4 2.44 x 1.80 ±0.13 0.51 ±0.08 0.10 x 0.10 Backing OPA128 DIE TOPOGRAPHY None TYPICAL PERFORMANCE CURVES At TA = +25°C, ±15VDC, unless otherwise noted. OPEN-LOOP FREQUENCY RESPONSE POWER SUPPLY REJECTION vs FREQUENCY 140 Voltage Gain (dB) Gain 100 Ø 80 60 Phase Margin ∼ 90° 40 –90 –135 Phase Shift (Degrees) –45 120 20 Power Supply Rejection (dB) 140 –180 0 1 10 100 1k 10k 100k 1M 120 100 80 +PSRR 60 –PSRR 40 20 0 10M 1 10 100 Frequency (Hz) 10k 100k 1M 10M 1M 10M COMMON-MODE REJECTION vs FREQUENCY COMMON-MODE REJECTION vs INPUT COMMON-MODE VOLTAGE 140 Common-Mode Rejection (dB) 120 Common-Mode Rejection (dB) 1k Frequency (Hz) 110 100 90 80 120 100 80 60 40 20 0 70 –15 –10 –5 0 5 10 1 15 ® OPA128 10 100 1k 10k Frequency (Hz) Common-Mode Voltage (V) 4 100k TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, +15VDC, unless otherwise noted. BIAS AND OFFSET CURRENT vs TEMPERATURE BIAS AND OFFSET CURRENT vs INPUT COMMON-MODE VOLTAGE 10 Normalized Bias and Offset Current SM 10pA IB 1pA IOS 100 10 1 1 0.1 0.01 –50 –25 0 25 50 75 100 125 –15 –10 Ambient Temperature (°C) 3 3 2 2 1 1 –25 0 25 50 75 100 4 2 + Slew – Slew 2 1 0 0 0 0 6 3 Gain-Bandwidth (MHz) 4 Slew Rate (V/µs) Gain-Bandwidth (MHz) 4 –50 0 125 5 15 10 20 Supply Voltage (±VCC) Ambient Temperature (°C) OPEN-LOOP GAIN, PSR, AND CMR vs TEMPERATURE SUPPLY CURRENT vs TEMPERATURE 140 PSR, CMR, Voltage Gain (dB) 2 Supply Current (mA) 15 GAIN-BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE GAIN-BANDWIDTH AND SLEW RATE vs TEMPERATURE –75 –5 0 5 10 Common-Mode Voltage (V) Slew Rate (V/µs) Bias and Offset Current (fA) 100pA 1.5 1 0.5 130 AOL 120 CMR 110 PSR 100 0 –75 –50 –25 0 25 50 75 100 –75 125 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) Ambient Temperature (°C) ® 5 OPA128 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, +15VDC, unless otherwise noted. SMALL SIGNAL TRANSIENT RESPONSE LARGE SIGNAL TRANSIENT RESPONSE Output Voltage (mV) Output Voltage (V) 80 10 0 –10 40 0 –40 5µs 5V 20mV –80 0 25 50 0 1µs 2 4 Time (µs) 5µs 10 100pA 15 10pA KM Bias Current (fA) Common-Mode Voltage (±V) 8 BIAS CURRENT vs ADDITIONAL POWER DISSIPATION COMMON-MODE INPUT RANGE vs SUPPLY VOLTAGE 10 5 1pA 100 10 1 0 0 5 15 10 0 20 50 100 150 200 250 300 350 Additional Power Dissipation (mW) Supply Voltage (±VCC) INPUT VOLTAGE NOISE SPECTRAL DENSITY FULL-POWER OUTPUT vs FREQUENCY 1k 30 Output Voltage (Vp-p) Voltage Density (nV/ Hz) 6 Time (µs) 100 10 20 10 0 1 10 100 1k 10k 100k 1k Frequency (Hz) 100k Frequency (Hz) ® OPA128 10k 6 1M APPLICATIONS INFORMATION The amplifier case should be connected to any input shield or guard via pin 8. This insures that the amplifier itself is fully surrounded by guard potential, minimizing both leakage and noise pickup (see Figure 2). OFFSET VOLTAGE ADJUSTMENT The OPA128 offset voltage is laser-trimmed and will require no further trim for most applications. As with most amplifiers, externally trimming the remaining offset can change drift performance by about 0.3µV/°C for each 100µV of adjusted effort. Note that the trim (Figure 1) is similar to operational amplifiers such as HA-5180 and AD515. The OPA128 can replace many other amplifiers by leaving the external null circuit unconnected. Non-Inverting Buffer 8 2 OPA128 In OPA128 3 In 7 TO-99 Bottom View Inverting 6 OPA128 3 3 2 5 ±10mV Typical Trim Range 4 (1) 4 5 6 In 1 –VCC 6 Out 3 +VCC 2 8 2 6 Out 6 Out OPA128 3 NOTE: (1) 10kΩ to 1MΩ Trim Potentiometer (100kΩ Recommended) 7 2 8 1 8 BOARD LAYOUT FOR INPUT GUARDING Guard top and bottom of board. Alternate: use Teflon® standoff for sensitive input pins. FIGURE 1. Offset Voltage Trim. Teflon® E.I. Du Pont de Nemours & Co. INPUT PROTECTION Conventional monolithic FET operational amplifiers’ inputs must be protected against destructive currents that can flow when input FET gate-to-substrate isolation diodes are forward-biased. Most BIFET® amplifiers can be destroyed by the loss of –VCC. FIGURE 2. Connection of Input Guard. Because of its dielectric isolation, no special protection is needed on the OPA128. Of course, the differential and common-mode voltage limits should be observed. Triboelectric charge (static electricity generated by friction) can be a troublesome noise source from cables connected to the input of an electrometer amplifier. Special low-noise cable will minimize this effect but the optimum solution is to mount the signal source directly at the electrometer input with short, rigid, wiring to preclude microphonic noise generation. Static damage can cause subtle changes in amplifier input characteristics without necessarily destroying the device. In precision operational amplifiers (both bipolar and FET types), this may cause a noticeable degradation of offset voltage and drift. TESTING Accurately testing the OPA128 is extremely difficult due to its high level of performance. Ordinary test equipment may not be able to resolve the amplifier’s extremely low bias current. Static protection is recommended when handling any precision IC operational amplifier. Inaccurate bias current measurements can be due to: 1. Test socket leakage 2. Unclean package GUARDING AND SHIELDING As in any situation where high impedances are involved, careful shielding is required to reduce “hum” pickup in input leads. If large feedback resistors are used, they should also be shielded along with the external input circuitry. Leakage currents across printed circuit boards can easily exceed the bias current of the OPA128. To avoid leakage problems, it is recommended that the signal input lead of the OPA128 be wired to a Teflon standoff. If the input is to be soldered directly into a printed circuit board, utmost care must be used in planning the board layout. A “guard” pattern should completely surround the high impedance input leads and should be connected to a low impedance point which is at the signal input potential. 3. Humidity or dew point condensation 4. Circuit contamination from fingerprints or anti-static treatment chemicals 5. Test ambient temperature 6. Load power dissipation BIFET® National Semiconductor Corp. ® 7 OPA128 500Ω 9.5kΩ Guard CF +15V 8 2 7 3 1VDC Output 6 OPA128 1011Ω RF 4 5 2 1 8 Offset Trim 100kΩ pH Probe RS ≈ 500MΩ 50mV Output 10pF 3 ∆Q –15V 6 eO 1011 Ω Low Frequency Cutoff = 1/(2 π RF CF) = 0.16Hz FIGURE 4. Piezoelectric Transducer Charge Amplifier. IB ≈ 100fA Gain = 100 3 –In OPA128 2 CMRR ≈ 118dB 6 RIN ≈ 1015Ω RF 10k Ω RG 202 Ω 2 RF 10k Ω 3 25k Ω 3 +In 25k Ω 5 25k Ω 2 OPA128 6 Burr-Brown INA105 Differential Amplifier 25k Ω 6 Output 1 Differential Voltage Gain = 1 + 2RF /RG FIGURE 5. FET Input Instrumentation Amplifier for Biomedical Applications. ≈10pF 10kΩ (1) 1M Ω 2 8 1N914 2 3 OPA606 6 (1) (1) Input 1N914 2N4117A NOTE: (1) Reverse polarity for negative peak detection. FIGURE 6. Low-Droop Positive Peak Detector. ® OPA128 Output e O = – ∆Q/C F 100pF FIGURE 3. High Impedance (1015Ω) Amplifier. OPA128 8 3 OPA128 1000µF Polystyrene 6 Droop ≈ 100µV/s Output <1pF to prevent gain peaking. 1010Ω Silicon Detector Corp. SD-020-11-21-011 Guard 2 0.01µF 2kΩ 18kΩ 2 Current Input 8 7 OPA128 3 1000MΩ +15V 0.1µF Output 6 3 OPA128 Output 8 5 x 10 9 V/W 0.1µF 6 VO = –1V/nA 4 1010Ω –15V Circuit must be well shielded. FIGURE 7. Sensitive Photodiode Amplifier. FIGURE 8. Current-to-Voltage Converter. +5V 109Ω 2 OPA128 Biased Current Transducer 3 6 8 3 4 5 10 11 12 INA101HP 1 Output 14 +15V 7 5 VO = 1mV/pA 8 REF101 6 +5V 4 1 FIGURE 9. Biased Current-to-Voltage Converter. ® 9 OPA128 PACKAGE OPTION ADDENDUM www.ti.com 22-Jun-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) OPA128JM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA OPA128KM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA OPA128LM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA OPA128SM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. 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