CEM4804 PRELIMINARY Dual N-Channel Enhancement Mode Field Effect Transistor 5 FEATURES 30V , 7.9A , RDS(ON)=20mΩ @VGS=10V. RDS(ON)=30m Ω @VGS=4.5V. D1 D1 D2 D2 8 7 6 5 1 2 3 S1 G1 S2 Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Surface Mount Package. SO-8 4 G2 1 ABSOLUTE MAXIMUM RATINGS (TA=25 C unless otherwise noted) Symbol Limit Unit Drain-Source Voltage VDS 30 V Gate-Source Voltage VGS Ć20 V Parameter Drain Current-Continuous a -Pulsed ID Ć7.9 A IDM Ć24 A Drain-Source Diode Forward Current a IS 2 A Maximum Power Dissipation a PD 2 W TJ, TSTG -55 to 150 C Operating Junction and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient a RįJA 5-98 62.5 C/W CEM4804 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) Parameter Condition Symbol Min Typ C Max Unit 5 OFF CHARACTERISTICS Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA Zero Gate Voltage Drain Current IDSS VDS = 30V, VGS = 0V 1 µA Gate-Body Leakage IGSS VGS =Ć20V, VDS = 0V Ć100 nA Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 3 V Drain-Source On-State Resistance RDS(ON) 30 V ON CHARACTERISTICS b ID(ON) gFS On-State Drain Current Forward Transconductance 1 VGS = 10V, ID = 6.3A 16 20 mΩ VGS = 4.5V, ID = 5A 24 30 mΩ VDS = 5V, VGS = 10V VDS =15V, ID = 6A 10 A 7 S 857 PF 343 PF 105 PF c DYNAMIC CHARACTERISTICS Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VDS =15V, VGS = 0V f =1.0MHZ c SWITCHING CHARACTERISTICS Turn-On Delay Time Rise Time Turn-Off Delay Time tD(ON) tr tD(OFF) VDD = 10V, ID = 1A, VGS = 10V, RGEN = 6Ω 22 45 ns 34 70 ns 43 90 ns Fall Time tf 18 35 ns Total Gate Charge Qg 28 35 nC Gate-Source Charge Qgs Gate-Drain Charge Qgd VDS =10V, ID = 3.5A, VGS =10V 5-99 4 nC 7.5 nC CEM4804 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) Parameter DRAIN-SOURCE DIODE CHARACTERISTICS b Diode Forward Voltage VGS = 0V, Is =2A VSD 1.3 Notes a.Surface Mounted on FR4 Board, t ś10sec. b.Pulse Test:Pulse Width ś300ijs, Duty Cycle ś 2%. c.Guaranteed by design, not subject to production testing. 20 15 VGS=10,8,6,5V 12 VGS=4V ID, Drain Current (A) ID, Drain Current(A) 16 12 8 4 VGS=3V 9 6 25 C 3 0 0 0 0.5 1.0 1.5 2.5 2.0 3.0 VDS, Drain-to-Source Voltage (V) Tj=125 C 1.0 -55 C 1.5 2.0 2.5 3.0 VGS, Gate-to-Source Voltage (V) Figure 1. Output Characteristics Figure 2. Transfer Characteristics 1.80 RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 1200 1000 C, Capacitance (pF) 5 C Min Typ Max Unit Condition Symbol Ciss 800 600 Coss 400 200 Crss 0 0 5 10 15 20 25 30 1.60 ID=6.3A VGS=10V 1.40 1.20 1.00 0.80 0.60 -50 -25 0 25 50 75 100 125 150 TJ, Junction Temperature( C) VDS, Drain-to Source Voltage (V) Figure 4. On-Resistance Variation with Temperature Figure 3. Capacitance 5-100 V 1.60 VDS=VGS ID=250ӴA 1.40 1.20 1.00 0.80 0.60 0.40 -50 -25 0 25 50 75 100 125 150 BVDSS, Normalized Drain-Source Breakdown Voltage Vth, Normalized Gate-Source Threshold Voltage CEM4804 1.15 ID=250ӴA 1.10 1.05 1.00 5 0.95 0.90 0.85 -50 -25 25 50 75 100 125 150 Tj, Junction Temperature ( C) Tj, Junction Temperature ( C) Figure 6. Breakdown Voltage Variation with Temperature Figure 5. Gate Threshold Variation with Temperature 50 20 16 Is, Source-drain current (A) gFS, Transconductance (S) 0 12 8 4 VDS=10V 10 1.0 0.1 0 3 0 6 9 12 0.6 1.0 0.8 IDS, Drain-Source Current (A) 1.2 1.4 VSD, Body Diode Forward Voltage (V) Figure 7. Transconductance Variation with Drain Current Figure 8. Body Diode Forward Voltage Variation with Source Current 8 VDS=15V ID=3.5A ID, Drain Current (A) VGS, Gate to Source Voltage (V) 10 6 4 2 10 1 8 16 24 32 Qg, Total Gate Charge (nC) N) Lim it 1ms 10ms 1s 10s DC 10 0 10 -1 10 0 S(O 100ms -2 0 RD TA=25 C Tj=150 C Single Pulse 10 -1 10 1 10 0 VDS, Drain-Source Voltage (V) Figure 10. Maximum Safe Operating Area Figure 9. Gate Charge 5-101 10 1 CEM4804 VDD t on 5 V IN D td(off) tf 90% 90% VOUT VOUT VGS RGEN toff tr td(on) RL 10% INVERTED 10% G 90% VIN S 50% 50% 10% PULSE WIDTH Figure 12. Switching Waveforms Figure 11. Switching Test Circuit r(t),Normalized Effective Transient Thermal Impedance 102 0 D=0.5 1 Duty Cycle=0.5 0.2 10 -1 0.1 0.2 0.05 10 PDM 0.1 0.02 0.1 -2 t1 t2 t2 1. RįJA (t)=r * R(t)=r įJA (t) * RįJA 1. (t) RįJA 2. RįJA=See Datasheet 2. R įJA=See Datasheet RįJA (t)PDM* RįJA (t) 3. TJM-TA =3.P*TJMTA = 4. Duty Cycle, D=t1/t2 4. Duty Cycle, D=t1/t2 0.02 Pulse Single Single Pulse 0.01 10 PDM t1 0.05 0.01 -3 -4 10 -3-3 10 10 -2 -2 10 10 10 -1 10 -1 10 0 1 10 1 Square Wave Pulse Duration (sec) Figure 13. Normalized Thermal Transient Impedance Curve 5-102 10 10 2 100