CEP21A3/CEB21A3 Nov. 2002 4 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES D 30V , 20A , RDS(ON)=45mΩ @VGS=10V. RDS(ON)=70mΩ @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. G TO-220 & TO-263 package. D G S CEB SERIES TO-263(DD-PAK) G D S S CEP SERIES TO-220 ABSOLUTE MAXIMUM RATINGS (TC=25 C unless otherwise noted) Symbol Limit Unit Drain-Source Voltage VDS 30 V Gate-Source Voltage VGS Ć20 V Parameter Drain Current-Continuous -Pulsed ID 20 A IDM 60 A Drain-Source Diode Forward Current IS 20 A Maximum Power Dissipation @Tc=25 C Derate above 25 C PD 43 0.29 W W/ C TJ, TSTG -65 to 175 C Thermal Resistance, Junction-to-Case RįJC 3.5 C/W Thermal Resistance, Junction-to-Ambient RįJA 62.5 C/W Operating and Storage Temperature Range THERMAL CHARACTERISTICS 4-167 4 CEP21A3/CEB21A3 ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted) 4 Parameter C Min Typ Max Unit Symbol Condition Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID=250µA Zero Gate Voltage Drain Current IDSS VDS = 30V, VGS = 0V 1 µA Gate-Body Leakage IGSS VGS =Ć 20V, VDS = 0V Ć100 nA Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 2.5 V Drain-Source On-State Resistance RDS(ON) OFF CHARACTERISTICS 30 V ON CHARACTERISTICS a ID(ON) gFS On-State Drain Current Forward Transconductance 0.8 VGS = 10V, ID = 12A 36 45 mΩ VGS = 4.5V, ID =15A 55 70 mΩ VDS = 10V, VGS = 10V VDS = 10V, ID = 12A A 20 20 S 364 PF 197 PF 62 PF b DYNAMIC CHARACTERISTICS Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VDS =15V, VGS = 0V f =1.0MHZ b SWITCHING CHARACTERISTICS Turn-On Delay Time Rise Time Turn-Off Delay Time tD(ON) tr tD(OFF) Fall Time tf Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd VDD = 15V, ID = 12A VGS = 10V, RGEN =2.5Ω VDS = 15V,ID = 6A VGS = 10V 4-168 12 25 ns 5 15 ns 14 30 ns 14 30 ns 10 15 nC 2 nC 3 nC 4 CEP21A3/CEB21A3 ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted) Parameter Min Typ Max Unit Condition Symbol DRAIN-SOURCE DIODE CHARACTERISTICS a Diode Forward Voltage VGS = 0V, Is = 12A VSD 0.9 1.3 Notes a.Pulse Test:Pulse Width ś300ijs, Duty Cycle ś 2%. b.Guaranteed by design, not subject to production testing. 30 50 VGS=10,9,8,7,6V 25 C 40 VGS=5V 20 ID, Drain Current (A) ID, Drain Current (A) 25 15 VGS=4V 10 5 30 20 -55 C Tj=125 C 10 VGS=3V 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 1 2 3 4 5 6 VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Figure 1. Output Characteristics Figure 2. Transfer Characteristics 1.80 RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 600 500 C, Capacitance (pF) 0 400 Ciss 300 Coss 200 100 Crss 0 0 5 10 15 20 25 30 VDS, Drain-to Source Voltage (V) 1.60 ID=12A VGS=10V 1.40 1.20 1.00 0.80 0.60 -50 -25 0 25 50 75 100 125 150 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature Figure 3. Capacitance 4-169 V 4 BVDSS, Normalized Drain-Source Breakdown Voltage 1.30 VDS=VGS ID=250ijA 1.20 1.10 1.00 0.90 0.80 0.70 0.60 -50 -25 0 25 50 75 100 125 150 1.15 ID=250ijA 1.10 1.05 1.00 0.95 0.90 0.85 -50 -25 Figure 5. Gate Threshold Variation with Temperature 25 50 75 100 125 150 Figure 6. Breakdown Voltage Variation with Temperature 50 50 40 Is, Source-drain current (A) gFS, Transconductance (S) 0 Tj, Junction Temperature ( C) Tj, Junction Temperature ( C) 30 20 10 VDS=10V 10 1.0 0.1 0 0 5 10 15 0.6 20 IDS, Drain-Source Current (A) 0.8 1.0 1.4 1.2 1.6 VSD, Body Diode Forward Voltage (V) Figure 7. Transconductance Variation with Drain Current Figure 8. Body Diode Forward Voltage Variation with Source Current 70 10 VDS=15V ID=6A 8 ID, Drain Current (A) VGS, Gate to Source Voltage (V) 4 Vth, Normalized Gate-Source Threshold Voltage CEP21A3/CEB21A3 6 4 2 0 0 3 6 9 20 Qg, Total Gate Charge (nC) Lim it 10 1m 10 10 0ij s s ms DC VGS=10V Single Pulse Tc=25 C 1 0.5 12 R ( DS ) ON 1 10 30 VDS, Drain-Source Voltage (V) Figure 10. Maximum Safe Operating Area Figure 9. Gate Charge 4-170 100 CEP21A3/CEB21A3 4 4 VDD t on RL V IN D td(off) tf 90% 90% VOUT VOUT VGS RGEN toff tr td(on) 10% INVERTED 10% G 90% S VIN 50% 50% 10% PULSE WIDTH Figure 12. Switching Waveforms Figure 11. Switching Test Circuit r(t),Normalized Effective Transient Thermal Impedance 2 1 D=0.5 0.2 0.1 0.1 PDM 0.05 t1 t2 0.02 0.01 1. RįJC (t)=r (t) * RįJC 2. RįJC=See Datasheet 3. TJM-TC = P* RįJC (t) 4. Duty Cycle, D=t1/t2 Single Pulse 0.01 10 -5 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (sec) Figure 13. Normalized Thermal Transient Impedance Curve 4-171 10