TI SN74CBT16390DL

SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
D
D
D
D
D
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
5-Ω Switch Connection Between Two Ports
TTL-Compatible Input Levels
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and 300-mil Shrink
Small-Outline (DL) Packages
A1
2B1
2B2
A3
2B3
2B4
A5
2B5
2B6
A7
2B7
2B8
GND
VCC
A9
2B9
2B10
A11
2B11
2B12
A13
2B13
2B14
A15
2B15
2B16
NC
NC
description
The SN74CBT16390 is a 16-bit to 32-bit switch
used in applications in which two separate data
paths must be multiplexed onto, or demultiplexed
from, a single path. This device can be used for
memory interleaving, in which two different banks
of memory must be addressed simultaneously.
This also can be used to connect or isolate the PCI
bus to one or two slots simultaneously.
Two output enables (OE1 and OE2) control the
data flow. When OE1 is low, A port is connected
to 1B port. When OE2 is low, A port is connected
to 2B port. When both OE1 and OE2 are low, the
A port is connected to both 1B and 2B ports. The
control inputs can be driven with a 5-V CMOS, 5-V
TTL, or an LVTTL driver.
The SN74CBT16390 is characterized
operation from –40°C to 85°C.
for
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
1B1
1B2
A2
1B3
1B4
A4
1B5
1B6
A6
1B7
1B8
A8
GND
VCC
1B9
1B10
A10
1B11
1B12
A12
1B13
1B14
A14
1B15
1B16
A16
OE1
OE2
NC – No internal connection
FUNCTION TABLE
INPUTS
OE1
OE2
L
L
FUNCTION
A = 1B and A = 2B
L
H
A = 1B
H
L
A = 2B
H
H
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
logic diagram (positive logic)
56
1
A1
1B1
2
2B1
A16
31
32
1B16
26
2B16
30
OE1
29
OE2
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
VCC
VIH
Supply voltage
VIL
TA
Low-level control input voltage
High-level control input voltage
MIN
MAX
4.5
5.5
2
Operating free-air temperature
–40
UNIT
V
V
0.8
V
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
II
ICC
∆ICC‡
Control inputs
Ci
Control inputs
TEST CONDITIONS
VCC = 4.5 V,
VCC = 0,
II = –18 mA
VI = 5.5 V
VCC = 5.5 V,
VCC = 5.5 V,
VI = 5.5 V or GND
IO = 0,
VCC = 5.5 V,
VI = 3 V or 0
One input at 3.4 V,
Cio(OFF)
VO = 3 V or 0
ron§
VCC = 4.5 V
VI = 0
MIN
TYP†
MAX
UNIT
–1.2
V
10
±1
VI = VCC or GND
Other input at VCC or GND
II = 64 mA
II = 30 mA
µA
3
µA
2.5
mA
5
pF
5.5
pF
5
7
5
7
Ω
VI = 2.4 V,
II = 15 mA
7
12
† All typical values are at VCC = 5 V, TA = 25°C.
‡ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
§ Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the
lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd¶
A or B
B or A
ten
OE
A or B
OE
A or B
tdis
MIN
MAX
UNIT
0.25
ns
1.3
5.9
ns
1
5.3
ns
¶ The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50 pF, when
driven by an ideal voltage source (zero output impedance).
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
7V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
Output
Control
(low-level
enabling)
LOAD CIRCUIT
3V
1.5 V
0V
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
VOH
Output
1.5 V
Output
Waveform 1
S1 at 7 V
(see Note B)
1.5 V
VOL
3.5 V
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPLZ
1.5 V
tPZH
tPHL
1.5 V
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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Copyright  1998, Texas Instruments Incorporated