bq2056/T/V Low-Dropout Li-Ion Charge-Control ICs with AutoComp™ Charge-Rate Compensation Features General Description ➤ Significant reduction in charge time with AutoComp charge-rate compensation The bq2056 series ICs are low-cost precision linear charge-control devices for Li-Ion batteries. With a minimum number of external components, the bq2056 is a complete lowdropout linear charger. The dropout voltage is typically less than 0.5V when the bq2056 is used with an external PNP transistor or P-channel FET. Features include proprietary ➤ Ideal for low-dropout linear regulator design ➤ 1-cell, 2-cell, and programmable multicell versions ➤ Low-cost charger implementation with minimum number of external components ➤ Programmable current limit to accommodate any battery size automatic charge-rate compensation (AutoComp) and a trickle-charger interface output for reviving deeply discharged cells. The bq2056 supports a single-cell 4.1V pack and the 2056T supports a two-cell 8.2V pack. The bq2056V may be externally programmed for supporting other voltages. All versions feature a sleep mode for low-power applications. Functional Block Diagram ➤ Interface to external trickle charger for reviving deeply discharged batteries + SNS TRKL 2.0V ➤ High-accuracy charge control BAT ➤ Sleep mode for low power consumption COMP ➤ Direct battery voltage sense wi t h o ut r e s i s ti v e d i v i d e r s (bq2056 and bq2056T) SNS KCOMP + VREG 100mV CC + VSS ➤ Small 8-pin SOIC package INH BDbq2056.eps Pin Names Pin Connections Charge-inhibit input SNS Current sense input TRKL Trickle-charge interface output BAT Battery voltage input CC VSS Ground Charge control output COMP Charge-rate compensation input VCC Supply input INH INH 1 8 VCC TRKL 2 7 CC VSS 3 6 BAT COMP 4 5 SNS 8-Pin DIP or Narrow SOIC PN-205601.eps 10/98 B 1 bq2056/T/V SNS Pin Descriptions: INH Battery current is sensed via the voltage developed on this pin by an external senseresistor, connected in series with the negative terminal of the battery pack. Charge-inhibit input When input to this pin is high, the bq2056 suspends the charge in progress and places the device in sleep mode. When input is low, the bq2056 resumes operation. TRKL BAT This output is driven low if the battery voltage is less than an internal threshold level and INH is low. This open-drain output can enable an external trickle charger to revive a deeply discharged battery. Ground COMP Charge-rate compensation input Battery voltage input This is the battery voltage sense input. It is tied directly to the positive side of the battery pack on bq2056 and bq2056T versions. A simple resistive divider is required to generate this input for bq2056V. Trickle-charge interface output VSS Current sense input CC Charge-control output CC is an open-collector output that is used to control the charging current to the battery. VCC This input is used to set the charge-rate compensation level. The voltage regulation output may be programmed to vary as a function of the charge current delivered to the battery. This feature, called AutoComp, provides compensation for internal cell impedance and voltage drops in protection circuitry and therefore may be used to safely reduce charging time. Connecting this pin to VSS disables the AutoComp feature. 2 VCC supply input bq2056/T/V R3 Q1 4.7K 2N3906 5 VDC DC+ 2TX788B Q2 D1 1N5817 R5 2.7K R5 2K C2 DC- 0.1 F 1 2 3 4 INH VCC TRKL CC VS BAT COMP SNS 8 7 BAT+ 6 C1 10 F 10V 5 BAT- bq2056 R2 1K R6 0.3 R1 1K bq2056sc.eps Figure 1. Low-Dropout Single-Cell Li-Ion Charger is accomplished by comparing pin BAT voltage to the internal threshold VMIN. While pin BAT voltage is less than VMIN and pin INH is low, the open-drain output TRKL is driven low and the voltage/current regulator is disabled (CC=high-Z). In the bq2056V, low-voltage detection occurs when the voltage on pin BAT is less than or equal to VMIND. As shown in Figure 1, TRKL enables an external trickle-charge circuit to bring the battery voltage up to VMIN or VMIND. Functional Description The bq2056 supports a precision current- and voltagelimited charging system for Li-Ion batteries. The no-load voltage regulation references (VREG) for the bq2056 and bq2056T are maintained at 4.1V and 8.2V, respectively. The bq2056V provides variable regulation to accommodate a wide range of charge voltages and may be used to meet tighter tolerance requirements through external trimming. The functional block diagram for the bq2056 is on the first page of this data sheet, and Figure 1 illustrates a typical application. Current Regulation The bq2056 provides current regulation while the pack voltage is below the voltage limit. Charge-current feedback, applied through pin SNS, maintains regulation around a threshold of VSNS. The following formula calculates the value of the sense-resistor connected in series with the negative terminal of the battery pack (Figure 3): Charge Algorithm The bq2056 completes the charge cycle in two phases. A constant current phase replenishes approximately 70% of battery capacity, while an accurate voltage regulation phase completes the charge. RSNS= 0.1/ IMAX Figure 2 shows a typical charge algorithm for bq2056, including charge qualification, current regulation, and voltage regulation phases. where IMAX is the maximum charging current. IMAX should not exceed 1A. Charge Qualification An external PNP or power P-FET may be used as the series pass element with control provided through output pin CC. During charge qualification the bq2056 detects a low battery and reports this status on pin TRKL. Detection 3 bq2056/T/V External Trickle Charge Enabled AutoComp™ Phase VREG Current Voltage Regulation VMIN Voltage Voltage IMAX Current Regulation Cu rre nt 2056chg.eps Figure 2. bq2056 Charge Algorithm voltage to compensate for the battery’s internal impedance and undesired voltage drops in the circuit. Voltage Regulation Voltage regulation feedback is through pin BAT. This pin is connected directly to the pack in the bq2056 and bq2056T. This voltage is compared with the voltage regulation reference, VREG. In the bq2056V, a resistive divider may be used to generate this input (Figure 4). In this case, the voltage presented on pin BAT is compared with the internal reference voltage VREF. The resistor values RB1 and RB2 (Figure 4) are calculated based on the following equation: For bq2056 and bq2056T, the voltage across the battery pack, VPAK, is VPAK = VREG + (KCOMP ∗ voltage on pin COMP) For bq2056V, the compensation voltage is added to the product of the internal voltage reference, VREF, and the gain, KDIV, of the external resistive divider between the battery pack and BAT input, (Figure 4). RB1 N ∗ VCELL = −1 RB2 VREF VPAK = (VREF ∗ KDIV) + (KCOMP ∗ voltage on pin COMP) Sleep Mode where N = Number of cells in series The charge function may be disabled through pin INH. When INH is driven high, internal current consumption is reduced, and pins CC and TRKL assumes a highimpedance output state. VCELL = Manufacturer-specified charging voltage Automatic Charge-Rate Compensation (AutoComp) Feature To reduce charging time, the bq2056 series uses the proprietary AutoComp technique to compensate safely for internal impedance of battery and any voltage drops in the protection circuitry. This maximizes battery’s capacity while reducing charging time. Compensation is through input pin COMP (Figure 5). A portion of the current-sense voltage, presented through this pin, is scaled by a factor of KCOMP and summed with the regulation reference, VREG. This process increases the output 4 bq2056/T/V BAT+ RB1 3 BAT VSS SNS 5 BAT- bq2056 bq2056T bq2056V 3 RB2 VSS SNS RSNS 6 BAT- 5 bq2056V RSNS 2056CSR.eps 2056BVD.eps Figure 4. Battery Voltage Divider for bq2056V Figure 3. Current-Sensing Resistor 3 VCC 4 COMP SNS 5 BAT- bq2056 bq2056T bq2056V RC2 RC1 RSNS 2056ACC.eps Figure 5. AutoComp Circuit 5 bq2056/T/V Absolute Maximum Ratings Symbol Parameter Min Max Units VCC VCC relative to VSS -0.3 +18 V VT DC voltage applied on any pin (excluding VCC) relative to VSS -0.3 VCC+0.3 V TOPR Operating ambient temperature -20 70 °C TSTG Storage temperature -40 125 °C TSOLDER Soldering temperature - 260 °C PD Power dissipation 300 mW Notes 10s max. DC Thresholds (TA=TOPR and VCC = 5–17V unless otherwise specified) Symbol Parameter Rating Unit Tolerance VREG (bq2056) Voltage regulation reference 4.10 V ±1% VREG (bq2056T) Voltage regulation reference 8.20 V ±1% VREF (bq2056V) Voltage regulation reference 3.35 V ±1% VSNS Current regulation reference 100 mV ±15% VMIN (bq2056) Trickle-charge voltage reference 2.0 V ±15% VMIN (bq2056T) Trickle-charge voltage reference 4.0 V ±15% VMIND (bq2056V) Trickle-charge voltage reference 1.64 V ±15% KCOMP (bq2056) AutoComp constant 2.0 - ±10% KCOMP (bq2056T) AutoComp constant 4.0 - ±10% KCOMP (bq2056V) AutoComp constant 1.7 - ±10% 6 Notes bq2056/T/V Recommended DC Operating Conditions (TA=25°C) Symbol Parameter Min Typical Max Units Notes VCC Supply voltage relative to VSS 5.0 - 17.0 V ICC Supply current - 1 2 mA INH = LOW ICCS Sleep current - 10 30 µA INH = HIGH VIL Input low - - 0.5 V Pin INH VIH Input high 2.0 - - V Pin INH VOL Output low - - 0.4 V Pin TRKL, IOL = 1mA IOH Leakage current - - 1 µA Pin TRKL ISNK Sink current - - 40 mA Pin CC Min Typical Max Units Impedance Symbol Parameter RBAT BAT pin input impedance - 1 - MΩ RSNS SNS pin input impedance - 100 - kΩ RCOMP COMP pin input impedance - 100 - kΩ 7 Notes bq2056/T/V 8-Pin DIP (PN) 8-Pin PN (0.300" DIP) Inches D E1 E A B1 A1 L C B S e G 8 Millimeters Dimension A Min. Max. Min. Max. 0.160 0.180 4.06 4.57 A1 0.015 0.040 0.38 1.02 B 0.015 0.022 0.38 0.56 B1 0.055 0.065 1.40 1.65 C 0.008 0.013 0.20 0.33 D 0.350 0.380 8.89 9.65 E 0.300 0.325 7.62 8.26 E1 0.230 0.280 5.84 7.11 e 0.300 0.370 7.62 9.40 G 0.090 0.110 2.29 2.79 L 0.115 0.150 2.92 3.81 S 0.020 0.040 0.51 1.02 bq2056/T/V 8-Pin SOIC Narrow (SN) 8-Pin SN (0.150" SOIC) Inches 9 Millimeters Dimension A Min. Max. Min. Max. 0.060 0.070 1.52 1.78 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.18 0.25 D 0.185 0.200 4.70 5.08 E 0.150 0.160 3.81 4.06 e 0.045 0.055 1.14 1.40 H 0.225 0.245 5.72 6.22 L 0.015 0.035 0.38 0.89 bq2056/T/V Data Sheet Revision History Change No. 1 1 Note: Page No. 6 6 Description Changed tolerance for VREG and VREF in DC Thresholds table Changed value and tolerance for KCOMP in DC Thresholds table Change 1 = Oct. 1998 B changes from March 1998. 10 Nature of Change Was: ±0.7% with ±0.5% variation over power supply and temperature range Is: ±1% over power supply and temperature range Was: 2.0, ±15% Is: bq2056: 2.0, ±10% bq2056T: 4.0, ±10% bq2056V: 1.7, ±10% bq2056/T/V Ordering Information bq2056 Package Option: PN = 8-pin plastic DIP SN = 8-pin narrow SOIC Device: bq2056 Li-Ion Fast-Charge IC for one cell bq2056T Li-Ion Fast-Charge IC for two cells bq2056V Programmable Li-Ion Fast-Charge IC 11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1999, Texas Instruments Incorporated