HD74HC175 Quad. D-typ Flip-Flops (with Clear) Description Information at the D inputs of the HD74HC175 is transferred to the Q and Q outputs on the positive going edge of the clock pulse. Both true and compliment outputs from each flip-flop are externally available. All four flip flops are controlled by a common clock and a common clear. Clearing is accomplished by a negative pulse at the clear input. All four Q outputs are cleared to a logic low level and all four Q outputs to a logic high level. Features • • • • • High Speed Operation: tpd (Clock to Q) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs Outputs Clear Clock D Q Q L X X L H H H H L H L L H H no change H L HD74HC175 Pin Arrangement 16 VCC Clear 1 1Q 2 1Q 3 Q CLR CK Q D CLR Q CK Q D 15 4Q 14 4Q 1D 4 13 4D 2D 5 12 3D 2Q 6 2Q 7 D Q CK CLR Q D CK Q CLR Q 11 3Q 10 3Q 9 Clock GND 8 (Top view) Logic Diagram 1D Q 1Q CK CL 1Q D CK Clock 2D Q 2Q CK CL 2Q D CK 3D Q 3Q CK CL 3Q D CK 4D Q 4Q CK CL 4Q D CK Clear 2 HD74HC175 DC Characteristics Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Input voltage VIH 2.0 1.5 — — 1.5 — V 4.5 3.15 — — 3.15 — 6.0 4.2 — — 4.2 — 2.0 — — 0.5 — 0.5 4.5 — — 1.35 — 1.35 6.0 — — 1.8 — 1.8 2.0 1.9 2.0 — 1.9 — 4.5 4.4 4.5 — 4.4 — 6.0 5.9 6.0 — 5.9 — 4.5 4.18 — — 4.13 — I OH = –4 mA 6.0 5.68 — — 5.63 — I OH = –5.2 mA 2.0 — 0.0 0.1 — 0.1 4.5 — 0.0 0.1 — 0.1 6.0 — 0.0 0.1 — 0.1 4.5 — — 0.26 — 0.33 I OL = 4 mA 6.0 — — 0.26 — 0.33 I OL = 5.2 mA VIL Output voltage VOH VOL Test Conditions V V V Vin = VIH or VIL I OH = –20 µA Vin = VIH or VIL I OL = 20 µA Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND Quiescent supply current I CC 6.0 — — 4.0 40 µA Vin = VCC or GND, Iout = 0 µA — 3 HD74HC175 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Maximum clock f max 2.0 — — 6 — 5 MHz 4.5 — — 30 — 24 6.0 — — 35 — 28 Propagation delay t PLH 2.0 — — 150 — 190 time 4.5 — 14 30 — 38 6.0 — — 26 — 33 2.0 — — 185 — 230 4.5 — 14 37 — 46 6.0 — — 31 — 39 2.0 100 — — 125 — 4.5 20 3 — 25 — 6.0 17 – — 21 — 2.0 5 — — 5 — 4.5 5 –1 — 5 — 6.0 5 — — 5 — 2.0 100 — — 125 — 4.5 20 –1 — 25 — 6.0 17 — — 21 — 2.0 80 — — 100 — 4.5 16 9 — 20 — 6.0 14 — — 17 — frequency Setup time Hold time Removal time Pulse width t PHL t su th t rem tw Output rise/fall t TLH 2.0 — — 75 — 95 time t THL 4.5 — 5 15 — 19 6.0 — — 13 — 16 — — 5 10 — 10 Input capacitance 4 Cin ns Test Conditions Clock to Q or Q Clear to Q or Q ns Data to Clock ns Clock to Data ns Clear to Clock ns Clock, Clear ns pF Unit: mm 19.20 20.00 Max 1 7.40 Max 9 6.30 16 8 1.3 0.48 ± 0.10 2.54 Min 5.06 Max 2.54 ± 0.25 0.51 Min 1.11 Max 7.62 + 0.13 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° 0.67 0.60 +– 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Unit: mm 4.40 5.00 5.30 Max 16 9 1 8 0.65 0.13 M 1.10 Max 0.65 Max 0.10 *Dimension including the plating thickness Base material dimension 6.40 ± 0.20 0.07 +0.03 –0.04 0.20 ± 0.06 1.0 *0.17 ± 0.05 0.15 ± 0.04 0.08 *0.22 +– 0.07 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-16DA — — 0.05 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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