HD74LV175A Quad. D-type Flip-Flops with Clear ADE-205-270 (Z) 1st Edition April 1999 Description Information at the D inputs of the HD74LV175A is transferred to the Q and Q outputs on the positive going edge of the clock pulse. Both true and complement outputs from each flip-flop are externally available. All four flip-flops are controlled by a common clock and common clear. Clearing is accomplished by a negative pulse at the clear input. All four Q outputs are cleared to a logic low level and all four Q outputs to a logic high level. Low-voltage and high-speed operation is suitable for battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features • • • • • • VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) Function Table Inputs Outputs CLR CLK D Q Q L X X L H H ↑ H H L H ↑ L L H H ↓ X no change no change Note: H: L: X: ↑: ↓: High level Low level Immaterial Low to high transition High to low transition HD74LV175A Pin Arrangement CLR 1 16 VCC 1Q 2 15 4Q 1Q 3 14 4Q 1D 4 13 4D 2D 5 12 3D 2Q 6 11 3Q 2Q 7 10 3Q 9 CLK GND 8 (Top view) 2 HD74LV175A Absolute Maximum Ratings Item Supply voltage range Input voltage range* 1 Output voltage range* 1, 2 Symbol Ratings Unit VCC –0.5 to 7.0 V VI –0.5 to 7.0 V VO –0.5 to VCC + 0.5 V –0.5 to 7.0 Conditions Output: H or L VCC: OFF Input clamp current I IK –20 mA VI < 0 Output clamp current I OK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±25 mA VO = 0 to VCC Continuous current through VCC or GND I CC or IGND ±50 mA Maximum power dissipation at Ta = 25°C (in still air)*3 PT 785 mW 500 Storage temperature Tstg –65 to 150 SOP TSSOP °C Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. 3 HD74LV175A Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 2.0 5.5 V Input voltage range VI 0 5.5 V Output voltage range VO 0 VCC V H or L Output current I OH — –50 µA VCC = 2.0 V — –2 mA VCC = 2.3 to 2.7 V — –6 VCC = 3.0 to 3.6 V — –12 VCC = 4.5 to 5.5 V — 50 µA VCC = 2.0 V — 2 mA VCC = 2.3 to 2.7 V — 6 VCC = 3.0 to 3.6 V — 12 VCC = 4.5 to 5.5 V 0 200 0 100 VCC = 3.0 to 3.6 V 0 20 VCC = 4.5 to 5.5 V –40 85 I OL Input transition rise or fall rate Operating free-air temperature ∆t /∆v Ta Conditions ns/V VCC = 2.3 to 2.7 V °C Note: Unused or floating inputs must be held high or low. Logic Diagram CLR CLK 1D 1 9 3 1D 2 1Q C1 3 R To Three Other Channels 4 1Q HD74LV175A DC Electrical Characteristics • Ta = –40 to 85°C Item Symbol VCC (V)* Min Typ Max Unit Input voltage VIH 2.0 1.5 — — V 2.3 to 2.7 VCC × 0.7 — — 3.0 to 3.6 VCC × 0.7 — — 4.5 to 5.5 VCC × 0.7 — — 2.0 — — 0.5 2.3 to 2.7 — — VCC × 0.3 3.0 to 3.6 — — VCC × 0.3 4.5 to 5.5 — — VCC × 0.3 Min to Max VCC – 0.1 — — 2.3 2.0 — — IOH = –2 mA 3.0 2.48 — — IOH = –6 mA 4.5 3.8 — — IOH = –12 mA Min to Max — — 0.1 IOL = 50 µA 2.3 — — 0.4 IOL = 2 mA 3.0 — — 0.44 IOL = 6 mA 4.5 — — 0.55 IOL = 12 mA VIL Output voltage VOH VOL V Test Conditions IOH = –50 µA Input current IIN 0 to 5.5 — — ±1 µA VI = 5.5 V or GND Quiescent supply current ICC 5.5 — — 20 µA VI = VCC or GND, IO = 0 Output leakage current IOFF 0 — — 5 µA VI or VO = 0 V to 5.5 V Input capacitance CIN 3.3 — 1.4 — pF VI = VCC or GND Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. 5 HD74LV175A Switching Characteristics • VCC = 2.5 ± 0.2 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Maximum clock frequency fmax 50 105 — 45 — MHz CL = 15 pF 40 80 — 35 — — 9.3 18.8 1.0 22.0 — 12.0 23.3 1.0 27.0 CL = 50 pF — 7.9 16.6 1.0 20.0 CL = 15 pF — 10.4 21.6 1.0 25.5 CL = 50 pF 7.0 — — 7.5 — 7.0 — — 7.5 — Propagation delay time tPLH / tPHL tPHL Setup time tSU FROM (Input) TO (Output) CLK Q, Q CL = 50 pF ns ns CL = 15 pF CLR Data before CLK ↑ CLR inactive before CLK ↑ Hold time th 0.5 — — 1.0 — ns Data after CLK↑ Pulse width tW 6.0 — — 6.0 — ns CLR L 6.5 — — 7.0 — 6 CLK H or L HD74LV175A Switching Characteristics (cont) VCC = 3.3 ± 0.3 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Maximum clock frequency fmax 90 155 — 75 — MHz CL = 15 pF 50 120 — 45 — — 6.5 11.5 1.0 13.5 — 8.4 15.0 1.0 17.0 CL = 50 pF — 5.5 10.1 1.0 12.0 CL = 15 pF — 7.4 13.6 1.0 15.5 CL = 50 pF 5.0 — — 5.0 — 5.0 — — 5.0 — Propagation delay time tPLH / tPHL tPLH / tPHL Setup time tSU FROM (Input) TO (Output) CLK Q, Q CL = 50 pF ns ns CL = 15 pF CLR Data before CLK ↑ CLR inactive before CLK ↑ Hold time th 1.0 — — 1.0 — ns Data after CLK↑ Pulse width tW 5.0 — — 5.0 — ns CLR L 5.0 — — 5.0 — CLK H or L 7 HD74LV175A Switching Characteristics (cont) VCC = 5.0 ± 0.5 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Maximum clock frequency fmax 150 215 — 125 — MHz CL = 15 pF 85 165 — 75 — — 4.6 7.3 1.0 8.5 — 6.0 9.3 1.0 10.5 CL = 50 pF — 3.7 6.4 1.0 7.5 CL = 15 pF — 5.3 8.4 1.0 9.5 CL = 50 pF 4.0 — — 4.0 — 5.0 — — 5.0 — Propagation delay time tPLH / tPHL tPLH / tPHL Setup time tSU FROM (Input) TO (Output) CLK Q, Q CL = 50 pF ns ns CL = 15 pF CLR Data before CLK ↑ CLR inactive before CLK ↑ Hold time th 1.0 — — 1.0 — ns Data after CLK↑ Pulse width tW 5.0 — — 5.0 — ns CLR L 5.0 — — 5.0 — 8 CLK H or L HD74LV175A Output-skew Characteristics Ta = 25°C Ta = –40 to 85°C Item Symbol VCC = (V) Min Typ Max Min Max Unit Output skew t sk (O) 2.3 to 2.7 — — 2.0 — 2.0 ns 3.0 to 3.6 — — 1.5 — 1.5 4.5 to 5.5 — — 1.0 — 1.0 Note: Skew between any outputs of the same package switching in the same direction. This parameter is warranted but not production tested. Operating Characteristics • CL = 50 pF Ta = 25°C Item Symbol VCC = (V) Min Typ Max Unit Test Conditions Power dissipation capacitance CPD 3.3 — 13.6 — pF f = 10 MHz 5.0 — 14.5 — Test Conditions Noise Characteristics • CL = 50 pF Ta = 25°C Item Symbol VCC = (V) Min Typ Max Unit Quiet output, maximum dynamic VOL VOL (P) 3.3 — 0.3 0.8 V Quiet output, minimum dynamic VOL VOL (V) 3.3 — –0.3 –0.8 Quiet output, minimum dynamic VOH VOH (V) 3.3 — 3.0 — High-level dynamic input voltage VIH (D) 3.3 2.31 — — Low-level dynamic input voltage VIL (D) 3.3 — — 0.99 V 9 HD74LV175A Test Circuit Measurement point CL* Note: C L includes the probe and jig capacitance. 10 HD74LV175A tr • Waveform-1 Timing input 10 % t su tf 90 % 50 % V CC 90 % 50 % V CC VCC 10 % th 0V VCC 50 % V CC Data input 50 % V CC 0V tw VCC Input 50 % V CC 50 % V CC 0V tr tf • Waveform-2 10 % Input 90 % 50 % V CC 90 % 50 % V CC VCC 10 % t PHL t PLH 0V VOH 50 % V CC In phase output 50 % V CC VOL t PHL t PLH VOH Out of phase output 50 % V CC 50 % V CC VOL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns 2. The output is measured one at a time with one transition per measurement. 11 HD74LV175A Package Dimensions 10.06 10.5 Max 9 1 8 1.27 0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max 0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M Dimension including the plating thickness Base material dimension 12 Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g HD74LV175A Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° + 0.67 0.60 – 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g 13 HD74LV175A 5.0 5.3 Max 9 1 8 4.40 16 0.65 0.13 M 1.10 Max 0.65 Max 0.10 Dimension including the plating thickness Base material dimension 14 6.40 ± 0.20 0.07 +0.03 –0.04 0.20 ± 0.06 1.0 0.17 ± 0.05 0.15 ± 0.04 0.08 0.22 +– 0.07 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-16DA — — 0.05 g Cautions 1. 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