TI SN74LVCH16T245DLR

SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
FEATURES
•
•
•
•
•
•
•
•
DGG OR DGV PACKAGE
(TOP VIEW)
Control Inputs VIH/VIL Levels Are Referenced
to VCCA Voltage
VCC Isolation Feature – If Either VCC Input Is at
GND, All Outputs Are in the High-Impedance
State
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
DESCRIPTION/ORDERING INFORMATION
This 16-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The A port
is designed to track VCCA. VCCA accepts any supply
voltage from 1.65 V to 5.5 V. The B port is designed
to track VCCB. VCCB accepts any supply voltage from
1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.8-V,
2.5-V, 3.3-V, and 5-V voltage nodes.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
The SN74LVCH16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
The SN74LVCH16T245 is designed for asynchronous communication between two data buses. The logic levels
of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the
A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A
bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs
are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW
level applied to prevent excess ICC and ICCZ.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
TSSOP – DGG
Tape and reel
SN74LVCH16T245DGGR
LVCH16T245
TVSOP – DGV
Tape and reel
SN74LVCH16T245DGVR
LDHT245
VFBGA – GQL
Tape and reel
SN74LVCH16T245GQLR
LDHT245
VFBGA – ZQL (Pb-free)
Tape and reel
SN74LVCH16T245ZQLR
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then all outputs are in the high-impedance
state. The bus-hold circuitry on the powered-up side always stays active.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
GQL OR ZQL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
TERMINAL ASSIGNMENTS (1)
1
(1)
2
3
4
6
A
1DIR
NC
NC
NC
NC
1OE
B
1B2
1B1
GND
GND
1A1
1A2
C
1B4
1B3
VCCB
VCCA
1A3
1A4
D
1B6
1B5
GND
GND
1A5
1A6
E
1B8
1B7
1A7
1A8
F
2B1
2B2
2A2
2A1
G
2B3
2B4
GND
GND
2A4
2A3
H
2B5
2B6
VCCB
VCCA
2A6
2A5
J
2B7
2B8
GND
GND
2A8
2A7
K
2DIR
NC
NC
NC
NC
2OE
NC – No internal connection
FUNCTION TABLE (1)
(EACH 16-BIT SECTION)
CONTROL INPUTS
OE
(1)
2
5
OUTPUT CIRCUITS
B PORT
OPERATION
DIR
A PORT
L
L
Enabled
Hi-Z
B data to A bus
L
H
Hi-Z
Enabled
A data to B bus
H
X
Hi-Z
Hi-Z
Isolation
Input circuits of the data I/Os are always active.
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
2OE
36
13
1B1
2B1
To Seven Other Channels
To Seven Other Channels
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
Supply voltage range
VI
Input voltage range (2)
VO
Voltage range applied to any output
in the high-impedance or power-off state (2)
MIN
MAX
–0.5
6.5
I/O ports (A port)
–0.5
6.5
I/O ports (B port)
–0.5
6.5
Control inputs
–0.5
6.5
A port
–0.5
6.5
B port
–0.5
6.5
A port
–0.5 VCCA + 0.5
B port
–0.5 VCCB + 0.5
UNIT
V
V
V
VO
Voltage range applied to any output in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
Continuous current through each VCCA, VCCB, and GND
θJA
Package thermal impedance (4)
Tstg
Storage temperature range
DGG package
70
DGV package
58
GQL/ZQL package
(1)
(2)
(3)
(4)
V
°C/W
28
–65
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
3
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
Recommended Operating Conditions (1) (2) (3)
VCCI
VCCA
VCCB
VCCO
Supply voltage
High-level
input voltage
Data inputs (4)
MAX
1.65
5.5
1.65
5.5
2.3 V to 2.7 V
1.7
3 V to 3.6 V
VCCI × 0.7
VCCI × 0.35
1.65 V to 1.95 V
VIL
Data inputs (4)
2.3 V to 2.7 V
0.7
3 V to 3.6 V
0.8
VCCA × 0.65
1.65 V to 1.95 V
High-level
input voltage
Control inputs
(referenced to VCCA) (5)
2.3 V to 2.7 V
1.7
3 V to 3.6 V
V
2
VCCA × 0.7
4.5 V to 5.5 V
VCCA × 0.35
1.65 V to 1.95 V
2.3 V to 2.7 V
0.7
3 V to 3.6 V
0.8
VIL
Low-level
input voltage
Control inputs
(referenced to VCCA) (5)
VI
Input voltage
Control inputs
0
5.5
Active state
0
VCCO
3-State
0
5.5
Input/output voltage
IOH
High-level output current
1.65 V to 1.95 V
–4
2.3 V to 2.7 V
–8
3 V to 3.6 V
–24
4.5 V to 5.5 V
–32
1.65 V to 1.95 V
IOL
Low-level output current
∆t/∆v
TA
(1)
(2)
(3)
(4)
(5)
4
Input transition
rise or fall rate
Data inputs
Operating free-air temperature
V
VCCA × 0.3
4.5 V to 5.5 V
VI/O
V
VCCI × 0.3
4.5 V to 5.5 V
VIH
V
V
2
4.5 V to 5.5 V
Low-level
input voltage
UNIT
VCCI × 0.65
1.65 V to 1.95 V
VIH
MIN
V
V
mA
4
2.3 V to 2.7 V
8
3 V to 3.6 V
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
20
2.3 V to 2.7 V
20
3 V to 3.6 V
10
4.5 V to 5.5 V
5
–40
85
mA
ns/V
°C
VCCI is the VCC associated with the data input port.
VCCO is the VCC associated with the output port.
All unused control inputs of the device must be held at VCCA GND to ensure proper device operation and minimize power consumption.
Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
Electrical Characteristics
(1) (2)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
VOL
Control
inputs
II
IBHL (3)
IBHH (4)
VCCA
VCCB
IOH = –100 µA,
TEST CONDITIONS
VI = VIH
1.65 V to 4.5 V
1.65 V to 4.5 V
IOH = –4 mA,
VI = VIH
1.65 V
1.65 V
1.2
IOH = –8 mA,
VI = VIH
2.3 V
2.3 V
1.9
IOH = –24 mA,
VI = VIH
3V
3V
2.4
IOH = –32 mA,
VI = VIH
4.5 V
4.5 V
3.8
IOL = 100 µA,
VI = VIL
1.65 V to 4.5 V
1.65 V to 4.5 V
0.1
IOL = 4 mA,
VI = VIL
1.65 V
1.65 V
0.45
IOL = 8 mA,
VI = VIL
2.3 V
2.3 V
0.3
IOL = 24 mA,
VI = VIL
3V
3V
0.55
IOL = 32 mA,
VI = VIL
4.5 V
4.5 V
0.55
1.65 V to 5.5 V
1.65 V to 5.5 V
VI = 0.58 V
1.65 V
1.65 V
15
VI = 0.7 V
2.3 V
2.3 V
45
VI = 0.8 V
3V
3V
75
VI = VCCA or GND
Ioff
A or B
port
IOZ
B port
A port
ICCA
±1
4.5 V
100
1.65 V
–15
VI = 1.7 V
2.3 V
2.3 V
–45
3V
3V
–75
VI or VO = 0 to 5.5 V
VO = VCCO or
GND,
VI = VCCI or GND
OE = VIH
OE = don't
care
VI = VCCI or GND, IO = 0
4.5 V
4.5 V
–100
1.95 V
1.95 V
200
2.7 V
2.7 V
300
3.6 V
3.6 V
500
5.5 V
5.5 V
900
1.95 V
1.95 V
–200
2.7 V
2.7 V
–300
3.6 V
3.6 V
–500
µA
µA
5.5 V
5.5 V
0V
0 to 5.5 V
±0.5
±1
–900
±2
0 to 5.5 V
0V
±0.5
±1
±2
1.65 V to 5.5 V
1.65 V to 5.5 V
±1
±2
0V
5.5 V
±1
±2
±1
±2
5.5 V
0V
1.65 V to 5.5 V
1.65 V to 5.5 V
20
5V
0V
20
0V
5V
–2
1.65 V to 5.5 V
1.65 V to 5.5 V
20
5V
0V
–2
0V
5V
20
ICCA + ICCB
VI = VCCI or GND, IO = 0
1.65 V to 5.5 V
1.65 V to 5.5 V
30
(5)
(6)
µA
µA
VI = VCCI or GND, IO = 0
(4)
V
µA
ICCB
(1)
(2)
(3)
UNIT
V
±2
4.5 V
VI = 0 to VCC
B port
±0.5
1.65 V
VI = 0 to VCC
A port
MIN MAX
VCCO – 0.1
VI = 1.07 V
VI = 3.15 V
IBHHO (6)
TYP MAX
VI = 0.1.35 V
VI = 2 V
IBHLO (5)
MIN
µA
µA
µA
µA
µA
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND
and then raising it to VIL max.
The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to
VCC and then lowering it to VIH min.
An external driver must source at least IBHLO to switch this node from low to high.
An external driver must sink at least IBHHO to switch this node from high to low.
5
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
Electrical Characteristics (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCCA
VCCB
3 V to 5.5 V
3 V to 5.5 V
∆ICCA
DIR
DIR at VCCA – 0.6 V,
B port = open,
A port at VCCA or GND
Ci
Control
inputs
VI = VCCA or GND
3.3 V
3.3 V
Cio
A or B
port
VO = VCCA/B or GND
3.3 V
3.3 V
MIN
TYP MAX
MIN MAX
UNIT
50
µA
4
5
pF
8.5
10
pF
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
FROM
(INPUT)
TO
(OUTPUT)
A
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.7
21.9
1.3
9.2
1
7.4
0.4
7.1
ns
B
A
0.9
23.8
0.8
23.8
0.7
23.4
0.7
23.4
ns
OE
A
1.5
29.6
1.5
29.4
1.5
29.3
1.4
29.2
ns
OE
B
2.4
32.2
1.9
13.1
1.7
12
1.3
10.3
ns
OE
A
0.4
24
0.4
23.8
0.4
23.7
0.4
23.7
ns
OE
B
1.8
32
1.5
18
1.2
12.6
0.9
10.8
ns
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
6
FROM
(INPUT)
TO
(OUTPUT)
A
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
MIN
MAX
MIN MAX
B
1.5
21.4
1.2
B
A
1.2
9.3
OE
A
1.4
OE
B
OE
OE
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
9
0.8
6.2
0.6
4.8
ns
1
9.1
1
8.9
0.9
8.8
ns
9
1.4
9
1.4
9
1.4
9
ns
2.3
29.6
1.8
11
1.7
9.3
0.9
6.9
ns
A
1
10.9
1
10.9
1
10.9
1
10.9
ns
B
1.7
28.2
1.5
12.9
1.2
9.4
1
6.9
ns
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.6
21.2
1.1
8.8
0.8
6.2
0.6
4.4
ns
B
A
0.8
7.2
0.8
6.2
0.7
6.1
0.6
6
ns
OE
A
1.6
8.2
1.6
8.2
1.6
8.2
1.6
8.2
ns
OE
B
2.1
29
1.7
10.3
1.5
8.8
0.8
6.3
ns
OE
A
0.8
7.8
0.8
8.1
0.8
8.1
0.8
8.1
ns
OE
B
1.8
27.7
1.4
12.4
1.1
8.5
0.8
6.4
ns
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
FROM
(INPUT)
TO
(OUTPUT)
A
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
MIN MAX
VCC = 3.3 V
± 0.3 V
MIN MAX
VCC = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN MAX
B
1.5
21.4
1
8.8
0.7
6
0.4
4.2
ns
B
A
0.7
7
0.4
4.8
0.3
4.5
0.3
4.3
ns
OE
A
0.3
5.4
0.3
5.4
0.3
5.4
0.3
5.4
ns
OE
B
2
28.7
1.8
9.7
1.4
8
0.7
5.7
ns
OE
A
0.7
6.4
0.7
6.4
0.7
6.4
0.7
6.4
ns
OE
B
1.5
27.6
1.3
11.4
1
8.1
0.9
6
ns
Operating Characteristics
TA = 25°C
PARAMETER
CpdA (1)
CpdB (1)
(1)
TEST
CONDITIONS
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
B-port input, A-port output
VCCA =
VCCB = 1.8 V
VCCA =
VCCB = 2.5 V
VCCA =
VCCB = 3.3 V
VCCA =
VCCB = 5 V
TYP
TYP
TYP
TYP
2
2
2
3
18
19
19
22
18
19
20
22
2
2
2
2
UNIT
pF
Power dissipation capacitance per transceiver
7
SN74LVCH16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES635A – JULY 2005 – REVISED AUGUST 2005
PARAMETER MEASUREMENT INFORMATION
2 × VCCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2
Input
VCCO
CL
RL
VTP
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
15 pF
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.15 V
0.15 V
0.3 V
0.3 V
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
VCCA/2
0V
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VCCO/2
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOH
VCCO/2
VOL
tPLZ
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
VCCO/2
VOL + VTP
VOL
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
tPHZ
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns,
dv/dt ≥1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
J. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
PACKAGE OPTION ADDENDUM
www.ti.com
24-Feb-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74LVCH16T245DGGRE4
ACTIVE
TSSOP
DGG
48
74LVCH16T245DLG4
ACTIVE
SSOP
DL
48
74LVCH16T245DLRG4
ACTIVE
SSOP
DL
74LVCH16T245ZQLR
ACTIVE
BGA MI
CROSTA
R JUNI
OR
SN74LVCH16T245DGGR
ACTIVE
SN74LVCH16T245DGVR
MSL Peak Temp (3)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ZQL
56
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVCH16T245DL
ACTIVE
SSOP
DL
48
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVCH16T245DLR
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVCH16T245KR
ACTIVE
GQL
56
1000
SNPB
Level-1-240C-UNLIM
BGA MI
CROSTA
R JUNI
OR
2000 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
25
25
TBD
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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