SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 FEATURES • • • • • Member of the Texas Instruments Widebus™ Family DOC™ Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.5-V VCC Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State • • • • • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Ioff Supports Partial-Power-Down Mode Operation Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DESCRIPTION/ORDERING INFORMATION This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVCA164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVCA164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, then both ports are in the high-impedance state. ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C (1) ORDERABLE PART NUMBER TOP-SIDE MARKING TSSOP – DGG Tape and reel SN74AVCA164245GR AVCA164245 TVSOP – DGV Tape and reel SN74AVCA164245VR WA4245 VFBGA – GQL Tape and reel SN74AVCA164245KR VFBGA – ZQL Tape and reel 74AVCA164245ZQLR WA4245 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2005, Texas Instruments Incorporated SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 TERMINAL ASSIGNMENTS DGG OR DGV PACKAGE (TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1B4 VCCB 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCCB 2B5 2B6 GND 2B7 2B8 2DIR 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 1OE 1A1 1A2 GND 1A3 1A4 VCCA 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCCA 2A5 2A6 GND 2A7 2A8 2OE GQL OR ZQL PACKAGE (TOP VIEW) 1 2 3 4 5 TERMINAL ASSIGNMENTS (1) 1 6 2 3 5 6 A 1DIR NC NC NC NC 1OE A B 1B2 1B1 GND GND 1A1 1A2 B C 1B4 1B3 VCCB VCCA 1A3 1A4 D 1B6 1B5 GND GND 1A5 1A6 E 1B8 1B7 1A7 1A8 F 2B1 2B2 2A2 2A1 G 2B3 2B4 GND GND 2A4 2A3 2A5 C D E F H 2B5 2B6 VCCB VCCA 2A6 G J 2B7 2B8 GND GND 2A8 2A7 H K 2DIR NC NC NC NC 2OE J K (1) 2 4 NC – No internal connection www.ti.com SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES395B – JULY 2002 – REVISED OCTOBER 2005 FUNCTION TABLE (EACH 8-BIT SECTION) INPUTS OE OPERATION DIR L L B data to A bus L H A data to B bus H X Isolation LOGIC DIAGRAM (POSITIVE LOGIC) 1DIR 1 2DIR 48 1A1 25 1OE 47 2A1 2 To Seven Other Channels 24 2OE 36 13 1B1 2B1 To Seven Other Channels Pin numbers shown are for the DGG and DGV packages. 3 SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB Supply voltage range VI Input voltage range (2) MIN MAX –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.5 UNIT V V VO Voltage range applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCCA, VCCB, or GND θJA Package thermal impedance (4) Tstg Storage temperature range DGG package 70 DGV package 58 GQL/ZQL package (1) (2) (3) (4) 4 V V °C/W 42 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51-7. www.ti.com SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES395B – JULY 2002 – REVISED OCTOBER 2005 Recommended Operating Conditions (1) (2) (3) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.4 3.6 V VCCB Supply voltage 1.4 3.6 V High-level input voltage VIH Low-level input voltage VIL High-level input voltage VIH VIL Low-level input voltage VI Input voltage VO Output voltage IOH Data inputs Data inputs Control inputs (referenced to VCCA) Control inputs (referenced to VCCA) VCCI × 0.65 1.95 V to 2.7 V 1.7 2.7 V to 3.6 V 2 V 1.4 V to 1.95 V VCCI × 0.35 1.95 V to 2.7 V 0.7 2.7 V to 3.6 V 0.8 1.4 V to 1.95 V VCCA × 0.65 1.95 V to 2.7 V 1.7 2.7 V to 3.6 V 2 1.4 V to 1.95 V VCCA × 0.35 1.95 V to 2.7 V 0.7 2.7 V to 3.6 V 3.6 0 VCCO 3-state 0 3.6 Low-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature V 0.8 Active state High-level output current V V 0 IOL (1) (2) (3) 1.4 V to 1.95 V 1.4 V to 1.6 V –2 1.65 V to 1.95 V –4 2.3 V to 2.7 V –8 3 V to 3.6 V –12 1.4 V to 1.6 V 2 1.65 V to 1.95 V 4 2.3 V to 2.7 V 8 3 V to 3.6 V 12 –40 V V mA mA 5 ns/V 85 °C VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 5 SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL Control inputs II A port Ioff B port TEST CONDITIONS IOZ B port A port ICCA MIN TYP (3) MAX VI = VIH 1.4 V to 3.6 V 1.4 V to 3.6 V IOH = –2 mA, VI = VIH 1.4 V 1.4 V IOH = –4 mA, VI = VIH 1.65 V 1.65 V 1.2 IOH = –8 mA, VI = VIH 2.3 V 2.3 V 1.75 IOH = –12 mA, VI = VIH 3V 3V 2.3 IOH = 100 µA, VI = VIL 1.4 V to 3.6 V 1.4 V to 3.6 V 0.2 IOH = 2 mA, VI = VIL 1.4 V 1.4 V 0.35 IOH = 4 mA, VI = VIL 1.65 V 1.65 V 0.45 IOH = 8 mA, VI = VIL 2.3 V 2.3 V 0.55 IOH = 12 mA, VI = VIL 3V 3V 0.7 1.4 V to 3.6 V 3.6 V ±2.5 VI = VCCA or GND VI or VO = 0 to 3.6 V VO = VCCO or GND, VI = VIH or VIL VI = VCCI or GND, ICCB VCCB IOH = –100 µA, A or B port (4) VCCA VI = VCCI or GND, 1.05 V 0V 0 to 3.6 V ±10 0 to 3.6 V 0V ±10 3.6 V 3.6 V ±12.5 0V 3.6 V ±12.5 3.6 V 0V ±12.5 OE = VIH OE = don't care 1.6 V 1.6 V 20 1.95 V 1.95 V 20 2.7 V 2.7 V 30 0V 3.6 V –40 3.6 V 0V 40 3.6 V 3.6 V 40 1.6 V 1.6 V 20 1.95 V 1.95 V 20 2.7 V 2.7 V 30 0V 3.6 V 40 3.6 V 0V –40 3.6 V 3.6 V 40 IO = 0 IO = 0 UNIT VCCO – 0.2 V µA µA µA µA µA Ci Control inputs VI = 3.3 V or GND 3.3 V 3.3 V 4 pF Cio A or B port VO = 3.3 V or GND 3.3 V 3.3 V 5 pF (1) (2) (3) (4) 6 VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. All typical values are at TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.7 6.7 1.9 6.3 1.8 5.5 1.7 5.8 A 1.8 6.8 2.2 7.4 2.1 7.6 2.1 7.3 A 2.6 8.4 2.7 8.2 2.3 6.3 2.1 5.6 B 2.7 8.6 3.2 10.2 3.2 10.8 3.2 10.7 A 2.1 7 2.5 7 1.7 5.3 2 6.1 B 2.1 7.1 2.5 7.1 2.1 6.5 2.1 6.4 UNIT ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.7 6.4 1.8 6 1.7 4.7 1.6 4.3 A 1.4 5.5 1.8 6 1.8 5.8 1.8 5.5 A 2.5 8 2.7 7.8 2.2 5.8 2 5.1 B 1.8 6.7 2.7 7.8 2.7 8.1 2.7 8.1 A 2.1 6.4 2.5 6.4 1.5 4.5 1.8 5 B 2.1 6.6 2.5 6.4 2 5.5 2 5.5 UNIT ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B B A ten OE tdis OE VCCB = 1.5 V ± 0.1 V MIN VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MAX MIN MAX MIN MAX MIN MAX 1.6 6 1.8 5.6 1.5 4 1.4 3.4 1.3 4.6 1.7 4.4 1.5 4 1.4 3.7 A 2.6 7.4 2.7 7.2 2.2 5.3 2 4.5 B 1.2 4.1 2.2 5.1 2.2 5.3 2.2 5.3 A 2 5.7 2.3 5.7 1.4 3.7 1.6 4 B 0.9 4.5 1.7 4.5 1.4 3.7 1.4 3.7 UNIT ns ns ns 7 SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) A B tpd ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.5 5.9 1.7 5.4 1.5 3.7 1.4 3.1 A 1.3 4.5 1.6 3.8 1.5 3.3 1.4 3.1 A 2.5 7 2.6 6.9 2.1 5 1.9 4.1 B 0.8 2.6 1.9 4 2 4.1 1.9 4.1 A 1.2 5.4 2.2 5.2 1.2 3.3 1.5 3.6 B 1.2 5.4 1.7 4.4 1.5 3.6 1.5 3.6 TEST CONDITIONS TYP UNIT ns ns ns Operating Characteristics VCCA and VCCB = 3.3 V, TA = 25°C PARAMETER CpdA CpdB Power dissipation capacitance per transceiver, A-port input, B-port output Outputs enabled Power dissipation capacitance per transceiver, B-port input, A-port output Outputs enabled Outputs disabled 7 Power dissipation capacitance per transceiver, A-port input, B-port output Outputs enabled 14 Outputs disabled Outputs disabled Outputs enabled Power dissipation capacitance per transceiver, B-port input, A-port output UNIT 14 CL = 0, CL = 0, 7 f = 10 MHz 20 7 f = 10 MHz 20 Outputs disabled pF pF 7 OUTPUT DESCRIPTION The DOC™ circuitry is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009. 3.2 TA = 25°C Process = Nominal - Output Voltage - V 2.8 2.4 VCC = 3.3 V 2.0 1.6 VCC = 2.5 V 1.2 OH VCC = 1.8 V 0.8 V VOL - Output Voltage - V 2.8 TA = 25°C Process = Nominal 2.4 2.0 1.6 1.2 0.8 VCC = 3.3 V 0.4 0.4 0 17 34 51 68 85 102 119 IOL - Output Current - mA 136 153 170 VCC = 1.8 V -160 -144 -128 -112 -96 -80 -64 -48 IOH - Output Current - mA Figure 1. Output Voltage vs Output Current 8 VCC = 2.5 V -32 -16 0 SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 30 pF 30 pF 30 pF 2 kΩ 1 kΩ 500 Ω 500 Ω 0.1 V 0.15 V 0.15 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCB Output Control (low-level enabling) VCCB/2 VCCB/2 0V tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOH VCCO/2 VOL tPLZ VCCO Output Waveform 1 S1 at 2 × VCCO (see Note B) VCCO/2 VOL + VTP VOL tPZH Output Waveform 2 S1 at GND (see Note B) tPHZ VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 2. Load Circuit and Voltage Waveforms 9 PACKAGE OPTION ADDENDUM www.ti.com 24-Nov-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 74AVCA164245GRE4 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74AVCA164245GRG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74AVCA164245VRE4 ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74AVCA164245VRG4 ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74AVCA164245ZQLR ACTIVE BGA MI CROSTA R JUNI OR ZQL 56 1000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SN74AVCA164245GR ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AVCA164245KR ACTIVE BGA MI CROSTA R JUNI OR GQL 56 1000 SNPB Level-1-240C-UNLIM SN74AVCA164245VR ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TBD Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Nov-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 74AVCA164245ZQLR BGA MI CROSTA R JUNI OR ZQL 56 1000 330.0 16.4 4.8 7.3 1.45 8.0 16.0 Q1 74AVCA164245ZQLR BGA MI CROSTA R JUNI OR ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1 SN74AVCA164245GR TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1 SN74AVCA164245KR BGA MI CROSTA R JUNI OR GQL 56 1000 330.0 16.4 4.8 7.3 1.45 8.0 16.0 Q1 SN74AVCA164245KR BGA MI CROSTA R JUNI OR GQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1 SN74AVCA164245VR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Nov-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) 74AVCA164245ZQLR BGA MICROSTAR JUNIOR ZQL 56 1000 346.0 346.0 33.0 74AVCA164245ZQLR BGA MICROSTAR JUNIOR ZQL 56 1000 333.2 345.9 28.6 SN74AVCA164245GR TSSOP DGG 48 2000 346.0 346.0 41.0 SN74AVCA164245KR BGA MICROSTAR JUNIOR GQL 56 1000 346.0 346.0 33.0 SN74AVCA164245KR BGA MICROSTAR JUNIOR GQL 56 1000 333.2 345.9 28.6 SN74AVCA164245VR TVSOP DGV 48 2000 346.0 346.0 33.0 Pack Materials-Page 2 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. 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