CDC392 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995 D D D D D D D D D PACKAGE (TOP VIEW) Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Drive Outputs (– 32-mA IOH, 32-mA IOL) State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Packaged In Plastic Small-Outline Package GND 1Y2 1Y3 GND 2Y1 2Y2 GND 3Y1 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 1Y1 1T/C VCC 2T/C A VCC 3T/C OE description The CDC392 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control (T/C) inputs, various combinations of true and complementary outputs can be obtained. The output-enable (OE) input is provided to disable the outputs to a high-impedance state. The CDC392 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE INPUTS OE T/C A OUTPUT Y H X X Z L L L L L L H H L H L H L H H L Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-ΙΙB is a trademark of Texas Instruments Incorporated. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CDC392 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995 logic symbol† 9 OE EN 1 12 A 15 1T/C 13 2T/C 10 3T/C 1 N1 1 N2 2 N3 2 3 16 1Y1 2 1Y2 3 1Y3 5 2Y1 6 2Y2 8 3Y1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) OE 1T/C 9 15 16 2 3 A 1Y1 1Y2 1Y3 12 5 2Y1 13 2T/C 3T/C 2 6 10 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2Y2 3Y1 CDC392 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Voltage range applied to any output in the high state or power-off state, VO . . . . . . . – 0.5 V to VCC + 0.5 V Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 50 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.77 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 300 mils. For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B. recommended operating conditions (see Note 3) MIN NOM MAX UNIT 4.75 5 5.25 V VCC VIH Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current VCC – 32 mA Low-level output current 32 mA ∆t / ∆v Input transition rise or fall rate fclock TA Input clock frequency High-level input voltage 2 V 0.8 Input voltage 0 Operating free-air temperature – 40 V V 5 ns / V 90 MHz 85 °C NOTE 3: Unused inputs must be held high or low to prevent them from floating. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 CDC392 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VIK VOH VCC = 4.75 V, VCC = 4.75 V, II = –18 mA IOH = – 32 mA VOL II VCC = 4.75 V, VCC = 5.25 V, IOL = 32 mA VI = VCC or GND IOZ VCC = 5.25 V, VO = VCC or GND ICC Ci 25 V VCC = 5 5.25 V, VI = VCC or GND IO = 0, 0 TYP† MAX UNIT –1.2 V 3.85 V 0.55 V ±1 µA ± 50 µA Outputs high 10 Outputs low 40 Outputs disabled mA 10 VI = 2.5 V or 0.5 V VO = VCC or GND Co † All typical values are at VCC = 5 V, TA = 25°C 3 pF 7 pF switching characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figures 1 and 2) FROM (INPUT) TO (OUTPUT) tPLH tPHL A Any Y tPLH tPHL T/C Any Y tPZH tPZL OE Any Y tPHZ tPLZ OE Any Y tsk(o) k( ) A PARAMETER POST OFFICE BOX 655303 TYP MAX 2 6.5 1.5 5 1.5 5 1.5 5 1.5 6 3 8 1.5 5 1.5 5 Any Y (same phase) 0.6 Any Y (any phase) 2.2 tr tf 4 MIN • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns 1.4 ns 0.83 ns CDC392 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open GND CL = 50 pF (see Note A) 500 Ω 3V Output Control (low-level enabling) LOAD CIRCUIT FOR OUTPUTS 1.5 V 3V Input 1.5 V 1.5 V 0V tPLH tPHL V 70% VCC OH 30% VCC VOL 70% VCC 30% VCC tr 50% VCC tf tPLZ ≈ VCC Output Waveform 1 S1 at 2 × VCC (see Note C) Output Waveform 2 S1 at Open (see Note C) 1.5 V 0V tPZL Output S1 Open 2 × VCC Open 50% VCC tPZH VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOL + 0.3 V VOL tPHZ 50% VCC VOH – 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 CDC392 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION A 1T/C 1Y1 tPLH1 tPHL1 tPLH5 tPHL5 tPLH2 tPHL2 tPLH6 tPHL6 tPLH3 tPHL3 tPHL7 tPLH7 tPLH4 tPHL4 tPHL8 tPLH8 1Y2 2T/C 2Y1 2Y2 NOTES: A. Output skew, tsk(o), from A to any Y (same phase), can be measured only between outputs for which the respective polarity-control inputs (T/C) are at the same logic level. It is calculated as the greater of: – The difference between the fastest and slowest of tPLH from A↑ to any Y (e.g., tPLHn, n = 1 to 4; or tPLHn, n = 5 to 6) – The difference between the fastest and slowest of tPHL from A↓ to any Y (e.g., tPHLn, n = 1 to 4; or tPHLn, n = 5 to 6) – The difference between the fastest and slowest of tPLH from A↓ to any Y (e.g., tPLHn, n = 7 to 8) – The difference between the fastest and slowest of tPHL from A↑ to any Y (e.g., tPHLn, n = 7 to 8) B. Output skew, tsk(o), from A to any Y (any phase), can be measured between outputs for which the respective polarity-control inputs (T/C) are at the same or different logic levels. It is calculated as the greater of: – The difference between the fastest and slowest of tPLH from A↑ to any Y or tPHL from A↑ to any Y (e.g., tPLHn, n = 1 to 4; or tPLHn, n = 5 to 6, and tPHLn, n = 7 to 8) – The difference between the fastest and slowest of tPHL from A↓ to any Y or tPLH from A↓ to any Y (e.g., tPHLn, n = 1 to 4; or tPHLn, n = 5 to 6, and tPLHn, n = 7 to 8) Figure 2. Waveforms for Calculation of tsk(o) 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty CDC392D OBSOLETE SOIC D 16 TBD Call TI Call TI CDC392DR OBSOLETE SOIC D 16 TBD Call TI Call TI Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. 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