TI TPS9125

TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
D
D
D
D
D
D
D
D
Integrated SIM Supply and Level Shifters
Selectable 5-V or 3-V SIM Supply Voltage
3-V to 5-V Level Shifters, Bidirectional for
SIM Data Line
10 kV ESD Protection (HBM) on SIMDATA,
SIMRST, and SIMCLK Terminal
14 Terminal TSSOP
Minimum Supply Voltage 2.7 V
Integrated PullUp Resistor for DATA and
SIMDATA
Thin Shrink, Small Outline, Left-Hand Tape
and Reel Package
PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
VDD
RESET
MODE
SIMPWR
DATA
CLK
RST
14
13
12
11
10
9
8
SIMVCC
VCAP1
VCAP2
SIMDATA
GND
SIMCLK
SIMRST
description
The TPS9125 SIM supply and level shifter integrates a programmable 3-V or 5-V SIM supply, conformable to
the (GSM) test specification 11.10, together with either a 3-V or 5-V level shifter, conformable to the GSM
specification 11.11 and 11.12.
A charge pump, utilizing two external capacitors, is configured as voltage doubler to generate a 5-V supply rail
from VDD. Dependent on the SIM card used, a control signal coming from the SIM card controller is applied on
the MODE terminal to switch between a 3-V or 5-V supply on the SIMVCC output terminal.
A 3-V/5-V bidirectional level shifter translates the 3-V compatible logic signal on DATA terminal into a 5-V
compatible logic signal SIMDATA terminal, and vice versa. RST and CLK are unidirectional level shifters,
providing a 5-V SIMRST and SIMCLK signal from the microcontroller to the SIM card.
The SIM supply is operating provided SIMPWR = 1 and VDD is sufficient (> 2.7 V). Under this condition, SIMVCC
voltage is generated by the SIM supply charge pump.
A RESET terminal is provided for security reasons to switch off the SIM supply and interface if the SIM card is
disconnected or removed by accident.
The TSP9125 is packaged in TI’s thin shrink small-outline package (PW).
AVAILABLE OPTIONS
TA
PACKAGE
(PW)
– 30°C to 85°C
TSP9125PWR†
† Suffix R stands for left-handed tape and reel.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI is a trademark of Texas Instruments Incorporated.
Copyright  1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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• DALLAS, TEXAS 75265
1
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
functional block diagram
VDD
20 kΩ
OSC
800 kHz
Voltage
VCAP1
Generator
VCAP2
VREF
(Charge Pump)
SIMVCC
VDD or
SIMVCC
SIMPWR
MODE
Control
10 kΩ
Block
RESET
Level
ESD
SIMDATA
CLK
ESD
SIMCLK
RST
ESD
SIMRST
DATA
Shifter
GND
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
CLK
6
DI
DATA
5
DI/O
3-V SIM clock signal. This terminal is connected to the SIM interface and works with 3-V logic level.
GND
10
MODE
3
DI
Programs the SIM supply voltage to SIMVCC = 5 V (MODE = 0) or SIMVCC = 3 V (MODE = 1).
RESET
2
DI
Reset for the TSP9125 SIM supply and interface in case the SIM is removed under operation.
RST
7
DI
3-V SIM reset signal. This terminal is connected to the SIM interface and works with 3-V logic level.
SIMCLK
9
DO
3-V/5-V SIM clock signal. This terminal is connected to the SIM reader contacts.
3-V bidirectional data line. This terminal is connected to the SIM interface and works with 3-V logic level.
Ground
SIMRST
8
DO
3-V/5-V SIM reset signal. This terminal is connected to the SIM reader contacts.
SIMDATA
11
DI/O
3-V/5-V bidirectional data line. This terminal is connected to the SIM reader contacts.
SIMVCC
14
SIM supply voltage. Can be switched between 5 V ± 10% and 3 V ± 10%. This terminal is connected to the SIM
reader contacts. Connect a 1 µF ± 20% capacitor between SIMVCC and GND.
SIMPWR
4
VCAP1
13
Charge pump capacitor. Connect 220 nF ± 20% capacitor between VCAP1 and VCAP2.
VCAP2
12
Charge pump capacitor. Connect 220 nF ± 20% capacitor between VCAP1 and VCAP2.
VDD
1
Supply voltage input. Connect a power bypass capacitor of 1 µF between VDD and GND. Connect capacitor
physically close to the VDD terminal.
2
DI
SIM supply enable terminal. SIMPWR = 0 leaves SIMVCC open, SIMPWR = 1 enables SIM supply.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
detailed description
voltage generator (charge pump)
The voltage generator can be programmed in two modes:
1. SIMPWR = 0: SIMVCC is left open, voltage generator disabled.
2. SIMPWR = 1: Depending on the signal on control terminal MODE, SIMVCC is either programmed to:
a. MODE = 0: 5 V ± 10% (this is the default condition under which the system powers up),
or
b. MODE = 1: SIMVCC is equal to the supply voltage VDD minus a voltage drop of 50 mV maximum.
The setting of the SIMVCC voltage (MODE = 0 or 1) can only be changed when SIMPWR is low. Therefore, as
specified in GSM11.12, supply voltage switching is performed by deactivating the SIM and activating it at the
new supply voltage.
In 5-V mode, a regulated charge pump is used to step-up the 3-V supply rail (min 2.7 V) to the 5-V supply rail.
The voltage generator uses two external capacitors, one pump capacitor connected between VCAP1 and
VCAP2 and one output buffer capacitor connected between SIMVCC and GND. It operates at a nominal
frequency of 800 kHz, and also supplies the integrated level shifters to allow for 5-V compatible logic signals
on SIMRST, SIMCLK, and SIMDATA.
In 3-V mode, the supply voltage VDD is connected via an integrated PMOS switch to the SIMVCC output. The
charge pump, oscillator, and voltage reference are disabled in the 3-V mode to reduce power consumption. The
supply voltage of the integrated level shifters is VDD minus a voltage drop of 50 mV maximum.
control block
The control block uses the three control signals SIMPWR, MODE, and RESET to set the TSP9125 operation
modes.
When SIMPWR is set low, the TSP9125 goes to power-down mode. To comply with the ISO/IEC 7816-3
specification for deactivation of the SIM contacts, the input terminals RST, DATA, and CLK must be low before
the SIMPWR terminal is allowed to be taken low. When SIMPWR is low, the SIMRST, SIMDATA, and SIMCLK
terminals are kept low and SIMVCC is left open.
The RESET input is used to disable the TSP9125 in case the SIM card is removed from the reader under
operation. The input is therefore typically connected to a mechanical or other device used to detect the removal
of the SIM card. When RESET is taken low, the SIMDATA, SIMCLK, and SIMRST terminals are taken low and
SIMVCC is left open, until RESET is taken high again.
Table 1. Control Block Function Table
RESET
MODE
SIMPWR
0
X
X
SIM supply disabled; SIMVCC open; SIMRST and SIMCLK and SIMDATA low
OPERATING MODE
1
0
0
TSP9125 in power-down mode. SIM supply disabled; SIMVCC open; SIMRST, SIMCLK, and SIMDATA low;
SIMVCC programmed to 5-V mode.
1
1
0
TSP9125 in power-down mode. SIM supply disabled; SIMVCC open; SIMRST, SIMCLK, and SIMDATA low;
SIMVCC programmed to 3-V mode.
1
X
1
TSP9125 in normal operation mode; SIM supply enabled, SIMVCC = 5 V or 3 V depending on how it was
programmed.
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
detailed description (continued)
level shifters
The level shifters on TSP9125, when operating in the 5-V mode, convert a 3-V compatible logic signal from a
digital control chip (SIM Controller) into a 5-V compatible logic signal for the SIM Card.
Operating in the 3-V mode, the level shifters are disabled and only pass the signal through.
The level shifters for reset and clock signal are unidirectional (RST to SIMRST, CLK to SIMCLK). The level
shifter for the data signal is bidirectional, enabling signal exchange in both directions (DATA to SIMDATA and
SIMDATA to DATA).
During power up and power down of the TSP9125, the voltage level on the SIMRST, SIMCLK, and SIMDATA
terminals is kept below 0.4 V for currents less than 1 mA flowing into the TSP9125, provided VDD is applied.
pullup resistors
The DATA and SIMDATA I/O pullup resistors are integrated in the device. The DATA resistor is 20 kΩ and the
SIMDATA resistor is 10 kΩ.
oscillator
An integrated RC oscillator provides the charge pump with a nominal clock frequency of 800 kHz.
voltage reference
An integrated bandgap reference provides a reference voltage of 1.192 V to the charge pump to control and
regulate the output voltage.
ESD protection
In a cellular telephone (GSM phone) the SIMRST, SIMCLK, and SIMDATA terminals are connected directly to
the contacts of the SIM reader. This means they are accessible from the outside and therefore require increased
ESD protection. The terminals withstand 10 kV ESD when tested according to human body model (HBM),
100 pF through 1500 Ω.
DISSIPATION RATING TABLE
4
PACKAGED
TA < 25°C
POWER RATING
OPERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
PW
556 mW
5.56 mW/°C
306 mW
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• DALLAS, TEXAS 75265
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
DISSIPATION DERATING CURVE
vs
FREE-AIR TEMPERATURE
6
5
Power Dissipation – mW
RthJA – 180°C/W
4
3
2
1
0
25
35
65
75
45
55
TA – Free-Air Temperature – °C
85
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage range, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3V to 4 V
Input voltage range, all other terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3V to VDD + 0.3V
Peak output current, SIMVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 60°C to 125°C
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1 W
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
Supply voltage, VDD
MIN
NOM
MAX
2.7
3
3.3
Charge pump capacitor between VCAP1 and VCAP2
220
Charge pump output capacitor on SIMVCC
0.1
V
nF
µF
1
Input capacitor on VDD
UNIT
µF
1
Operating free-air temperature range
– 30
85
°C
Operating virtual junction temperature range
– 30
125
°C
ESD susceptibility
kV
SIMRST, SIMCLK, SIMDATA (human body model, 100 pF through 1500 Ω)
All other terminals (human body model, 100 pF through 1500 Ω)
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
electrical characteristics over recommended operating junction temperature range, VDD = 3 V,
CVCAP1/2 = 220 nF ±20%; CSIMVCC = 1 µF ±20%; SIMPWR = 1 (unless otherwise noted)
voltage generator charge pump (SIMVCC)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output voltage at SIMVCC, 5-V mode
2.7 V < VDD < 3.3 V,
fSIMCLK = 0 MHz,
ISIMVCC = 10 mA,
MODE = 0 (default value)
Output voltage at SIMVCC, 3-V mode
2.7 V < VDD < 3.3 V,
MODE = 1
ISIMVCC = 6 mA,
Output current at SIMVCC, 5-V mode
(see Note 1)
2.7 V < VDD < 3.3 V
10
mA
Output current at SIMVCC, 3-V mode
(see Note 1)
2.7 V < VDD < 3.3 V
6
MA
1160
kHz
100
mV
1
ms
4.5
5.5
VDD– 50 mV
Switching frequency (internal oscillator
frequency)
VDD– 50 mV
440
Output ripple
5-V mode,
Startup time
Standby to 5-V mode
V
800
Iout = 10 mA
V
Power efficiency
ISIMVCC = 10 mA
82.5%
NOTE 1: The SIM supply circuit is designed according to the GSM specification 11.11 and 11.12 and complies to the requirements of GSM test
specification 11.10. For more information, please see application section.
level shifters (see Note 2)
PARAMETER
TEST CONDITIONS
Clock frequency CLK/SIMCLK
MIN
5
3-V mode
1
4
40%
50%
Output load, driver side
Data rate on DATA/SIMDATA
Residual voltage at SIMRST, SIMCLK, SIMDATA in powerdown mode
MAX
1
5-V mode and 3-V mode,
CLK input 50% duty cycle
Clock duty cycle on SIMCLK
TYP
5-V mode
SIMPWR = 0, I = 8 µA
UNIT
MHz
60%
70
100
Clk/372
Clk/32
– 0.4
0.4
pF
MHz
V
NOTE 2: The level shifters are designed according to the GSM specification 11.11 and 11.12.
logic inputs (CLK, MODE, RESET, RST, SIMPWR) (see Note 3)
PARAMETER
VIH
VIL
TEST CONDITIONS
High-level input voltage
MIN
TYP
MAX
0.7×VDD
V
Low-level input voltage
0.3×VDD
10
Input capacitance
Input current
– 20
Input leakage current
VIN = 0.5 V to 3 V
NOTE 3: For each state VIH, VIL, a positive current is defined as flowing out of the TSP9125.
UNIT
– 10
V
pF
1
–1
1
logic output SIMCLK in 3-V mode (according to GSM 11.12) (see Note 4)
PARAMETER
VOH
TEST CONDITIONS
Low-level output voltage
IOHmax = 20 µA
IOLmax = – 20 µA
Rise/fall time SIMCLK (see Note 5)
Cin = Cout = 100 pF
High-level output voltage
MIN
0.7×SIMVCC
0
TYP
MAX
UNIT
SIMVCC
0.2×SIMVCC
V
50
ns
V
NOTES: 4. For each state VOH, VOL, a positive current is defined as flowing out of the TSP9125.
5. To allow for overshoot the voltage on SIMCLK should remain between – 0.3 V and SIMVCC+0.3 V during dynamic operations.
6
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
electrical characteristics over recommended operating junction temperature range, VDD = 3 V,
CVCAP1/2 = 220 nF ±20%; CSIMVCC = 1 µF ±20%; SIMPWR = 1 (unless otherwise noted) (continued)
logic output SIMCLK in 5-V mode (according to GSM 11.11)
PARAMETER
VOH
VOL
High-level output voltage (see Note 4)
Low-level output voltage (see Note 4)
TEST CONDITIONS
IOHmax = 20 µA
IOLmax = – 200 µA
MIN
TYP
0.7×SIMVCC
0
MAX
UNIT
SIMVCC
0.5
V
V
tr/ tf
Rise/fall time SIMCLK (see Note 5 and 6) Cin = Cout = 100 pF, fSIMCLK = 5 MHz
18
ns
NOTES: 4. For each state VOH, VOL, a positive current is defined as flowing out of the TSP9125.
5. To allow for overshoot the voltage on SIMCLK should remain between – 0.3 V and SIMVCC+0.3 V during dynamic operations.
6. The maximum rise/fall time is 9% of the SIMCLK period.
logic output SIMRST in 3-V mode (according to GSM 11.12)
PARAMETER
VOH
VOL
High-level output voltage (see Note 4)
Low-level output voltage (see Note 4)
TEST CONDITIONS
IOHmax = 200 µA
IOLmax = – 200 µA
MIN
TYP
0.8×SIMVCC
0
MAX
UNIT
SIMVCC
0.2×SIMVCC
V
V
tr/ tf
Rise/fall time SIMRST (see Note 5)
Cin = Cout = 100 pF
400
µs
NOTES: 4. For each state VOH, VOL, a positive current is defined as flowing out of the TSP9125.
5. To allow for overshoot the voltage on SIMCLK should remain between – 0.3 V and SIMVCC+0.3 V during dynamic operations.
logic output SIMRST in 5-V mode (according to GSM 11.11)
PARAMETER
VOH
VOL
High-level output voltage (see Note 4)
Low-level output voltage (see Note 4)
TEST CONDITIONS
IOHmax = 200 µA
IOLmax = – 200 µA
MIN
TYP
SIMVCC–0.7V
0
MAX
UNIT
SIMVCC
0.6
V
V
tr/ tf
Rise/fall time SIMRST (see Note 5)
Cin = Cout = 100 pF
400
µs
NOTES: 4. For each state VOH, VOL, a positive current is defined as flowing out of the TSP9125.
5. To allow for overshoot the voltage on SIMCLK should remain between – 0.3 V and SIMVCC+0.3 V during dynamic operations.
logic input/output DATA
PARAMETER
TEST CONDITIONS
VIH
VIL
High-level input voltage on DATA (see Note 7)
VOH
VOL
High-level output voltage on DATA (see Note 7)
tr/ tf
Rise/fall time DATA (see Note 5)
MIN
Low-level input voltage on DATA (see Note 7)
Low-level output voltage on DATA (see Note 7)
TYP
MAX
0.7×VDD
IOHmax = 20 µA, VSIMDATA = 3 V
IOLmax = – 1 mA, VSIMDATA = 0 V
Cin = Cout = 100 pF,
Integrated pullup resistor = 20 kΩ
0.7×VDD
0
UNIT
V
0.2×VDD
VDD
V
0.4
V
1
µs
V
NOTES: 5. To allow for overshoot the voltage on SIMCLK should remain between – 0.3 V and SIMVCC+0.3 V during dynamic operations.
7. For each state VOH, VOL, VIH, VIL, a positive current is defined as flowing out of the TSP9125.
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
electrical characteristics over recommended operating junction temperature range, VDD = 3 V,
CVCAP1/2 = 220 nF ±20%; CSIMVCC = 1 µF ±20%; SIMPWR = 1 (unless otherwise noted) (continued)
logic input/output SIMDATA in 3-V mode (according to GSM 11.12)
PARAMETER
TEST CONDITIONS
MAX
UNIT
0.7×SIMVCC
SIMVCC+0.3V
V
– 0.3
0.2×SIMVCC
V
IOHmax = 20 µA, VDATA = 3 V
0.7×SIMVCC
SIMVCC
V
Low-level output voltage on SIMDATA
(see Note 7)
IOLmax = – 1 mA, VDATA = 0 V
0
0.4
V
Rise/fall time SIMRST (see Note 5)
Cin = Cout = 100 pF,
Integrated pullup resistor = 10 kΩ
1
µs
VIH
High-level input voltage on SIMDATA
(see Note 7)
IIHmax = ± 20 µA
VIL
Low-level input voltage on SIMDATA (see
Note 7)
IILmax = 1 mA
VOH
High-level output voltage on SIMDATA
(see Note 7)
VOL
tr/ tf
MIN
TYP
NOTES: 5. To allow for overshoot the voltage on SIMCLK should remain between – 0.3 V and SIMVCC+0.3 V during dynamic operations.
7. For each state VOH, VOL, VIH, VIL, a positive current is defined as flowing out of the TSP9125.
logic input/output SIMDATA in 5-V mode (according to GSM 11.12)
PARAMETER
TEST CONDITIONS
MAX
UNIT
0.7×SIMVCC
SIMVCC+0.3V
V
– 0.3
0.8
V
IOHmax = 20 µA, VDATA = 3 V
0.7×SIMVCC
SIMVCC
V
Low-level output voltage on SIMDATA
(see Note 7)
IOLmax = – 1 mA, VDATA = 0 V
0
0.4
V
Rise/fall time SIMRST (see Note 5)
Cin = Cout = 100 pF,
Integrated pullup resistor = 10 kΩ
1
µs
VIH
High-level input voltage on SIMDATA (see
Note 7)
IIHmax = ± 20 µA
VIL
Low-level input voltage on SIMDATA (see
Note 7)
IILmax = 1 mA
VOH
High-level output voltage on SIMDATA
(see Note 7)
VOL
tr/ tf
MIN
TYP
NOTES: 5. To allow for overshoot the voltage on SIMCLK should remain between – 0.3 V and SIMVCC+0.3 V during dynamic operations.
7. For each state VOH, VOL, VIH, VIL, a positive current is defined as flowing out of the TSP9125.
supply current
PARAMETER
Powerdown/programming mode
Ground current,
current operating
8
TEST CONDITIONS
MIN
TYP
SIMPWR = 0
5
SIMVCC = 5 V, ISIMVCC = 0 mA
SIMVCC = 5 V, ISIMVCC = 10 mA
SIMVCC = 3 V, ISIMVCC = 0 mA
200
SIMVCC = 3 V, ISIMVCC = 6 mA
40
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MAX
UNIT
µA
125
25
µA
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
PARAMETER MEASUREMENT INFORMATION
Colck Cycle
SIMVCC
50%
50%
Fall Time
GND
Figure 1. Clock Duty Cycle Measurment
Rise Time
Figure 2. Rise and Fall Time Measurment
TPS9215
ME
SIM
I = NEGATIVE
I = POSITIVE
I = POSITIVE
I = NEGATIVE
Figure 3. Current Direction Convention
VDD = 3 V
Input Bypass Capacitor
C3 = 1 µF
1
VDD
1
VCAP1
C1 = 220 nF
12
VCAP2
4
SIMPWR
SIMVCC
14
3
C2 =
1 µF
MODE
2
RO =
500 Ω
RESET
SIM Card
Inserted
5
11
DATA
SIMDATA
CLK
SIMCLK
RST
SIMRST
6
7
9
8
GND
10
Figure 4. Parameter Measurment Information
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
PARAMETER MEASUREMENT INFORMATION
VDD = 3 V
1
20 kΩ
VDD
µC I/O max.
CI = 30 pF
5
VDD
SIMVCC
Transfer
Gate
14
SIMVCC = 5 V
VCC
10 kΩ
11
SIMDATA
DATA
GND
10
Figure 5. Parameter Measurment Information SIMDATA
The rise and fall time on DATA and SIMDATA signals depend on the I/O parameters of the used hardware
(microcontroller and SIM card).
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
SIMVCC
10
Charge pump power loss
vs Output current on SIMVCC
6
Charge pump power efficiency
vs Output current on SIMVCC
7
Charge pump power efficiency
vs Supply voltage VDD
8
Charge pump performance
vs Supply voltage VDD
9
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
POWER LOSS
vs
CURRENT LOAD
POWER EFFICIENCY
vs
CURRENT LOAD
20
16
14
85
Power Efficiency – %
18
Power Loss – mW
90
T = 27°C
Nominal Models
Cpump = 220 nF
Csim = 1 µF
VDD = 3 V
12
10
Charge Pump
8
6
Theoretical Limit
Charge Pump
80
T = 27°C
Nominal Models
Cpump = 220 nF
Csim = 1 µF
VDD = 3 V
75
Theoretical Limit
4
2
0
0
1
2
3
4
5
6
Lload – mA
7
8
9
70
10
0
1
Figure 6
4
5
6
Lload – mA
7
8
9
10
5V OUTPUT STARTUP
vs
SUPPLY VOLTAGE
5.5
90
Theoretical Limit
SIMVCC = 1 µF
Cpump = 220 nF
Lload = 10 mA
5V Output Startup – V
85
Power Efficiency – %
3
Figure 7
POWER EFFIENCY
vs
SUPPLY VOLTAGE
Charge Pump
80
75
2
T = 27°C
Nominal Models
Cpump = 220 nF
Csim = 1 µF
IO = 10 mA
70
2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5
VDD Supply Voltage - V
TA = –40°C
5
TA = 27°C
4.5
TA = 100°C
4
2.5 2.6 2.7 2.8 2.9
3
3.1 3.2 3.3 3.4 3.5
VDD Supply Voltage - V
Figure 8
Figure 9
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11
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
THERMAL INFORMATION
Implementation of integrated circuits in low profile and fine-pitch surface-mount packages requires special
attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat
sinks and convection surfaces, as well as the presence of other heat-generating components, affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
D
D
D
Improving the power dissipation capability of the PWB design
Improving the thermal coupling of the component to the PWB
Introducing airflow in the system
Using the given RθJA for this IC, the maximum power dissipation can be calculated with the equation:
P
+
D(MAX)
T
* TA
J(MAX)
R
JA
Q
5 V MODE SIMVCC OUTPUT
vs
FREE-AIR TEMPERATURE
5 V Mode SIMVCC Output – V
5.040
5.035
5.030
5.025
5.050
–10
0
10 20 30 40 50 60 70
TA – Free-Air Temperature – °C
Figure 10
12
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80
90
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
charge pump terminal
The charge pump can be used to generate a negative voltage from a positive supply voltage, or to
voltage-double, triple, or otherwise multiply the supply voltage. In the TSP9125, a charge pump is used to
generate a 5-V supply rail from an input voltage of 3 V.
Figure 11 is used to explain the principle of a charge pump when configured as a voltage doubler.
S3
1
S1
VDD
SIMVCC
VCAP1
C2
C1
S2
GND
S4
VDD
GND
VCAP2
OSC
Figure 11. Principal of a Charge Pump Configured as a Voltage Doubler
During the first half of the oscillator period, switches S1 and S2 are closed, switches S3 and S4 are open, and
the pump capacitor C1 is charged. In the second half of the oscillator period, switches S3 and S4 are closed
and switches S1 and S2 are open. Immediatetly after closing the switches S3 and S4, the voltage at Node 1
is:
V1
+ VDD ) VC1 ≈ 2
V
DD
assuming C1 was charged up to VDD. In this half of the period, the pump capacitor C1 charges the output
capacitor C2. After the start-up time, the output capacitor C2 is charged up to V1 and the voltage at SIMVCC
is stable at this value, with only a small amount of ripple, which is normally around 1% of the supply voltage.
The ripple depends on the oscillator frequency, the load on SIMVCC, and the size of output capacitor C2.
In practice, the voltage V1 is a little bit less than 2 × VDD because of conduction losses across the switches and
switching losses in capacitor C1.
An unregulated charge pump generates an output voltage that is only dependent on the supply voltage and the
output current.
voltage generator
The charge pump used in the TSP9125 is regulated in such a way that the output voltage stays at 5 V ± 10%,
independently of the supply voltage and output current. A two-point regulator scheme was used to control the
output voltage. In addition, it reduces power consumption. The charge pump is active and enabled as long as
an oscillator frequency is applied. Figure 11 shows the functional block diagram of the voltage generator.
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13
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
C1
VCAP2
VCAP1
VDD
MODE
T1
OSC
Charge Pump
1
T2
SIMPWR
SIMVCC
VREF
1.192 V
Control
Logic
C2
GND
Mode
TPS9125
Figure 12. Functional Block Diagram of the Voltage Generator
When the TSP9125 is programmed in 5-V mode, the voltage at SIMVCC is monitored and regulated. If the
voltage of SIMVCC exceeds a defined upper threshold, the charge pump is switched off by disabling the
oscillator. In this state, all switching losses are zero, and the load is supplied only from the output capacitor C2.
The charge pump and oscillator are reactivated if the voltage at SIMVCC drops below a defined lower threshold.
In this state, the charge pump recharges output capacitor C2 until the voltage across C2 again exceeds the
defined upper threshold. Figure 12 shows the waveform of the charge pump output SIMVCC in 5-V mode.
Using this control mechanism, the switching losses of the charge pump and the losses of the oscillator are
minimized, because the charge pump and the oscillator are only activated when they are needed.
SIMVCC
Charge Pump
Enabled
Charge Pump
Disabled
Upper Threshold
Regulator
Hysteresis
max. 100 mV
Lower Threshold
Time
Figure 13. Typical Waveform at Charge Pump Output SIMVCC in 5-V Mode
14
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
VOLTAGE OUTPUT
vs
SIM CLOCK FREQUENCY
4.9
VDD = 3.3 V
4.8
4.7
Voltage Out – V
VDD = 2.8 V
4.6
4.5
VDD = 2.7 V
4.4
4.3
4.2
4.1
4
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
SIM Clock Frequency – MHz
Figure 14. Voltage At SIMVCC vs Frequency at SIMCLK Terminal in 5-V Mode
Figure 14 shows the output voltage on SIMVCC in 5-V mode versus the frequency of the clock signal on
CLK/SIMCLK dependent on the input voltage VDD. The load on the charge pump is the sum of the maximum
dc load on SIMVCC (10 mA) and the ac load of 100 pF on SIMCLK buffer.
In 3 V mode, the charge pump and oscillator are disabled all the time, thus reducing power dissipation to a
minimum. Switches T1 and T2 in Figure 14 directly connect the supply voltage on VDD to SIMVCC; the voltage
on SIMVCC is therefore equal to the supply voltage VDD minus the conduction losses across the switches.
dimensioning of the capacitors
output capacitor C2
The value of output capacitor C2 depends on the maximum charge pump load current, the allowed ripple on
SIMVCC, and the charge pump operating frequency.
In 5-V mode, the charge pump also supplies the drivers of the 5-V level shifters. The maximum load current the
charge pump has to provide is therefore the sum of the dc output current at SIMVCC and the ac supply current
for the level shifters; the SIMCLK driver is the major contributor to this ac load:
I
LOADmax
+ ISIMVCCmax ) IACmax + 10 mA ) 6 mA + 16 mA
The minimum, theoretical required value for C2 can be calculated using the equation below:
C2
I
LOADmax
+
min
V
ripple
ƒ
+V
I
LOADmax
2
ƒ
ripple
OSC
+ 100 mV 162mA 440 kHz + 185 nF
As described above, the regulated charge pump is disabled during the time in which the voltage across the
output capacitor C2 is above the lower threshold voltage, and therefore high enough to ensure the specified
minimum voltage on SIMVCC.
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15
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
output capacitor C2 (continued)
Increasing the value of the capacitor C2 will increase the time the charge pump is disabled. The power
consumption of the charge pump will be reduced, because the active time in which switching losses occur is
shorter. However, a larger value of C2 also results in a longer start-up time for the 5-V supply. Based on the
above considerations a 1 µF capacitor is recommended for C2.
pump capacitor C1
The value of pump capacitor C1 has a big impact on the start-up time of the charge pump: this is the time needed
to charge the output capacitor C2 from 0 V up to 5 V. The recommended value for capacitor C1 is 220 nF, thus
ensuring a start-up time of less than 1ms. If a lower value for capacitor C1 is chosen, the start-up time will
increase.
input capacitor
During the activation time of the charge pump there are steep current slopes of about 40 mA on the supply input
VDD. Therefore, it is recommended to use a low ESR 1 µF capacitor, such as a multilayer ceramic or tantalum
capacitor, on the VDD terminal.
capacitor selection
The exact capacitance value of the capacitors used is not as critical as the use of high quality and low ESR
(equivalent serial resistance) capacitors, such as multilayer ceramic or tantalum capacitors.
The ESR of C1 causes a voltage drop during charging and discharging, and this degrades the performance of
the charge pump. Low ESR is most critical for the choice of capacitor C1, because the charge current of this
capacitor is twice as much as the load current and the current through output capacitor C2. If a tantalum
capacitor is used for C1, the positive terminal should be connected to VCAP1.
The ESR of output capacitor C2 increases the ripple on SIMVCC. The ESR of C2 has only a minor influence,
because the ripple on SIMVCC in the TSP9125 is fixed at maximum 100 mV, due to the two-point regulation
scheme used. If a tantalum capacitor is used for C2, the positive terminal should be connected to SIMVCC.
pulsed output current
To comply with GSM test specification 11.10, paragraph 27.17.2.1.2, the SIMVCC supply voltage must stay
above the minimum allowed voltage level when spikes in the current consumption of the card occur. For a 5-V
SIM card interface, those spikes are up to a maximum charge of 40nAs. To test for this requirement, current
pulses of maximum 400 ns duration and maximum 200 mA amplitude are drawn from SIMVCC. For a 3-V SIM
card interface, those spikes are up to a maximum 12 mA charge. To test for this requirement, current pulses
of maximum 400ns duration and maximum 60-mA amplitude are drawn from SIMVCC.
In 5-V mode (MODE = 0), SIMVCC must stay above 4.5 V, in 3-V mode (MODE = 1), it must stay above 2.7 V.
Because the TSP9125 charge pump itself is too slow to counteract these peaks, the correct combination of
capacitors on SIMVCC must be chosen to cope with these requirements. In addition to the 1 µF ±20% low ESR
ceramic capacitor used to buffer the SIMVCC output, it is recommended to connect a 100 nF ceramic capacitor
as close as possible to the contacting elements.
16
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
enabling and disabling the TSP9125
The TSP9125 meets the deactivation requirements according to GSM 11.11 paragraph 4.3.2, and
ISO/IEC 7816-3 paragraph 5.4. These specifications define that the I/O line of the SIM card must be pulled low
before the supply voltage of the SIM card is deactivated. In 3-V and 5-V mode, the SIMDATA terminal of the
TSP9125 is pulled low before SIMVCC is disabled.
During normal operation mode (3-V or 5-V) the SIMPWR and RESET inputs must be high. If one of these
terminals is switched low, the supply of the SIM card is deactivated. In Figure 15 and Figure 16, the SIMPWR
terminal is pulled low. The I/O line of the SIM card (SIMDATA) is pulled low immediately although DATA is high,
whereas the supply voltage on SIMVCC decreases to approximately 2 V quickly and then needs about 100 ms
to reach 0 V. Thus, when the operating mode is changed from the 5-V tsupply to the 3-V supply, the voltage on
SIMVCC is decreased to a level below the supply voltage VDD to prevent reverse current flow.
In Figure 15 to Figure 17, the RESET terminal is pulled low externally. Also in this situation, SIMDATA goes low
immediately although the input signal at DATA is high.
SIMPWR
R1
SIMDATA
R3
5V
SIMVCC
0V
Figure 15. Powerdown Characteristic in 5-V mode vs Time: 50 µs/div
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17
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
SIMPWR
R1
SIMDATA
R3
5V
SIMVCC
0V
Figure 16. Power-Down Characteristic in 5-V Mode vs Time: 20 ms/div
RESET
R3
SIMDATA
R1
5V
SIMVCC
0V
Figure 17. Reset Characteristic in 5-V Mode vs Time: 50 ms/div
18
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TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
RESET
R3
SIMDATA
R2
5V
SIMVCC
0V
Figure 18. Reset Characteristic in 5-V Mode vs Time: 20 µs/div
5 V MODE SIMVCC OUTPUT
vs
LOAD CURRENT
OSCILLATOR FREQUENCY
vs
SIM CLOCK FREQUENCY
5.06
750
5 V Mode,
SIMVCC = 10 mA,
SIMCLK = 5 MHz,
SIMDATA = 156 kHz
730
5.05
Oscillator Frequrncy – kHz
5 V SIMVCC Output – V
740
5.04
5.03
720
710
700
690
680
670
660
5.02
0
2
4
6
8
10
12
650
0
Load Current – mA
1
2
3
4
5
SIM Clock Frequency – MHz
Figure 20
Figure 19
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19
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
5 V OUTPUT STARTUP
vs
TIME
5 V OUTPUT SHUTDOWN
vs
TIME
6
6
Load = 10 mA
5
5 V Output Shutdown – V
5 V Output Startup – V
5
4
3
2
1
4
3
2
1
0
0
0.2
0.4
0.6
0.8
1
0
1.2
0
2
t – Time – ms
Figure 21
Figure 22
3 V OUTPUT SHUTDOWN
vs
TIME
3.5
3.5
3
3
3 V Output Shutdown – V
3 V Output Startup – V
3 V OUTPUT STARTUP
vs
TIME
2.5
2
1.5
1
2.5
2
1.5
1
0.5
0.5
0
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0
1
3
3
t – Time – ms
t – Time – ms
Figure 23
20
6
4
t – Time – ms
Figure 24
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• DALLAS, TEXAS 75265
4
5
6
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
VOLTAGE OUTPUT
vs
SIM CLOCK FREQUENCY
VOLTAGE OUTPUT
vs
LOAD CURRENT
2.95
3.10
3 V Mode SIMVCC
3 V Mode SIMVCC
2.93
Voltage Output – V
Voltage Output – V
3.05
2.91
2.89
3
2.95
2.87
2.85
0
1
2
3
4
5
2.90
0
SIM Clock Frequency – MHz
2
4
6
Load Current – mA
Figure 25
Figure 26
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• DALLAS, TEXAS 75265
21
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
Input Bypass Capacitor
C3 = 1 µF
1
VDD
13
VCAP1
C1 = 220 nF
12
VCAP2
4
VCC
SIMPWR
SIMVCC
14
3
VCC
C2 = 1 µF
MODE
C4 = 100 nF
2
µC or
Dedicated
SIM Controller
RESET
SIM Card
Inserted
SIM Card
5
11
DATA
SIMDATA
CLK
SIMCLK
6
7
RST
SIMRST
I/O
9
8
GND
10
Figure 27. Typical Application
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CLK
RST
TPS9125
5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
SLVS244A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
MECHANICAL DATA
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°- 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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23
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