TH8082 Single LIN Bus Transceiver Features and Benefits Pin Diagram SOIC8NB Single wire LIN transceiver Compatible to LIN Protocol Specification, Rev. 1.1 Compatible to ISO9141 functions Control Output for voltage regulator Up to 20 kbps bus speed VCC Low RFI due to slew rate control TxD Fully integrated receiver filter Protection against load dump, jump start Bus terminals proof against short-circuits and transients in the automotive environment Very low (25 µA) typical power consumption in sleep mode Thermal overload and short circuit protection High impendance Bus pin in case of loss of ground and undervoltage condition ± 4kV ESD protection on bus pin 8 INH 7 VS 3 6 BUS 4 5 GND RxD 1 EN 2 TH8082 Ordering Information Part No. Temperature Range Package TH8082 JDC -40ºC...125ºC SOIC8, 150mil General Description The TH8082 is a physical layer device for a single wire Because of the very low current consumption of the data link capable of operating in applications where high TH8082 in the recessive state it’s particularly suitable for data rate is not required and a lower data rate can ECU applications with hard standby current require- achieve cost reductions in both the physical media com- ments. An advanced sleep mode capability allows ponents and in the microprocessor which use the net- a shutdown of the whole application . The included work. The TH8082 is designed in accordance to the wake-up function detects incoming dominant bus physical layer definition of the LIN Protocol Specification , Rev. 1.2 . The IC furthermore can be used in messages and enables the voltage regulator. ISO9141 systems. Data Sheet Rev 1.0 June 2001 Page 1 www.melexis.com TH8082 Single LIN Transceiver Functional Diagram TH8082 INH VS internal Supply & References VCC Biasing & Bandgap Thermal Protection POR SLEW RATE BUS Driver TxD BUS GND EN MODE CONTROL RxD Wake-up Filter Receive Comparator Input Filter Figure 1 - Block Diagram Data Sheet Rev 1.0 June 2001 Page 2 www.melexis.com TH8082 Single LIN Transceiver Functional Description After power on the chip automatically enters the VBAT stanby mode . In this intermediate mode the INH output will become HIGH (VS) and therefore the voltage regulator will provide the VCC - supply . The transceiver will remain the VBAT-stanby mode until the controller sets it to normal operation ( EN = High ) . Only in this mode bus communication is possible. The TH8082 switches itself in the VBAT-stanby mode if VCC is missing or below the threshold. The sleep mode ( EN = LOW) can only be reached from normal mode and permits a very low power consumtion because the transceiver and even the external voltage regulator get disabled. If the VCC has been switched off a wake-up request from the bus line will cause the TH8082 to enter the VBAT-stanby mode (VCC is present again) and sets the RxD output to low until the device enters the normal operation mode (active LOW interrupt at RxD). If the INH pin is not connected to the regulator or the inhibitable external regulator is not the one that provides the VCC – supply, the normal mode is directly accessilble by a logic high on the EN pin. In order to prevent an unintended wake-up caused by disturbances of the automotiv environment incoming dominant signals from the bus have to exceed the wake– up delay time. Mode Control of TH8082 EN VCC 0 0 0 Comment INH RxD VBAT-standby , power on Vs 0 1 VBAT-standby , VCC on , wake up condition after power on Vs Active LOW wake-up interrupt 1 1 Normal mode , VCC on Vs 1 = recessive bus 0 = dominant bus 1 0 VBAT-standby , VCC missing (VCC<VCCUV) Vs VCC 0 0 Sleep mode, switch to VBAT-standby in case of wake-up request floating Active LOW wake-up interrupt if VCC is present 0 1 Sleep mode, regulator not disabled, switch to VBAT-standby in case wake-up request, directly switch to normal mode with EN = 1 floating Active LOW wake-up interrupt Data Sheet Rev 1.0 June 2001 Page 3 www.melexis.com TH8082 Single LIN Transceiver Application Circuit Car Battery LIN BUS 1N4001 2.2uF VBAT Voltage regulator MASTER ECU 100nF VBAT +5V 100nF optional 10 100nF 100nF 100p VCC VS 33µH RxD µP TxD 82pF GND GND ECU connector to Single Wire LIN Bus BUS TH8080[1] [1] TH8080 - low cost transceiver without INH control 1N4001 2.2uF VBAT Voltage regulator SLAVE ECU 100nF VBAT INH +5V 100nF 100nF 100nF optional 10 VS INH VCC 100p µP RxD 33µH TxD BUS 82pF EN GND GND ECU connector to Single Wire LIN Bus TH8082 Figure 2 - Application Circuit Data Sheet Rev 1.0 June 2001 Page 4 www.melexis.com TH8082 Single LIN Transceiver Electrical Specification All voltages are referenced to ground (GND). Positive currents flow into the IC. The absolute maximum ratings given in the table below are limiting values that do not lead to a permanent damage of the device but exceeding any of these limits may do so. Long term exposure to limiting values may affect the reliability of the device. Reliable operation of the TH8082 is only specified within the limits shown in ”Operating conditions”. Operating Conditions Parameter Symbol Min Max Unit Battery voltage VS 6 18 V Supply voltage VCC 4.5 5.5 V Operating ambient temperature TA -40 +125 °C Junction temperature [1] TJc +150 °C Absolute Maximum Ratings Parameter Symbol Conditions Min. Max. Unit -0.3 +30 V -0.3 +7 V +40 V Batterry Supply Voltage VS Supply Voltage VCC Short-term supply voltage VS.ld Load dump; t<500ms Transient supply voltage VS.tr1 ISO 7637/1 pulse 1[1] Transient supply voltage VS.tr2 ISO 7637/1 pulses 2[1] Transient supply voltage VS.tr3 ISO 7637/1 pulses 3A, 3B -150 BUS voltage VBUS t < 500 ms, VS = 20 V -20 VS = 20 V -40 -150 t < 1 min Transient bus voltage VBUS.tr1 ISO 7637/1 pulse 1 [2] Transient bus voltage VBUS.tr2 ISO 7637/1 pulses 2 [2] Transient bus voltage VBUS.tr3 ISO 7637/1 pulses 3A, 3B [2] DC voltage on pins TxD, RxD ESD capability of pin BUS -150 V +100 V +150 V +40 V V +100 V -150 +150 V -0.3 +7 V ESDBUSHB Human body model, equivalent -4 +4 kV Human body model, equivalent -2 +2 kV -500 +500 mA VDC ESD capability of any other pins ESDHB Maximum latch – up free current at any Pin ILATCH Maximum power dissipation Ptot At Tamb = +125 °C 197 mW Thermal impedance ΘJA in free air 152 K/W Storage temperature Tstg -55 +150 °C Junction temperature Tvj -40 +150 °C ______________________________ Data Sheet Rev 1.0 June 2001 Page 5 www.melexis.com TH8082 Single LIN Transceiver Static Characteristics (VS = 6 to 18V, VCC= 4.5 to 5.5V, TA = -40 to +125°C, unless otherwise specified) All voltages are referenced to ground (GND), positive currents are flow into the IC. Parameter Symbol Conditions Min Typ Max Unit PIN VS,VCC Supply current, dominant ISd VS = 18V,VCC = 5.5V, TxD=L 50 µA Supply current, dominant ICCd VS = 18V,VCC = 5.5V, TxD=L 1 mA Supply current, recessive ISr VS = 18V,VCC = 5.5V TxD = H 8 20 µA Supply current, recessive ICCr VS = 18V,VCC = 5.5V TxD = H 20 30 µA VCC undervoltage lockout VCC_UV 4.3 V 50 µA 1.2 V Supply current, sleep mode ISs1 EN = H, TxD = L 2.75 VS = 18V,VCC = 0V TxD open 25 PIN BUS / TRANSMITTER Bus output voltage, dominant Vol_BUS TxD=L , IBUS = 40mA,VS > 7.3V Bus output voltage, recessive Voh_BUS TxD=open Bus short circuit current IBUS_SHORT 0.8* VS + 0.7 V TxD=L , VBUS > 1.2V, VS > 7.3V 40 200 mA Bus input current, recessive IBUS_leakp TxD open ,VBUS = Vs -20 20 µA Bus reverse polarity curr., rec. IBUS_leakn Loss of GND ,VS =12V, VBUS=0 -1 1 mA Bus pull up resistor RBUS_pu TxD open, VBUS=0 20 30 47 kΩ Bus input threshold, recessive to dominant VihBUS_rd TxD open , -8V<VBUS < VihBUS_rd 0.4x VS 0.45* VS Bus input threshold, dominant to recessive VihBUS_rd TxD open , VihBUS_rd <VBUS < 18V Bus input hysteresis VBUS_hys PIN BUS / RECEIVER 0.55* VS V 0.6*VS 20 V mV PIN TXD, EN High level input voltage Vih Rising edge Low level input voltage Vil Falling edge 0.7* VCC 0.3* VCC V V TxD pull up current, high level IIH_TXD VTxD = 4V -125 -50 -25 µA TxD pull up current, low level IIL_TXD VTxD = 1V -500 -250 -100 µA EN pull down current, high level IIH_EN VEN = 4V, VCC = 0V 50 125 250 µA EN pull down current, low level IIL_EN VEN = 1V, VCC = 0V 12 25 50 µA Data Sheet Rev 1.0 June 2001 Page 6 www.melexis.com TH8082 Single LIN Transceiver Static Characteristics (continued) Parameter Symbol Conditions Min Typ Max Unit 0.9 V PIN RXD Low level output voltage Vol_rxd IRxD = 1.25mA High level output voltage Voh_rxd IRxD = -250µA VCC -0.9 V High level output voltage Voh_INH IRxD = -180µA VS -0.8V VS -0.5V V Leakage current VINH_lk EN = L, VINH = 0V PIN INH -5 5 µA Thermal protection Thermal shutdown Tsd 150 180 °C Hysteresis Thys 5 25 °C Dynamic Characteristics All dynamic values of the table below refer to the test-schematic schown in Figure - Timing Diagram 6V ≤ VS ≤ 18V, -40°C ≤ TA ≤ 125°C, unless otherwise specified Parameter Symbol Conditions Min Typ Max Unit Slew rate falling edge tSRF 80% < VBUS < 20% , minimum & maximum bus load -3 -2 -1 V/µs Slew rate rising edge tSRR 20% < VBUS < 80% , minimum bus load [1] 1 2 3 V/µs Propagation delay transmitter ( TxD->BUS) ttrans_pdf TxD high to low transition[2] 4 µs Propagation delay transmitter ( TxD->BUS) ttrans_pdr TxD low to high transition[2] 4 µs Propagation delay transmitter symmetry ttrans_sym Calculate ttrans_pdf - ttrans_pdr 2 µs -2 Propagation delay receiver ( BUS->RxD) trec_pdf BUS recessive to dominant [2] 6 µs Propagation delay receiver ( BUS->RxD) trec_pdr BUS dominant to recessive[2] 6 µs Propagation delay receiver symmetry trec_sym Calculate ttrans_pdf - ttrans_pdr -2 2 µs Receiver debounce time trec_deb BUS rising & falling edge[3] 1.2 3.1 µs twu BUS rising & falling edge[4] 25 90 µs Normal to sleep mode] 10 40 µs Wake-up filter time EN debauncing time ten_deb 20 ______________________________ [1] Minimum slew rate of the rising edge is determined by the network time constant [2] See timing diagram figure 3 [3] See timing diagram figure 4 [4] See timing diagram figure 5 Data Sheet Rev 1.0 June 2001 Page 7 www.melexis.com TH8082 Single LIN Transceiver Timing Diagrams VTxD 50% t tTrans_pdf tTrans_pdr VBUS 60% 40% t tRec_pdf tRec_pdr VRxD 50% t Figure 3 - Input/Output Timing t < trec_deb t < trec_deb VBUS 60% 40% t VRxD 50% t Figure 4 - Receiver Debouncing Filter Data Sheet Rev 1.0 June 2001 Page 8 www.melexis.com TH8082 Single LIN Transceiver Timing Diagrams (continued) VBU S t VINH t> twu twu t VCC t VEN t VRx wake-up interrupt D t Figure 5 - Sleep mode and wake up procedure Data Sheet Rev 1.0 June 2001 Page 9 www.melexis.com TH8082 Single LIN Transceiver Test Circuit for Dynamic Characteristics 100n VS VCC BUS TxD 100n 900 TH8082 Cload[1] GND RxD 20p INH [1] [2] Cmin = 500pF / Cmax =10nF Rmin = 500 / Rmax =900 Figure 5 - Test Circuit for Dynamic Characteristics 100n VS VCC BUS TxD GND RxD 100n 900 1nF Oszi TH8082 Schaffnergenerator Pulse 3a,3b 12V Pulse 1,2,4 Figure 6 - Test Circuit for Automotive Transients Data Sheet Rev 1.0 June 2001 Page 10 www.melexis.com TH8082 Single LIN Transceiver Pin Description RxD 1 8 INH EN 2 7 VS TH8082 Pin Name VCC 3 6 BUS TxD 4 5 GND I/O Function 1 RXD O Receive data from BUS to core, LOW in dominant state 2 EN I Enables the normal operation mode when HIGH 3 VCC 4 TXD 5 GND 6 BUS 7 VS 8 INH Data Sheet Rev 1.0 June 2001 5V supply input I Transmit data from core to BUS, LOW in dominant state Ground I/O Single wire bus pin, LOW in dominant state Battery input voltage O Control output for voltage regulator Page 11 www.melexis.com TH8082 Single LIN Transceiver Mechanical Specifications SOIC8 Package Dimensions Small Outline Integrated Circiut (SOIC), SOIC 8, 150 mil All Dimension in mm, coplanarity < 0.1 mm D E H A A1 min 4.8 3.80 10.00 5.80 0.10 max 5.0 4.00 10.65 6.20 0.25 e 1.27 b L α 0.33 0.40 0° 0.51 1.27 8° 0.013 0.016 0° 0.020 0.050 8° All Dimension in inch, coplanarity < 0.004” min 0.189 0.150 0.228 0.053 0.004 max 0.197 0.157 0.244 0.069 0.010 Data Sheet Rev 1.0 June 2001 Page 12 0.050 www.melexis.com TH8082 Single LIN Transceiver Notes Data Sheet Rev 1.0 June 2001 Page 13 www.melexis.com TH8082 Single LIN Transceiver For the latest version of this document, go to our website at: www.melexis.com Or for additional information contact Melexis direct: Europe Phone: +32 13 67 04 95 E-mail: [email protected] All other locations Phone: +1 603 223 2362 E-mail: [email protected] Important Notice Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by Melexis for each application. The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis’ rendering of technical or other services. © 2000 Melexis GmbH. All rights reserved. Data Sheet Rev 1.0 June 2001 Page 14 www.melexis.com