TI SN74BCT540AN

SN54BCT540, SN74BCT540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994
•
•
•
•
SN54BCT540 . . . J OR W PACKAGE
SN74BCT540A . . . DW OR N PACKAGE
(TOP VIEW)
State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
3-State Outputs Drive Bus Lines or Buffer
Memory-Address Registers
P-N-P Inputs Reduce DC Loading
Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic (N) and Ceramic (J) 300-mil DIPs
OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
description
The SN54BCT540 and SN74BCT540A octal
buffers and line drivers are ideal for driving bus
lines or buffer memory-address registers. The
devices feature inputs and outputs on opposite
sides of the package that facilitate printed-circuitboard layout.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
A2
A1
OE1
VCC
SN54BCT540 . . . FK PACKAGE
(TOP VIEW)
A3
A4
A5
A6
A7
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all corresponding
outputs are in the high-impedance state.
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
Y1
Y2
Y3
Y4
Y5
A8
GND
Y8
Y7
Y6
The SN54BCT540 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The SN74BCT540A is characterized for
operation from 0°C to 70°C.
OE2
•
FUNCTION TABLE
INPUTS
OE1
OE2
A
OUTPUT
Y
L
L
L
H
L
L
H
L
H
X
X
Z
X
H
X
Z
Copyright  1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54BCT540, SN74BCT540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994
logic symbol†
logic diagram (positive logic)
OE1
&
1
EN
OE1
OE2
1
19
19
OE2
A1
A1
A2
A3
A4
A5
A6
A7
A8
2
18
1
3
17
4
16
5
15
6
14
7
13
8
12
9
11
2
18
Y1
Y1
Y2
Y3
To Seven Other Channels
Y4
Y5
Y6
Y7
Y8
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . – 0.5 V to 5.5 V
Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC
Current into any output in the low state: SN54BCT540 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74BCT540A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range, TA: SN54BCT540 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74BCT540A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
SN54BCT540
SN74BCT540A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
0.8
0.8
V
Input clamp current
–18
–18
mA
IOH
IOL
High-level output current
– 12
– 15
mA
64
mA
TA
Operating free-air temperature
70
°C
2
High-level input voltage
2
Low-level output current
2
48
– 55
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• DALLAS, TEXAS 75265
125
0
V
V
SN54BCT540, SN74BCT540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
SN54BCT540
TYP†
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V
MIN
II = –18 mA
IOH = – 3 mA
–1.2
2.4
3.3
2
3.2
IOH = – 12 mA
IOH = – 15 mA
VOL
VCC = 4
4.5
5V
IOL = 48 mA
IOL = 64 mA
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IOZH
VCC = 5.5 V,
VCC = 5.5 V,
IOZL
IOS‡
VCC = 5.5 V,
VCC = 5.5 V,
ICCH
ICCL
VCC = 5.5 V
VCC = 5.5 V
ICCZ
Ci
VCC = 5.5 V
VCC = 5 V,
SN74BCT540A
TYP†
MAX
MIN
–1.2
2.4
V
3.3
V
2
0.38
UNIT
3.1
0.55
0.42
0.55
V
0.1
0.1
20
20
µA
VI = 0.5 V
VO = 2.7 V
– 0.6
– 0.6
mA
50
50
µA
VO = 0.5 V
VO = 0
– 50
– 50
µA
– 100
– 225
– 225
mA
20
30
20
30
mA
45
71
45
71
mA
3
6
3
6
mA
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
– 100
mA
6
Co
VCC = 5 V,
10
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
5
pF
10
pF
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = 25°C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX§
′BCT540
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
SN54BCT540
UNIT
SN74BCT540A
MIN
TYP
MAX
MIN
MAX
MIN
MAX
2.5
4.1
5.8
1.9
7.2
2
6.9
0.6
1.9
3.5
0.3
4.5
0.3
4
4
6.8
8.9
4.1
10.4
3.3
10.1
5
8
10
5.3
11.8
4.3
11.3
3.5
5.7
7.8
2.7
9.4
2.7
9
3.8
5.5
7.4
3.5
8.9
3.5
8.5
ns
ns
ns
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
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3
SN54BCT540, SN74BCT540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994
PARAMETER MEASUREMENT INFORMATION
7 V (tPZL, tPLZ, O.C.)
S1
Open
(all others)
From Output
Under Test
Test
Point
CL
(see Note A)
R1
From Output
Under Test
R1
Test
Point
CL
(see Note A)
R2
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
RL = R1 = R2
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note B)
3V
Timing Input
(see Note B)
3V
1.5 V
1.5 V
0V
1.5 V
tw
0V
Data Input
(see Note B)
3V
th
tsu
Low-Level
Pulse
3V
1.5 V
1.5 V
0V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
3V
Input
(see Note B)
1.5 V
1.5 V
0V
tPLH
In-Phase
Output
(see Note D)
VOH
1.5 V
1.5 V
VOL
VOH
1.5 V
1.5 V
0V
tPLZ
1.5 V
Waveform 1
(see Notes C and D)
3.5 V
VOL
tPHZ
tPLH
1.5 V
1.5 V
tPZL
tPHL
tPHL
Out-of-Phase
Output
(see Note D)
Output
Control
(low-level enable)
0.3 V
tPZH
Waveform 2
(see Notes C and D)
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
VOH
1.5 V
0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.
Figure 1. Load Circuits and Voltage Waveforms
4
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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Copyright  1998, Texas Instruments Incorporated