TI SN74F2244DW

SN74F2244
25-Ω OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996
D
D
DW OR N PACKAGE
(TOP VIEW)
3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers
Package Options Include Plastic
Small-Outline (DW) Packages and
Standard Plastic (N) 300-mil DIPs
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
description
This octal buffer and line driver is designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
The 25-Ω resistors in the lower output circuit
reduce ringing and eliminate the need for external
resistors.
The SN74F2244 is characterized for operation
from 0°C to 70°C.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74F2244
25-Ω OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996
logic symbol†
1OE
1A1
1A2
1A3
1A4
1
logic diagram (positive logic)
1
1OE
EN
2
1
18
4
16
6
14
8
12
1Y1
1A1
2OE
2A1
2A2
2A3
2A4
11
18
4
16
6
14
8
12
1Y1
1Y2
1Y3
1A2
1Y2
1Y4
1A3
19
2
1Y3
EN
1
9
13
7
15
5
17
3
1A4
1Y4
2Y1
2Y2
2Y3
2OE
19
2Y4
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
2A1
2A2
2A3
2A4
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V
Input current range, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . – 0.5 V to 5.5 V
Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC
Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating free-air temperature range,TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded if the input current ratings are observed.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74F2244
25-Ω OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996
recommended operating conditions
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
IOH
IOL
TA
Operating free-air temperature
High-level input voltage
MIN
NOM
MAX
UNIT
4.5
5
5.5
V
2
V
0.8
V
Input clamp current
– 18
mA
High-level output current
– 15
mA
Low-level output current
12
mA
70
°C
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TEST CONDITIONS†
PARAMETER
VIK
MIN
TYP†
MAX
UNIT
– 1.2
V
VCC = 4.5 V,
VCC = 4.5 V,
II = – 18 mA
IOH = – 3 mA
2.4
2.8
VCC = 4.5 V
VCC = 4.75 V,
IOH = – 15 mA
IOH = – 3 mA
2
2.3
2.7
VOL
VCC = 4.5 V,
VCC = 4.5 V,
IOL = 1 mA
IOL = 12 mA
II
IOZH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.5 V
VO = 7 V
0.1
mA
50
µA
IOZL
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.7 V
VI = 2.7 V
– 50
µA
20
µA
VCC = 5
5.5
5V
V,
VI = 0
0.5
5V
VCC = 5.5 V,
VO = 0
Outputs high
VOH
IIL
Any OE input
Any A input
IOS‡
55V
VCC = 5.5
V,
Out
uts open
o en
Outputs
ICC
V
0.2
0.5
0.5
0.75
–1
– 1.6
– 100
Outputs low
– 225
40
60
60
90
Outputs disabled
60
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
V
mA
mA
mA
90
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
VCC = 5 V,
CL = 50 PF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = 25°C
VCC = 4.5 V TO 5.5 V,
CL = 50 PF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN TO MAX§
MIN
MAX
MIN
MAX
1.5
7
1.5
7
2.5
8
2
8
1.5
9
1
9.5
2.5
11.5
2.5
12
1.5
9
1
9.5
1.5
8.5
1.5
9.5
UNIT
ns
ns
ns
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN74F2244
25-Ω OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996
PARAMETER MEASUREMENT INFORMATION
7 V (tPZL, tPLZ, O.C.)
S1
Open
(all others)
From Output
Under Test
Test
Point
CL
(see Note A)
R1
From Output
Under Test
R1
Test
Point
CL
(see Note A)
R2
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
RL = R1 = R2
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note C)
3V
1.5 V
0V
tw
3V
Timing Input
(see Note C)
3V
1.5 V
Low-Level
Pulse
0V
th
tsu
Data Input
(see Note C)
1.5 V
1.5 V
0V
3V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
1.5 V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
Output
Control
(low-level enable)
3V
Input
(see Note C)
1.5 V
1.5 V
1.5 V
0V
tPZL
1.5 V
tPLZ
0V
tPLH
In-Phase
Output
(see Note E)
1.5 V
VOL
1.5 V
VOL
tPHZ
VOH
1.5 V
1.5 V
0.3 V
tPZH
tPLH
tPHL
Out-of-Phase
Output
(see Note E)
3.5 V
tPHL
VOH
Waveform 2
(see Notes B and E)
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
1.5 V
0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%.
D. When measuring propagation delay times of 3-state outputs, switch S1 is open.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
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Copyright  1998, Texas Instruments Incorporated