TI SN74F2245

SN74F2245
25-Ω OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MAY 1995
D
D
DB OR N PACKAGE
(TOP VIEW)
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
Package Options Include Plastic
Small-Outline (DB) Packages and Plastic
300-mil DIPs (N)
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
description
The SN74F2245 is designed for asynchronous
communication between data buses. The devices
transmit data from the A bus to the B bus or from
the B bus to the A bus depending upon the logic
level at the direction-control (DIR) input. The
output-enable (OE) input disables the device so
the buses are effectively isolated.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
Both A and B outputs can sink up to 12 mA; 25-Ω resistors are included in the lower output circuit to reduce
overshoot and undershoot.
The SN74F2245 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic symbol†
OE
DIR
A1
19
1
2
OPERATION
OE
logic diagram (positive logic)
DIR
G3
1
3EN1[BA]
3EN2[AB]
19
18
1
B1
A1
OE
2
2
A2
A3
A4
A5
A6
A7
A8
3
17
4
16
5
15
6
14
7
13
8
12
9
11
B2
18
B3
B1
B4
B5
B6
B7
To Seven Other Channels
B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74F2245
25-Ω OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MAY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . – 0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
IOH
IOL
TA
Operating free-air temperature
High-level input voltage
MIN
NOM
MAX
4.5
5
5.5
2
UNIT
V
V
0.8
V
– 18
mA
High-level output current
–3
mA
Low-level output current
12
mA
70
°C
Input clamp current
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 4.5 V,
Any output
VCC = 4
4.5
5V
VCC = 4.75 V,
VOL
II
IIH§
IIL§
IOS¶
ICC
Any output
A and B
DIR and OE
A and B
DIR and OE
A and B
DIR and OE
A and B
II = – 18 mA
IOH = – 1 mA
IOH = – 3 mA
IOH = – 1 mA to – 3 mA
VCC = 4
4.5
5V
IOL = 1 mA
IOL = 12 mA
VCC = 5
5.5
5V
VI = 5.5 V
VI = 7 V
VCC = 5
5.5
5V
V,
VI = 2
2.7
7V
VCC = 5
5.5
5V
V,
VI = 0
0.5
5V
VCC = 5.5 V,
VO = 0
Outputs high
VCC = 5.5 V
MIN
TYP‡
2.5
3.4
2.4
3.3
POST OFFICE BOX 655303
UNIT
– 1.2
V
V
2.7
0.2
0.5
0.5
0.75
1
0.1
70
20
– 0.5
– 0.5
– 50
– 120
62
90
Outputs low
73
105
Outputs disabled
72
100
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ For I/O ports, the parameters IIH and IIL include the off-state output current.
¶ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
2
MAX
• DALLAS, TEXAS 75265
V
mA
µA
mA
mA
mA
SN74F2245
25-Ω OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MAY 1995
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
OE
A or B
tPHZ
tPLZ
OE
A or B
VCC = 5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = 25°C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†
MIN
TYP
MAX
MIN
MAX
2.5
3.9
5.5
2.1
6.6
3.1
4.6
6.6
2.9
7.1
2.4
4.8
7.3
1.6
8.5
3.6
6.6
10.6
3
12
2.3
4.3
6.3
2
7.5
2
4
5.8
1.9
6.8
UNIT
ns
ns
ns
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN74F2245
25-Ω OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MAY 1995
PARAMETER MEASUREMENT INFORMATION
7 V (tPZL, tPLZ)
S1
Open
(all others)
From Output
Under Test
Test
Point
CL
(see Note A)
R1
From Output
Under Test
R1
Test
Point
CL
(see Note A)
R2
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
RL = R1 = R2
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note C)
3V
1.5 V
0V
tw
3V
Timing Input
(see Note C)
3V
1.5 V
Low-Level
Pulse
0V
1.5 V
1.5 V
0V
th
tsu
Data Input
(see Note C)
1.5 V
3V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
Output
Control
(low-level enable)
3V
Input
(see Note C)
1.5 V
1.5 V
1.5 V
0V
tPZL
1.5 V
tPLZ
0V
tPLH
In-Phase
Output
(see Note E)
tPHL
VOH
1.5 V
VOL
1.5 V
tPHZ
1.5 V
1.5 V
0.3 V
tPZH
tPLH
VOH
3.5 V
1.5 V
VOL
tPHL
Out-of-Phase
Output
(see Note E)
Waveform 1
(see Notes B and E)
VOH
Waveform 2
(see Notes B and E)
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
1.5 V
0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%.
D. When measuring propagation delay times of 3-state outputs, switch S1 is open.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
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