TI PAL16R4AMJ

PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
•
•
•
PAL16L8’
J OR W PACKAGE
Choice of Operating Speeds
High-Speed, A Devices . . . 25 MHz Min
Half-Power, A-2 Devices . . . 16 MHz Min
(TOP VIEW)
Choice of Input/Output Configuration
I
I
I
I
I
I
I
I
I
GND
Package Options Include Both Ceramic DIP
and Chip Carrier in Addition to Ceramic
Flat Package
DEVICE
I
INPUTS
3-STATE
O OUTPUTS
REGISTERED
Q OUTPUTS
I/O
PORT
S
PAL16L8
10
2
0
6
PAL16R4
8
0
4 (3-state buffers)
4
PAL16R6
8
0
6 (3-state buffers)
2
PAL16R8
8
0
8 (3-state buffers)
0
description
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
PAL16L8’
FK PACKAGE
These programmable array logic devices feature
high speed and a choice of either standard or
half-power devices. They combine Advanced
Low-Power Schottky technology with proven
titanium-tungsten fuses. These devices will
provide reliable, high-performance substitutes for
conventional
TTL
logic.
Their
easy
programmability allow for quick design of ”custom”
functions and typically results in a more compact
circuit board. In addition, chip carriers are
available for further reduction in board space.
I
I
I
VCC
O
(TOP VIEW)
I
I
I
I
I
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
I/O
I/O
I/O
I/O
I/O
I
GND
I
O
I/O
The Half-Power versions offer a choice of
operating frequency, switching speeds, and
power dissipation. In many cases, these
Half-Power devices can result in significant power
reduction from an overall system level.
4
The PAL16’ M series is characterized for
operation over the full military temperature range
of –55°C to 125°C.
PAL is a registered trademark of Advanced Micro Devices Inc.
Copyright  1992, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
PAL16R4AM, PAL16R4A-2M, PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
PAL16R4’
J OR W PACKAGE
PAL16R4’
FK PACKAGE
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
I/O
I/O
Q
Q
Q
Q
I/O
I/O
OE
I
I
I
I
I
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
PAL16R6’
J OR W PACKAGE
PAL16R6’
FK PACKAGE
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
I/O
Q
Q
Q
Q
Q
Q
I/O
OE
I
I
I
I
I
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
I
GND
1
(TOP VIEW)
I
I
CLK
VCC
I/O
(TOP VIEW)
CLK
I
I
I
I
I
I
I
I
GND
PAL16R8’
J OR W PACKAGE
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
I
I
CLK
VCC
Q
20
2
(TOP VIEW)
VCC
Q
Q
Q
Q
Q
Q
Q
Q
OE
POST OFFICE BOX 655303
I
I
I
I
I
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
I
GND
1
Q
Q
Q
Q
Q
PAL16R8’
FK PACKAGE
(TOP VIEW)
CLK
I
I
I
I
I
I
I
I
GND
I/O
Q
Q
Q
Q
OE
I/O
I/O
19
OE
I/O
Q
20
2
• DALLAS, TEXAS 75265
OE
Q
Q
1
I
GND
CLK
I
I
I
I
I
I
I
I
GND
(TOP VIEW)
I
I
CLK
VCC
I/O
(TOP VIEW)
Q
Q
Q
Q
Q
PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
functional block diagrams (positive logic)
PAL16L8AM
PAL16L8A-2M
&
32 X 64
16 x
I
10
16
6
16
EN ≥ 1
7
O
7
O
7
I/O
7
I/O
7
I/O
7
I/O
7
I/O
7
I/O
6
PAL16R4AM
PAL16R4A-2M
OE
CLK
EN 2
C1
&
32 X 64
16 x
I
8
≥1
8
I=0 2
Q
1D
8
Q
8
Q
8
Q
16
4
4
16
EN ≥ 1
7
I/O
7
I/O
7
I/O
7
I/O
4
4
denotes fused inputs
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
functional block diagrams (positive logic)
PAL16R6AM
PAL16R6A-2M
OE
CLK
EN 2
C1
&
32 X 64
16 x
I
8
≥1
8
I=0 2
Q
1D
8
Q
8
Q
8
Q
8
Q
8
Q
16
6
2
16
EN ≥ 1
7
I/O
I/O
7
2
6
PAL16R8AM
PAL16R8A-2M
OE
CLK
EN 2
C1
&
32 X 64
16 x
I
8
8
≥1
I=0 2
8
Q
8
Q
8
Q
8
Q
8
Q
8
Q
8
Q
16
8
16
8
denotes fused inputs
4
Q
1D
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PAL16L8AM, PAL16L8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
logic diagram (positive logic)
I
1
Increment
First
Fuse
Numbers
I
I
I
I
I
I
I
I
2
3
4
5
6
7
8
9
0
4
8
12
16
20
24
28
0
32
64
96
128
160
192
224
31
19
256
288
320
352
384
416
448
480
18
512
544
576
608
640
672
704
736
17
768
800
832
864
896
928
960
992
16
1024
1056
1088
1120
1152
1184
1216
1248
15
1280
1312
1344
1376
1408
1440
1472
1504
14
1536
1568
1600
1632
1664
1696
1728
1760
13
1792
1824
1856
1888
1920
1952
1984
2016
12
11
O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
Fuse number = First fuse number + Increment
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
PAL16R4AM, PAL16R4A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
logic diagram (positive logic)
CLK
1
Increment
First
Fuse
Numbers
I
I
I
I
I
I
I
I
2
3
4
5
6
7
8
9
0
4
8
12
16
20
24
31
19
256
288
320
352
384
416
448
480
18
512
544
576
608
640
672
704
736
I=0
1D
768
800
832
864
896
928
960
992
I=0
1D
1024
1056
1088
1120
1152
1184
1216
1248
I=0
1D
1280
1312
1344
1376
1408
1440
1472
1504
I=0
1D
17
I/O
I/O
Q
C1
16
Q
C1
15
Q
C1
14
Q
C1
1536
1568
1600
1632
1664
1696
1728
1760
13
1792
1824
1856
1888
1920
1952
1984
2016
12
11
Fuse number = First fuse number + Increment
6
28
0
32
64
96
128
160
192
224
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
I/O
I/O
OE
PAL16R6AM, PAL16R6A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
logic diagram (positive logic)
CLK
1
Increment
First
Fuse
Numbers
I
I
I
I
I
I
I
I
2
3
4
5
6
7
8
9
0
4
8
12
16
20
24
28
31
0
32
64
96
128
160
192
224
19
256
288
320
352
384
416
448
480
I=0
1D
512
544
576
608
640
672
704
736
I=0
1D
768
800
832
864
896
928
960
992
I=0
1D
1024
1056
1088
1120
1152
1184
1216
1248
I=0
1D
1280
1312
1344
1376
1408
1440
1472
1504
I=0
1D
1536
1568
1600
1632
1664
1696
1728
1760
I=0
1D
18
I/O
Q
C1
17
Q
C1
16
Q
C1
15
Q
C1
14
Q
C1
13
Q
C1
1792
1824
1856
1888
1920
1952
1984
2016
12
11
I/O
OE
Fuse number = First fuse number + Increment
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
logic diagram (positive logic)
CLK
1
Increment
First
Fuse
Numbers
I
I
I
I
I
I
I
I
2
3
4
5
6
7
8
9
0
4
8
12
16
20
24
31
I=0
1D
256
288
320
352
384
416
448
480
I=0
1D
512
544
576
608
640
672
704
736
I=0
1D
768
800
832
864
896
928
960
992
I=0
1D
1024
1056
1088
1120
1152
1184
1216
1248
I=0
1D
1280
1312
1344
1376
1408
1440
1472
1504
I=0
1D
1536
1568
1600
1632
1664
1696
1728
1760
I=0
1D
1792
1824
1856
1888
1920
1952
1984
2016
I=0
1D
19
Q
C1
18
Q
C1
17
Q
C1
16
Q
C1
15
Q
C1
14
Q
C1
13
Q
C1
12
Q
C1
11
Fuse number = First fuse number + Increment
8
28
0
32
64
96
128
160
192
224
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
OE
PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
programming information
Texas Instruments programmable logic devices can be programmed using widely available software and
inexpensive device programmers.
Complete programming specifications, algorithms, and the latest information on hardware, software, and
firmware are available upon request. Information on programmers capable of programming Texas Instruments
programmable logic is also available, upon request, from the nearest TI field sales office, local authorized TI
distributor, or by calling Texas Instruments at (214) 997-5666.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Voltage applied to disabled output (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
NOTE 1: These ratings apply except for programming pins during a programming cycle.
recommended operating conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
V
5.5
V
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
V
High-level output current
–2
mA
IOL
TA
Low-level output current
12
mA
125
°C
High-level input voltage
2
Operating free-air temperature
–55
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
9
PAL16L8AM, PAL16R4AM, PAL16R6AM, PAL16R8AM
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V,
II = – 18 mA
IOH = – 2 mA
VOL
VCC = 4.5 V,
IOL = 12 mA
VCC = 5.5 V,
VO = 2.7 V
VCC = 5.5 V,
VO = 0.4 V
VCC = 5.5 V,
VI = 5.5 V
VCC = 5.5 V,
VI = 2.7 V
VCC = 5.5 V,
VI = 0.4 V
VCC = 5.5 V,
VCC = 5.5 V,
VO = 0.5 V
VI = 0,
Outputs
IOZH
I/O ports
Outputs
IOZL
I/O ports
II
I/O Ports
IIH
All others
MIN
TYP†
2.4
3.2
0.25
– 1.5
V
V
0.4
20
–20
–100
0.2
100
25
–0.2
All others
IOS‡
ICC
UNIT
100
OE input
IIL
MAX
–0.1
– 30
V
µA
µA
mA
µA
mA
–250
mA
180
mA
MIN
MAX
UNIT
0
25
MHz
Outputs open
75
timing requirements
fclock
Clock Frequency
tw
Pulse duration (see Note 2)
tsu
th
Setup time, input or feedback before CLK↑
Clock high
15
Clock low
20
Hold time, input or feedback after CLK↑
ns
25
ns
0
ns
NOTE 2: The total clock period of clock high and clock low must not exceed clock frequency, fclock. The minimum pulse durations specified are
only for clock high or low, but not for both simultaneously.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
FROM
(INPUT)
TO
(OUTPUT)
I, I/O
O, I/O
tpd
ten
CLK↑
Q
OE↓
tdis
ten
OE↑
I, I/O
tdis
I, I/O
PARAMETER
fmax
tpd
TEST CONDITION
MIN
TYP†
25
45
MAX
UNIT
MHz
15
30
ns
R1 = 390 Ω,
10
20
ns
Q
R2 = 750 Ω,
15
25
ns
Q
See Figure 1
10
25
ns
O, I/O
14
30
ns
O, I/O
13
30
ns
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second. Set VO at 0.5 V to avoid
test equipment degradation.
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PAL16L8A-2M, PAL16R4A-2M, PAL16R6A-2M, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V,
II = – 18 mA
IOH = – 2 mA
VOL
VCC = 4.5 V,
IOL = 12 mA
VCC = 5.5 V,
VO = 2.7 V
VCC = 5.5 V,
VO = 0.4 V
VCC = 5.5 V,
VI = 5.5 V
VCC = 5.5 V,
VI = 2.7 V
VCC = 5.5 V,
VI = 0.4 V
VCC = 5.5 V,
VCC = 5.5 V,
VO = 0.5 V
VI = 0,
Outputs
IOZH
I/O ports
Outputs
IOZL
I/O ports
II
I/O Ports
IIH
All others
MIN
TYP†
2.4
3.2
0.25
– 1.5
V
V
0.4
20
–20
–100
0.2
100
25
–0.2
All others
IOS‡
ICC
UNIT
100
OE input
IIL
MAX
–0.1
– 30
V
µA
µA
mA
µA
mA
–250
mA
90
mA
MIN
MAX
UNIT
0
16
MHz
Outputs open
75
timing requirements
fclock
Clock Frequency
tw
Pulse duration (see Note 2)
tsu
th
Setup time, input or feedback before CLK↑
Clock high
25
Clock low
25
Hold time, input or feedback after CLK↑
ns
35
ns
0
ns
NOTE 2: The total clock period of clock high and clock low must not exceed clock frequency, fclock. The minimum pulse durations specified are
only for clock high or low, but not for both simultaneously.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
FROM
(INPUT)
TO
(OUTPUT)
I, I/O
O, I/O
tpd
ten
CLK↑
Q
OE↓
tdis
ten
OE↑
I, I/O
tdis
I, I/O
PARAMETER
fmax
tpd
TEST CONDITION
MIN
TYP†
16
25
MAX
UNIT
MHz
25
40
ns
R1 = 390 Ω,
11
25
ns
Q
R2 = 750 Ω,
20
25
ns
Q
See Figure 1
11
25
ns
O, I/O
25
40
ns
O, I/O
25
35
ns
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second. Set VO at 0.5 V to avoid
test equipment degradation.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
PARAMETER MEASUREMENT INFORMATION
5V
S1
R1
From Output
Under Test
Test
Point
CL
(see Note A)
R2
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3V
Timing
Input
1.5 V
3V
High-Level
Pulse
1.5 V
1.5 V
0
0
tw
th
tsu
3V
Data
Input
1.5 V
1.5 V
0
3V
Low-Level
Pulse
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V
1.5 V
0
VOLTAGE WAVEFORMS
PULSE DURATIONS
3V
3V
1.5 V
Input
1.5 V
0
tpd
tpd
In-Phase
Output
1.5 V
VOH
1.5 V
VOL
tpd
tpd
Out-of-Phase
Output
(see Note D)
1.5 V
VOH
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Output
Control
(low-level
enabling)
1.5 V
1.5 V
0
ten
tdis
≈ 3.3 V
1.5 V
Waveform 1
S1 Closed
(see Note B)
VOL + 0.5 V
VOL
tdis
ten
Waveform 2
S1 Open
(see Note B)
VOH
1.5 V
VOH – 0.5 V
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2
is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses have the following characteristics: PRR ≤ 10 MHz, tr and tf ≤ 2 ns, duty cycle = 50%
D. When measuring propagation delay times of 3- state outputs, switch S1 is closed.
E. Equivalent loads may be used for testing.
Figure 1. Load Circuit and Voltage Waveforms
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SRPS016
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
81036072A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103607RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103607SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
81036082A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103608RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103608SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
81036092A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103609RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103609SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
81036102A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103610RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103610SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
81036112A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103611RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103611SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
81036122A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103612RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103612SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
81036132A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103613RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103613SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
81036142A
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
8103614RA
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
8103614SA
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8A-2MFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8A-2MJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8A-2MJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8A-2MWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8AMFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8AMJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8AMJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16L8AMWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4A-2MFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4A-2MJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4A-2MJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4A-2MWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4AMFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4AMJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4AMJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R4AMWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16R6A-2MFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16R6A-2MJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
PAL16R6A-2MJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R6A-2MWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16R6AMFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16R6AMJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R6AMJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R6AMWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8A-2MFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8A-2MJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8A-2MJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8A-2MWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8AMFKB
ACTIVE
LCCC
FK
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8AMJ
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8AMJB
ACTIVE
CDIP
J
20
1
None
Call TI
Level-NC-NC-NC
PAL16R8AMWB
ACTIVE
CFP
W
20
1
None
Call TI
Level-NC-NC-NC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright  2005, Texas Instruments Incorporated