06.DataBook_1000A Dsht Page 1 Friday, September 27, 1996 10:44 AM ® ISD1000A Series Single-Chip Voice Record/Playback Devices 16- and 20-Second Durations FEATURES • Easy-to-use single-chip voice Record/Playback solution • Fully addressable to handle multiple messages • High-quality, natural voice/audio reproduction • 100-year message retention (typical) • 100,000 record cycles (typical) • Manual switch or microcontroller compatible – Playback can be edge- or levelactivated • On-chip clock source • No algorithm development required • Single +5 volt supply • Available in die form, DIP, and SOIC packaging • Industrial temperature (-40°C to +85°C) version available • Single-chip durations of 16 and 20 seconds • Directly cascadable for longer durations • Power-down mode – 1 µA standby current (typical) • Zero-power message storage – Eliminates battery backup circuits 1 ISD1000A SERIES SUMMARY Typical Filter Pass Band (KHz) Duration (Seconds) Input Sample Rate (KHz) ISD1016A 16 8 3.4 ISD1020A 20 6.4 2.7 Part Number Information Storage Devices, Inc. 1–1 06.DataBook_1000A Dsht Page 2 Friday, September 27, 1996 10:44 AM ISD1000A Series GENERAL DESCRIPTION DETAILED DESCRIPTION Information Storage Devices’ ISD1000A ChipCorder® Series provides high-quality, single-chip record/playback solutions for 16- and 20-second messaging applications. The CMOS devices include an on-chip oscillator, microphone preamplifier, automatic gain control, antialiasing filter, smoothing filter, and speaker amplifier. In addition, the ISD1000A Series is fully microprocessorcompatible, allowing complex messaging and addressing to be achieved. The ISD1000A ChipCorder Series devices are designed to Record and Play back audio and voice information in a single chip with a minimum of circuit complexity. This compact, easy-to-use, nonvolatile, low-power solution has been made possible by ISD's multilevel storage technology — a breakthrough in storage technology in EEPROM. ISD’s multilevel storage technology results in storage density that is eight times greater than digital memory. The ISD1000A nonvolatile analog array consists of 128K cells — the equivalent of 1 Mbits of digital storage. Recordings are stored in on-chip nonvolatile memory cells, providing zero-power message storage. This unique, single-chip solution is made possible through ISD's patented multilevel storage technology. Voice and audio signals are stored directly into memory in their natural form, providing high-quality, solid-state voice reproduction. The ISD1000A Series eliminates the need for digital conversion, digital compression, and voice synthesis techniques which often compromise voice quality and are more complicated to use. The ISD1000A Series includes signal conditioning circuits and control functions which enable a complete, high-quality Recording and Playback system in a single device. The ISD1000A is available in two versions, which store voice in 16- or 20-second arrays. Additional devices may be cascaded ISD1000A SERIES BLOCK DIAGRAM Internal Clock Timing XCLK Sampling Clock R Amp ANA IN 5-Pole Active Antialiasing Filter ANA OUT MIC MIC REF AGC 1–2 Analog Transceivers Decoders -1 Product Data Sheets PreAmp 128 K Cell Nonvolatile Multilevel Storage Array 5-Pole Active Smoothing Filter SP+ Mux SP– Automatic Gain Control (AGC) Power Conditioning Address Buffers VCCA VSSA VSSD VCCD A0 A1 A2 A3 A4 A5 A6 A7 Amp Device Control PD P/R CE EOM AUX IN 06.DataBook_1000A Dsht Page 3 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets ISD1000A SERIES PINOUTS M0/A0 M1/A1 M2/A2 M3/A3 M4/A4 M5/A5 NC NC A6 A7 AUX IN VSSD VSSA SP+ 1 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 15 14 assures the lowest possible overall power consumption. VCCD P/R XCLK EOM PD CE NC ANA OUT ANA IN AGC MIC REF MIC VCCA SP– DIP/SOIC On-chip control functions make the ISD1000A Series very easy to use in a wide array of applications. Each device offers a variety of operating modes and interface options. The devices may be used in applications that require little more than a few switches and a battery. The devices may also be integrated into electronic systems where digital addresses can be provided for more sophisticated message addressing and control. The ISD1000A array is organized into 160 segments. Addresses A0 through A7 provide access to each segment in the array for message addressing. Addressing provides the capability of constructing messages by combining stored phrases and sounds. to achieve longer recording durations. The nonvolatile storage array is based on productionproven, low-power CMOS EEPROM technology. PIN DESCRIPTIONS The highly integrated ISD1000A Series contains all the basic functions required for high-quality voice Recording and Playback. The noise-cancelling Microphone Preamplifier and Automatic Gain Control (AGC) record both low-volume and highvolume sounds. The AGC attack and release times are adjusted by an external resistor and capacitor. Antialiasing is performed by a continuous fifth-order Chebyshev filter, requiring no external components or clocks to give toll-quality reproduction. The low corner of the passband is user-settable by two external capacitors. The devices contain their own temperature-stabilized timebase oscillator. To minimize noise, the analog and digital circuits in the ISD1000A Series devices use separate power busses. These voltage busses are brought out to separate pins and should be tied together as close to the supply as possible. In addition, these supplies should be decoupled as close to the package as possible. The ISD1000A devices drive a speaker directly through differential outputs. This boosts power by four times and eliminates the need for a series capacitor or an output amplifier. The device will operate from a single power supply or from batteries. The device also includes a power down function for applications where minimum power consumption is critical. The CMOS-based design, combined with the nonvolatile storage array, Voltage Inputs (VCCA, VCCD) Ground Inputs (VSSA, VSSD) The ISD1000A Series of devices utilizes separate analog and digital ground busses. These pins should be tied together as close to the package as possible and connected through a low-impedance path to power supply ground. Power Down Input (PD) When not recording or playing back, the PD pin should be pulled HIGH to place the part in a very low power mode (see ISB specification). When EOM pulses LOW for an overflow condition, PD should be brought HIGH to reset the address pointer back to the beginning of the Record/Playback space. 1–3 1 06.DataBook_1000A Dsht Page 4 Friday, September 27, 1996 10:44 AM ISD1000A Series Chip Enable Input (CE) Microphone Input (MIC) The CE pin is taken LOW to enable all Playback and Record operations. The address inputs and Playback/Record input (P/R) are latched by the falling edge of CE. When CE is taken HIGH, the ISD1000A is unselected, the P/R is HIGH, and the auxiliary input is directed into the speaker amplifier. The microphone input transfers its signal to the on-chip preamplifier. An on-chip Automatic Gain Control (AGC) circuit controls the gain of this preamplifier from -15 to 24 dB. An external microphone should be AC coupled to this pin via a series capacitor. The capacitor value, together with the internal 10 Kohm resistance on this pin, determines the low-frequency cutoff for the ISD1000A Series passband. See ISD’s Application Notes and Design Manual in this book for additional information on low-frequency cutoff calculation. Playback/Record Input (P/R) -1 Product Data Sheets The P/R input is latched by the falling edge of the CE pin. A HIGH level selects a Playback cycle while a LOW level selects a Record cycle. For a Record cycle, the address inputs provide the starting address and recording continues until PD or CE is pulled HIGH or an overflow is detected (i.e. the chip is full). When a Record cycle is terminated by pulling PD or CE HIGH, an End-Of-Message (EOM) marker is stored at the current address in memory. For a Playback cycle, the address inputs provide the starting address and the device will play until an EOM marker is encountered. The device can continue past an EOM marker in an operational mode, or if CE is held LOW in address mode. (See page 1-6 for more Operational Modes). End-Of-Message Output (EOM) A non-volatile marker is automatically inserted at the end of each recorded message. It remains there until the message is recorded over. During Playback, the EOM output pulses LOW for a period of TEOM at the end of each message, or in the event of a message overflow (device full). In addition, the ISD1000A Series has an internal VCC detect circuit to maintain message integrity should VCC fall below 3.5V. In this case, EOM goes LOW and the device is fixed in Playbackonly mode. The EOM marker provides a convenient handshake signal for a processor, and also facilitates the cascading of devices. 1–4 Microphone Reference Input (MIC REF) The MIC REF input is the inverting input to the microphone preamplifier. This provides a noisecanceling or common-mode rejection input to the device when connected to a differential microphone. IF THIS INPUT IS UNUSED, IT MUST BE LEFT DISCONNECTED. Automatic Gain Control Input (AGC) The AGC dynamically adjusts the gain of the preamplifier to compensate for the wide range of microphone input levels. The AGC allows the full range of whispers to loud sounds to be recorded with minimal distortion. The “attack” time is determined by the time constant of a 5 KΩ internal resistance and an external capacitor (C2) connected from the AGC pin to VSSA analog ground. The “release” time is determined by the time constant of an external resistor (R2) and an external capacitor (C2 on the schematic on page 1-17) connected in parallel between the AGC Pin and VSSA analog ground. Nominal values of 470 KΩ and 4.7 µF give satisfactory results, in most cases. For AGC voltages of 1.5V and below, the preamplifier is at its maximum gain of 24 dB. Reduction in preamplifier gain occurs for voltages of approximately 1.8V. 06.DataBook_1000A Dsht Page 5 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets Analog Output (ANA OUT) This pin provides the preamplifier output to the user. The voltage gain of the preamplifier is determined by the voltage level at the AGC pin. It has a maximum gain of about 24 dB for small input signal levels. Analog Input (ANA IN) The analog input pin transfers its signal to the chip for recording. For microphone inputs, the ANA OUT pin should be connected via an external capacitor to the ANA IN pin. This capacitor value, together with the 2.7 KΩ input impedance of ANA IN, is selected to give additional cutoff at the lowfrequency end of the voice passband. If the desired input is derived from a source other than a microphone, the signal can be fed, capacitively coupled, into the ANA IN pin directly. Optional External Clock Input (XCLK) ISD1000A devices are configured at the factory with an internal sampling clock frequency centered to ± 1% of specification. The frequency is maintained to a total variation of ± 2.25% tolerance over the entire commercial temperature and 4.5 to 5.5 voltage ranges. The internal clock has a ± 5% tolerance over the industrial temperature range and 4.5 to 5.5 voltage range. A regulated power supply is recommended for industrial-temperature-range parts. If greater precision is required, the device can be clocked through the XCLK pin as follows. Part Number Sample Rate Required Clock ISD1016A 8.0 KHz 1024 KHz ISD1020A 6.4 KHz 819.2 KHz These recommended clock rates should not be varied because the antialiasing and smoothing filters are fixed, and aliasing problems can occur if the sample rate differs from the one recommended. The duty cycle on the input clock is not critical, as the clock is immediately divided by two. IF THE XCLK IS NOT USED, THIS INPUT MUST BE CONNECTED TO GROUND. Speaker Outputs (SP+/SP-) All devices in the ISD1000A Series include an onchip differential speaker driver, capable of driving 50 milliwatts into 16 Ω from AUX IN (12.2 mW from memory). The speaker outputs are held at VSSA levels during record and power down. It is therefore not possible to parallel speaker outputs of multiple ISD1000A devices or the outputs of other speaker drivers. NOTE Connection of speaker outputs in parallel may cause damage to the device. While a single output may be used alone (including a coupling capacitor between the SP pin and the speaker), these outputs may be used individually with the output signal taken from either pin. Using the differential outputs results in a 4:1 improvement in output power. NOTE Never ground or drive an output. Auxiliary Input (AUX IN) The Auxiliary Input is multiplexed through to the output amplifier and speaker output pins when CE is HIGH and Playback has ended, or if the device is in overflow. When cascading multiple ISD1000A devices, the AUX IN pin is used to connect a Playback signal from a following device to the previous output speaker drivers. For noise considerations, it is suggested that the Auxiliary Input not be driven when the storage array is active. Address/Mode Inputs (Ax/Mx) The Address/Mode Inputs provide two functions in the ISD1000A Series: 1. Message address (either 1–5 1 06.DataBook_1000A Dsht Page 6 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets A6 or A7 = LOW) and 2. ISD1000A Series Operational Mode Options (A6 AND A7 = HIGH). Operational mode options are shown in the Operational Modes table. There are a maximum of 160 message addresses (or segments). Each segment corresponds to one of 160 rows in the analog storage array. The message addresses (segments) are in locations 0 through 159 contiguous. The playback/record duration of each segment depends upon the device and is as follows: Part Number Segment Playback/Record Duration ISD1016A 100 milliseconds ISD1020A 125 milliseconds -1 An operation may be started at any address, as defined by address pins A0-A7. Record or playback continues with automatic incrementing of the internal on-chip address until either CE is brought HIGH (Record), an end of message marker is encountered (Playback with CE HIGH), or an overflow (device full) condition results. OPERATIONAL MODES The ISD1000A Series is designed with several built-in operational modes provided to allow maximum functionality with a minimum of additional components, described in detail below. The operational modes use the address pins on the ISD1000A devices, but are mapped outside the valid address range. When the two Most Significant Bits (MSBs) are HIGH (A6 = A7=1), the remaining address signals are interpreted as mode bits and NOT as address bits. Therefore, operational modes and direct addressing are not compatible and cannot be used simultaneously. There are two important considerations for using operational modes. First, all operations begin initially at address 0, which is the beginning of the ISD1000A address space. Later operations can begin at other address locations, depending on the operational mode(s) chosen. In addition, the address pointer is reset to 0 when the device is changed from Record to Playback, or when a Power-Down cycle is executed. Second, an Operational Mode is executed when CE goes LOW and the two MSBs are HIGH. This Operational Mode remains in effect until the next OPERATIONAL MODES TABLE Control Mode Function Typical Use Jointly Compatible* M0 Message cueing Fast-forward through messages M4, M5 M1 Delete EOM markers Position EOM marker at the end of the last message M3, M4, M5 M2 Cascading Adding devices to extend message M3 Looping Continuous playback from Address 0 M1, M5 M4 Consecutive addressing Record/Play multiple consecutive messages M0, M1, M5 M5 CE level-activated Allow message pausing M0, M1, M3, M4 NOTE: An asterisk (*) indicates additional operational modes which can be used simultaneously with the given mode. 1–6 06.DataBook_1000A Dsht Page 7 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets LOW-going CE signal, at which point the current address/mode levels are sampled and executed. NOTE The two MSBs are on pins 9 and 10 for each ISD1000A Series member. OPERATIONAL MODES DESCRIPTION The Operational Modes can be used in conjunction with a microcontroller, or they can be hardwired to provide the desired system operation. M0 — Message Cueing Message Cueing allows the user to skip through messages, without knowing the actual physical addresses of each message. Each CE LOW pulse causes the internal address pointer to skip to the next message. This mode should be used for Playback only, and is typically used with the M4 Operational Mode. M1 — Delete EOM Markers The M1 Operational Mode allows sequentially recorded messages to be combined into a single message with only one EOM marker set at the end of the combined message. When this operational mode is configured, messages recorded sequentially are played back as one continuous message. M2 — Used for Cascading During playback, EOM goes LOW at array overflow only. Normal EOM pulses are turned off. M3 — Message Looping The M3 Operational Mode allows for the automatic, continuously repeated playback of the message located at the beginning of the address space. A message CANNOT completely fill the ISD1000A device and loop. M4 — Consecutive Addressing During normal operations, the address pointer will reset when a message is played through to an EOM marker. The M4 Operational Mode inhibits the address pointer reset on EOM, allowing messages to be played back consecutively. M5 — CE Level Activated The default mode for ISD1000A devices is for CE to be edge-activated on Playback and level-activated on Record. The M5 Operational Mode causes the CE pin to be interpreted as level-activated as opposed to edge-activated during Playback. This is specifically useful for terminating Playback operations using the CE signal. In this mode, CE LOW begins a Playback cycle at the beginning of device memory. 1–7 1 06.DataBook_1000A Dsht Page 8 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets TIMING DIAGRAMS Record TCE CE TSET Don't Care P/R T PDH THOLD PD Don't Care A0-A7 Don't Care Don't Care Don't Care TSET Mic MIC Ana IN In ANA TPUD TREC SP+/- -1 Playback TCE CE TSET Don't Care P/R THOLD PD Don't Care A0-A7 A0-A9 Don't Care T PDH Don't Care Don't Care TSET SP+/– EOM TPUD 1–8 T PLAY TEOM 06.DataBook_1000A Dsht Page 9 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets ABSOLUTE MAXIMUM RATINGS (PACKAGED PARTS) Condition OPERATING CONDITIONS (PACKAGED PARTS) Value Junction temperature Condition 150° C Commercial operating Storage temperature range –65° C to +150° C temperature range(1) Voltage applied to any pin (VSS – 0.3 V) to (VCC + 0.3 V) Voltage applied to any pin (Input current limited to ± 20 mA) (VSS – 1.0 V) to (VCC + 1.0 V) Lead temperature (soldering – 10 seconds) 300° C VCC - VSS – 0.3 V to + 7.0 V NOTE: Value 0° C to +70° C –40° C to +85° C Industrial operating temperature(1) Supply voltage (VCC)(2) +4.5 V to +5.5 V Ground voltage (VSS)(3) 0V NOTES: 1. Case temperature. 2. VCC = VCCA = VCCD. 3. VSS = VSSA = VSSD. Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions. 1 DC PARAMETERS (PACKAGED PARTS) Symbol Parameters Min(2) Typ (1) Max(2) Units 0.8 V Conditions VIL Input Low Voltage VIH Input High Voltage VOL Output Low Voltage VOH Output High Voltage VOH1 Output High Voltage ICC VCC Current (Operating) 25 30 mA REXT = ∞ (3) ISB VCC Current (Standby) 1 10 µA (3) IIL Input Leakage Current ±1 µA REXT Output Load Impedance RMIC Preamp In Input Resistance 10 KΩ Pins 17, 18 RAUX AUX Input Resistance 10 KΩ VCC = 4.5 V to 5.5 V 2.0 VCC = 4.5 V to 5.5 V V 0.4 V IOL = 4.0 mA 2.4 V IOH = – 1.6 mA, VCC = 4.5 V to 5.5 V VCC–0.4 V IOH = – 10 µA Ω 16 Speaker Load 1–9 06.DataBook_1000A Dsht Page 10 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets DC PARAMETERS (PACKAGED PARTS) – CONTINUED Symbol Parameters Min(2) Typ (1) Max(2) Units Conditions RANA IN ANA IN Input Resistance 3.0 KΩ APRE1 Preamp Gain 1 24 dB AGC = 0.0 V, VCC = 4.5 V to 5.5 V APRE2 Preamp Gain 2 – 45 dB AGC = 2.5 V AAUX AUX IN/ SP+ Gain V/V VCC = 4.5 V to 5.5 V AARP ANA IN to SP+/- Gain 22 dB RAGC AGC Output Resistance 5 KΩ IPREH Preamp Out Source –1 mA @ VOUT = 1.0 V, VCC = 4.5 V to 5.5 V IPREL Preamp In Sink 0.8 mA @ VOUT = 2.0 V, VCC = 4.5 V to 5.5 V 15 0.9 -1 NOTES: 1. Typical values @ TA = 25° C and 5.0 V. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. 3. VCCA and VCCD connected together. AC PARAMETERS (PACKAGED PARTS) Symbol Min(2) Characteristic Typ (1) Max(2) Units Conditions FS Internal Clock Sampling Frequency — ISD1016A — ISD1020A 8 6.4 KHz KHz (9) (9) FCF Filter Pass Band — ISD1016A — ISD1020A 3.4 2.7 KHz KHz 3 dB Roll-Off Point(3)(10) TREC Record Duration — ISD1016A — ISD1020A 16 20 sec sec TPLAY Playback Duration — ISD1016A — ISD1020A 16 20 sec sec TCE CE Pulse Width — ISD1016A — ISD1020A 100 100 nsec nsec TSET Control/Address Setup Time — ISD1016A — ISD1020A 300 300 nsec nsec THOLD Control/Address Hold Time — ISD1016A — ISD1020A 0 0 nsec nsec TPUD Power-Up Delay — ISD1016A — ISD1020A 18.75 31.25 msec msec 1–10 3 dB Roll-Off Point(3)(10) (9) (9) 06.DataBook_1000A Dsht Page 11 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets AC PARAMETERS (PACKAGED PARTS) – CONTINUED Symbol Min(2) Characteristic Typ (1) Max(2) Units Conditions TPDR PD Pulse Width - Record — ISD1016A — ISD1020A 25 31.25 msec msec (6) (6) TPDP PD Pulse Width - Play — ISD1016A — ISD1020A 12.5 15.625 msec msec (7) (7) TPDS PD Pulse Width - Static — ISD1016A — ISD1020A 100 100 nsec nsec (8) (8) TPDH Power Down Hold — ISD1016A — ISD1020A TEOM EOM Pulse Width — ISD1016A — ISD1020A 12.5 15.6 msec msec THD Total Harmonic Distortion — ISD1016A — ISD1020A 1 1 % % POUT Speaker Output Power — ISD1016A 12.5 50 mW REXT = 16 Ω(4) — ISD1020A 12.5 50 mW REXT = 16 Ω(4) REXT = 600 Ω REXT = 600 Ω 0 0 nsec nsec VOUT Voltage Across Speaker Pins — ISD1016A — ISD1020A 2.5 2.5 V p–p V p–p VIN1 MIC Input Voltage — ISD1016A — ISD1020A 20 20 mV mV @ 1 KHz @ 1 KHz Peak-to-Peak(5) Peak-to-Peak(5) VIN2 ANA IN Input Voltage — ISD1016A — ISD1020A 50 50 mV mV Peak-to-Peak Peak-to-Peak VIN3 AUX IN Input Voltage — ISD1016A — ISD1020A 1.25 1.25 V p–p V p–p REXT = 16 Ω REXT = 16 Ω NOTES: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. Typical values @ TA = 25° C and 5.0 V. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. Low-frequency cutoff depends upon value of external capacitors (see Pin Descriptions). From AUX IN; if ANA IN is driven at 50 mV p-p, the POUT= 12.2 mW, typical. With 5.1 KΩ series resistor at ANA IN. This is the minimum pulse width required to guarantee that a Record cycle will be interrupted. A LOW-going PD pulse of less than this interval during Record may be ignored. This is the minimum pulse width required to guarantee that a Playback cycle will be interrupted. A LOW-going PD pulse of less than this interval during Playback may be ignored. This is the minimum pulse width required to reset the device when in a static condition; i.e., not actively recording or playing back. Sampling Frequency and Playback Duration will vary as much as ± 2.25% over the commercial temperature and voltage range and ± 5% over the industrial temperature and voltage range. For greater stability, an external clock can be utilized (see Pin Descriptions). Filter specification applies to the antialiasing filter and to the smoothing filter. 1–11 1 06.DataBook_1000A Dsht Page 12 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets TYPICAL PARAMETER VARIATION WITH VOLTAGE AND TEMPERATURE (PACKAGED PARTS) STANDBY CURRENT (ISB) RECORD MODE OPERATING CURRENT (ICC) 0.7 0.6 20 Standby Current (µA) Operating Current (mA) 25 15 10 5 0.5 0.4 0.3 0.2 0.1 -1 0 0 -40 25 70 -40 85 Temperature (C) 0.5 1.0 Percent Change (%) Percent Distortion (%) 1.5 0.4 0.3 0.2 0.1 0.5 0 -0.5 -1.0 0 -1.5 25 70 Temperature (C) 1–12 85 OSCILLATOR STABILITY 0.6 5.5 Volts 70 Temperature (C) TOTAL HARMONIC DISTORTION -40 25 4.5 Volts 85 -40 25 70 Temperature (C) 85 06.DataBook_1000A Dsht Page 13 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets ABSOLUTE MAXIMUM RATINGS (DIE) Condition OPERATING CONDITIONS (DIE) Value Junction temperature Condition Value 150° C Commercial operating Storage temperature range –65° C to +150° C temperature range (1) Voltage applied to any pad (VSS – 0.3 V) to (VCC + 0.3 V) Voltage applied to any pad (VSS – 1.0 V) to (Input current limited to ± 20 mA) (VCC + 1.0 V) VCC - VSS NOTE: – 0.3 V to + 7.0 V 0° C to +50° C Supply voltage (VCC)(2) +4.5 V to +6.5 V Ground voltage (VSS)(3) 0V NOTES: 1. Case temperature. 2. VCC = VCCA = VCCD. 3. VSS = VSSA = VSSD. Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions. 1 DC PARAMETERS (DIE) Symbol Parameters Min(2) Typ(1) Max(2) Units 0.8 V Conditions VIL Input Low Voltage VIH Input High Voltage VOL Output Low Voltage VOH Output High Voltage VOH1 Output High Voltage ICC VCC Current (Operating) 25 30 mA REXT = ∞ (3) ISB VCC Current (Standby) 1 10 µA (3) IIL Input Leakage Current ±1 µA REXT Output Load Impedance RMIC Preamp In Input Resistance 10 KΩ Pins 17, 18 RAUX AUX Input Resistance 10 KΩ VCC = 4.5 V to 5.5 V RANA IN ANA IN Input Resistance 3.0 KΩ 2.0 VCC = 4.5 V to 5.5 V V 0.4 V IOL = 4.0 mA 2.4 V IOH = –1.6 mA, VCC = 4.5 V to 5.5 V VCC–0.4 V IOH = – 10 µA Ω 16 Speaker Load 1–13 06.DataBook_1000A Dsht Page 14 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets DC PARAMETERS (DIE) – CONTINUED Symbol -1 Parameters Min(2) Typ(1) Max(2) Units Conditions APRE1 Preamp Gain 1 24 APRE2 Preamp Gain 2 – 45 AAUX AUX IN/ SP+ Gain AARP ANA IN to SP+/- Gain 22 dB RAGC AGC Output Resistance 5 KΩ IPREH Preamp Out Source –1 mA @ VOUT = 1.0 V, VCC = 4.5 V to 5.5 V IPREL Preamp In Sink 0.8 mA @ VOUT = 2.0 V, VCC = 4.5 V to 5.5 V 15 0.9 dB AGC = 0.0 V, VCC = 4.5 V to 5.5 V dB AGC = 2.5 V V/V VCC = 4.5 V to 5.5 V NOTES: 1. Typical values @ TA = 25° C and 5.0 V. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. 3. VCCA and VCCD connected together. AC PARAMETERS (DIE) Symbol Min(2) Characteristic Typ (1) Max(2) Units Conditions FS Internal Clock Sampling Frequency — ISD1016A — ISD1020A 8 6.4 KHz KHz (9) (9) FCF Filter Pass Band — ISD1016A — ISD1020A 3.4 2.7 KHz KHz 3 dB Roll-Off Point(3)(10) TREC Record Duration — ISD1016A — ISD1020A 16 20 sec sec TPLAY Playback Duration — ISD1016A — ISD1020A 16 20 sec sec TCE CE Pulse Width — ISD1016A — ISD1020A 100 100 nsec nsec TSET Control/Address Setup Time — ISD1016A — ISD1020A 300 300 nsec nsec THOLD Control/Address Hold Time — ISD1016A — ISD1020A 0 0 nsec nsec TPUD Power-Up Delay — ISD1016A — ISD1020A 18.75 31.25 msec msec TPDR PD Pulse Width - Record — ISD1016A — ISD1020A 1–14 25 31.25 msec msec 3 dB Roll-Off Point(3)(10) (9) (9) (6) (6) 06.DataBook_1000A Dsht Page 15 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets AC PARAMETERS (DIE) – CONTINUED Symbol Min(2) Characteristic Typ (1) Max(2) Units Conditions TPDP PD Pulse Width - Play — ISD1016A — ISD1020A 12.5 15.625 msec msec (7) (7) TPDS PD Pulse Width - Static — ISD1016A — ISD1020A 100 100 nsec nsec (8) (8) TPDH Power Down Hold — ISD1016A — ISD1020A TEOM EOM Pulse Width — ISD1016A — ISD1020A 12.5 15.6 msec msec THD Total Harmonic Distortion — ISD1016A — ISD1020A 1 1 % % POUT Speaker Output Power — ISD1016A 12.5 50 mW REXT = 16 Ω(4) — ISD1020A 12.5 50 mW REXT = 16 Ω(4) REXT = 600 Ω REXT = 600 Ω 0 0 nsec nsec VOUT Voltage Across Speaker Pins — ISD1016A — ISD1020A 2.5 2.5 V p–p V p–p VIN1 MIC Input Voltage — ISD1016A — ISD1020A 20 20 mV mV @ 1 KHz @ 1 KHz 1 Peak-to-Peak(5) Peak-to-Peak(5) VIN2 ANA IN Input Voltage — ISD1016A — ISD1020A 50 50 mV mV Peak-to-Peak Peak-to-Peak VIN3 AUX IN Input Voltage — ISD1016A — ISD1020A 1.25 1.25 V p–p V p–p REXT = 16 Ω REXT = 16 Ω NOTES: 1. Typical values @ TA = 25° C and 5.0 V. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100% tested. 3. Low-frequency cutoff depends upon value of external capacitors (see Pin Descriptions). 4. From AUX IN; if ANA IN is driven at 50 mV p-p, the POUT= 12.2 mW, typical. 5. With 5.1 KΩ series resistor at ANA IN. 6. This is the minimum pulse width required to guarantee that a Record cycle will be interrupted. A LOW-going PD pulse of less than this interval during Record may be ignored. 7. This is the minimum pulse width required to guarantee that a Playback cycle will be interrupted. A LOW-going PD pulse of less than this interval during Playback may be ignored. 8. This is the minimum pulse width required to reset the device when in a static condition; i.e., not actively recording or playing back. 9. Sampling frequency and Playback duration will vary as much as ± 2.25% over the commercial temperature and voltage range. For greater stability, an external clock can be utilized (see Pin Descriptions). 10. Filter specification applies to the antialiasing filter and to the smoothing filter. 1–15 06.DataBook_1000A Dsht Page 16 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets TYPICAL PARAMETER VARIATION WITH VOLTAGE AND TEMPERATURE (DIE) STANDBY CURRENT (ISB) RECORD MODE OPERATING CURRENT (ICC) 0.8 0.7 20 Standby Current (µA) Operating Current (mA) 25 15 10 0.6 0.5 0.4 0.3 0.2 5 -1 0.1 0 0 0 25 0 50 Temperature (C) 25 50 Temperature (C) OSCILLATOR STABILITY TOTAL HARMONIC DISTORTION 2.5 0.5 Percent Change (%) Percent Distortion (%) 2.0 0.4 0.3 0.2 1.5 1.0 0.5 0 -0.5 0.1 -1.0 -1.5 0 0 25 50 Temperature (C) 6.5 Volts 1–16 5.5 Volts 0 25 Temperature (C) 4.5 Volts 50 06.DataBook_1000A Dsht Page 17 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets APPLICATION EXAMPLE – DESIGN SCHEMATIC V CC ISD1016A/1020A CHIP ENABLE VSS 1 2 3 POWER DOWN 4 5 6 9 PLAYBACK/RECORD 10 23 24 27 25 26 NOTE: A0 A1 A2 A3 A4 A5 A6 A7 CE PD P/R EOM XCLK If desired, pin 18 may be left unconnected (microphone preamplifier noise will be higher). In this case, pin 18 must not be tied to any other signal or voltage. Additional design example schematics are provided in the Application Notes and Design Manual in this book. V CC VCCD 28 VCCA 16 VSSD VSSA 12 SP+ SP– AUX IN ANA IN 14 C8 C6 0.1 µF C7 0.1 µF 13 22 µF 15 11 20 ANA OUT 21 MIC REF MIC AGC 18 R5 5.1 KΩ C3 0.1 µF 16 Ω SPEAKER (Note) C5 17 19 R2 470 KΩ V CC R1 1 KΩ C2 4.7 µF C1 0.1 µF R3 10 KΩ 0.1 µF Mic Ref R4 10 KΩ ELECTRET C 4 MICROPHONE 220 µF APPLICATION EXAMPLE – BASIC DEVICE CONTROL Control Step Function Action 1 Power up chip and select record/playback mode 1. PD = LOW 2. P/R = As desired 2 Set message address for record/playback Set addresses A0–A7 3 Begin playback/record CE = Pulsed LOW (Playback) CE = Held LOW (Record) 4 End cycle CE = HIGH and EOM reached 1–17 1 06.DataBook_1000A Dsht Page 18 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets APPLICATION EXAMPLE – PASSIVE COMPONENT FUNCTIONS Part -1 Function Comments R1 Microphone power supply decoupling Reduces power supply noise R2 Release time constant Sets release time for AGC R3, R4 Microphone biasing resistors Provides biasing for microphone operation R5 Series limiting resistor Reduces level at high supply voltages C1, C5 Microphone DC–blocking capacitor Low-frequency cutoff Decouples microphone bias from chip. Provides single-pole low-frequency cutoff and common-mode noise rejection C2 Attack/Release time constant Sets attack/release time for AGC C3 Low-frequency cutoff capacitor Provides additional pole for low-frequency cutoff C4 Microphone power supply decoupling Reduces power supply noise C6, C7, C8 Power supply capacitors Filter and bypass of power supply 1–18 06.DataBook_1000A Dsht Page 19 Friday, September 27, 1996 10:44 AM ISD1000A Series Product Data Sheets ORDERING INFORMATION Product Number Descriptor Key ISD10 _ _ A _ _ ISD1000A Series Special Temperature Field: Blank = Commercial Packaged (0˚C to +70˚C) or Commercial Die (0˚C to +50˚C) I = Industrial (-40˚C to +85˚C) Duration: 16 = 16 Seconds 20 = 20 Seconds Package Type: G = 28-Lead 0.350-Inch Small Outline Integrated Circuit (SOIC) P = 28-Lead 0.600-Inch Plastic Dual In-Line Package (PDIP) X = Die When ordering ISD1000A Series devices, please refer to the following valid part numbers. Part Number Part Number ISD1016AG ISD1020AG ISD1016AGI ISD1020AGI ISD1016AP ISD1020AP ISD1016API ISD1020API ISD1016AX ISD1020AX For the latest product information, access ISD’s worldwide website at http://www.isd.com. 1–19 1 06.DataBook_1000A Dsht Page 20 Friday, September 27, 1996 10:44 AM ISD1000A Series -1 1–20 Product Data Sheets