ETC OZ962G

OZ962
High-Efficiency Inverter Controller
FEATURES
GENERAL DESCRIPTION
•
The OZ962 is a unique high-efficiency, CCFL
backlight controller. It generates symmetrical,
near sinusoidal output voltage and current
waveforms for driving a CCFL backlight. The
OZ962 operates in a single, constant frequency,
pulse-width-modulation (PWM) mode. Typical
operating frequency ranges between 30 KHz to
100 KHz, depending on the CCFL and the
transformer’s characteristics.
•
•
•
•
•
•
•
•
Single-stage power conversion, input voltage
range of 5V to 18V
Reduces the number of components and board
size by 30% compared with conventional design
Supports both floating and grounded secondary
designs
90% efficiency vs. typical 75% efficiency of
conventional designs
Internal open-lamp and short-circuit protections
Wide dimming range
Supports synchronization among multiple
inverter modules
Reliable 2 -winding transformer design,
eliminates arcing problems
Constant frequency, symmetrical, sinusoidal
drive
Operating in a PWM push-pull manner, the
transformer in the OZ962 backlight inverter
requires only one primary winding and one
secondary winding, with the secondary winding
requiring no fold-back treatment.
The OZ962 is available in both 16-pin SOIC and
TSSOP packages. It is specified over the
commercial temperature range: 0 oC to +70 oC.
ORDERING INFORMATION
OZ962R - 16 lead TSSOP
OZ962G - 16-pin plastic SOP
TYPICAL APPLICATION CIRCUIT
VDD (+12V)
F1
1A Fast Fuse
ENA
+
-
C1
22u
25V
GND
R10
100
R5
10K
CN1
U1
16
REF
VDD
OZ962G
2
15
RT
OVP
14
3
NC
CT
4
13
SCP
CLK
5
12
ADJ
ENA
6
11
FB
NDR
7
10
CMP
PDR
8
9
GND
SST
3
C7
U2
1
R9
R1
220K 200K C9
.01u
R2
10K
C2
R3
5.1K
C3
0.1u
330p
R11
1M
Q2
C8
0.22u
*
33T
4
5,6
C5
220p
R7
100K
SI4559EY
-
*
2200T
68p
3KV
C6 2.2u
50V
3.5W
+
R14
7,8
R6
30
1.0K
2
Q1
1
C4
0.1u
R4
15K
R8
0.5
R12
750
R13
100
Figure 1. Typical Floating Secondary Application
Circuit
03/01/00
Copyright 1999 by O2Micro
OZ962-SF-2.7
All Rights Reserved
Page 1
U.S. Patent #5,619,402
OZ962
FUNCTIONAL BLOCK DIAGRAM
Ct(14) Rt(15)
Under Voltage
Lockout
OVP(2)
RAMP
OSC
OVP Voltage
Generator
OVP
NDR(11)
Break
Before
Make
OVP=Vref-(Vdd - 1)(12.5/150)
D=1.1(OVP)/2.5 - 0.2
VDD(16)
N-Clamp
PDR(10)
Band Gap
Reference
Vref (2.5V)
OSC
REF(1)
S
Q
R
Q
P-Clamp
RAMP
1/2F
ADJ(5)
Error
Amp.
40k
CLK(13)
Ve
Ve=Vcmp-2*(Vcmp-SST-Vgs)
Vcmp
60k
FB(6)
3V
30k
1k
SST
CMP(7)
Dmax
Clamp
Vdd
OVP
9k
3µ A
10µA
ENA(12)
SST
SST(9)
OVP
2.0v
SCP & OVP inhibited during
start-up
2µA
ADJ
OVP
SCP
UVL
shut
down
latch
SCP(4)
Note:
OVP – Over Voltage Protection
SCP – Short-Circuit Protection
UVL – Under Voltage Lockout
Figure 2. Functional Block Diagram
OZ962-SF-2.7
Page 2
GND(8)
OZ962
PIN DESCRIPTION
Names
REF
OVP
Pin No.
1
2
I/O
O
I
NC
SCP
ADJ
FB
CMP
GND
SST
3
4
5
6
7
8
9
I
I
I
O
GND
I
PDR
NDR
ENA
CLK
CT
RT
VDD
10
11
12
13
14
15
16
O
O
I
O
I/O
I/O
PWR
Description
Reference voltage output. Nominal voltage is 2.5 V.
Over-voltage protection setting. Refer to formula for OVP in block diagram
on page 2 of this document.
No connection.
Short-circuit protection input.
Reference voltage input for dimming control.
Current sense feedback.
Compensation for the current sense feedback.
Ground.
Tsst ~ 0.2 Csst (Vdd - 5), where Csst is the soft start capacitor value in µF
and Tsst value is in µs.
Gate drive output for the P-MOSFET.
Gate drive output for the N-MOSFET.
Enable input, active high (Vth is about 1.7 V).
Open-drain clock output.
Timing capacitor. CT and RT set the clock frequency.
Timing resistor.
Supply voltage input.
ABSOLUTE MAXIMUM RATINGS
VDD
GND
Logic inputs
Power dissipation
18 V
+/- 0.3 V
-0.3 V to VDD+0.3 V
800 mW at 25 oC
Operating temp.
Operating junction temp.
Storage temp.
0 oC to 70 oC
150 oC
-55 to 150 oC
RECOMMENDED OPERATING RANGE
VDD
Fosc
Rosc
5V to 18V
30 KHz to 100 KHz
50 k to 150 k
OZ962-SF-2.7
Page 3
OZ962
FUNCTIONAL SPECIFICATIONS
Parameter
Symbol
Test Conditions
5 V < VDD < 15 V
Limits
Unit
Min
Typ
Max
2.37
2.50
2.63
Reference Voltage
Nominal voltage
Vref
Iload = 0.25 mA,
V
VDD = 5 V
Line regulation
-
8
-
mV/V
Iload = 0.2 mA to 1.0 mA
-
1
-
mV/mA
Ct = 220 pF, Rt = 120 k
48
53
58
KHz
Ramp peak
2.45
2.55
2.65
V
Ramp valley
0.40
0.45
0.50
V
TA = 0 C to 70 C
-
-
200
ppm/ oC
Input bias current
V ADJ =V FB =2.0 V
-
25
500
nA
Input offset voltage
V FB = 4.0 V
-
5
10
mV
Input voltage range
0
-
VDD1.5
V
Open loop voltage gain
50
60
-
dB
Unity gain bandwidth
1
1.5
-
MHz
Power supply rejection
50
60
-
dB
Positive-going threshold voltage
-
3.8
4
V
Negative-going threshold voltage
3.4
3.6
-
V
Load regulation
Oscillator
Initial accuracy
fosc
o
Temp. stability
o
Error Amplifier
Under-Voltage Lockout
Supply
IOFF
VDD = 5.0 V
-
25
120
µA
IOFF
VDD = 15 V
-
25
120
µA
Supply current - Enable High
ION
VDD = 5.0 V
-
0.6
1.5
mA
Supply current - Enable High
ION
VDD = 15 V
-
0.6
1.5
mA
V OH
Isink = 10 mA,
VDD0.3
VDD0.5
-
V
Supply current - Enable Low
Adj, CT = Open
Supply current - Enable Low
Adj, CT = Open
NDR output
Output high voltage
VDD < 7.8 V
7.0
8.0
9.0
V
Output low voltage
V OL
VDD >7.8 V
Isource = 10 mA
-
0.3
0.8
V
Output resistance
ROUT
VDD = 5.0 V
-
50
80
Ω
Output high voltage
V OH
Isink = 10 mA
VDD0.6
VDD0.3
-
V
Output low voltage
V OL
Isource = 10 mA,
0.4
0.5
0.8
V
VDD > 7.8 V
-
VDD6.0
VDD4.0
VDD = 5.0 V
-
50
80
Ω
PDR output
VDD < 7.8 V
Output resistance
ROUT
Break-Before-Make
Qn off to Qp on delay
THL
200
240
280
ns
Qp off to Qn on delay
TLH
220
260
300
ns
OZ962-SF-2.7
Page 4
OZ962
PACKAGE INFORMATION
A2
A1
A
TSSOP-16
PACKAGE
E
E1
1
θ2
D
R1
Gauge Plane
b
R
e
b
c
L
c1
θ3
b1
DIM
A
A1
A2
L
D
E1
E
R
R1
b
b1
c
c1
L1
e
θ1
θ2
θ3
OZ962-SF-2.7
INCHES
MIN
MAX
0.043
0.002
0.006
0.031
0.041
0.020
0.030
0.169
0.177
0.252BSC
0.004
0.004
0.007
0.012
0.007
0.010
0.004
0.008
0.004
0.006
0.039REF
0.026BSC
0°
8°
12°REF
12°REF
θ1
L1
MILLIMETERS
MIN
MAX
1.20
0.05
0.15
0.80
1.05
0.45
0.75
4.90
5.10
4.30
4.50
6.40BSC
0.09
0.09
0.19
0.30
0.19
0.25
0.09
0.20
0.09
0.16
1.0REF
0.65BSC
0°
8°
12°REF
12°REF
Page 5
OZ962
DIM
E H
SOP-16
PACKAGE
1
A
A1
B
C
D
E
e
H
L
α
D
INCHES
MIN
MAX
0.0532 0.0688
0.0040 0.0098
0.013
0.020
0.0075 0.0098
0.3859 0.3937
0.1497 0.1574
0.050 BCS.
0.2284
0.244
0
0.016
0.050
0°
8°
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
9.80
10.00
3.80
4.00
1.27 BCS.
5.80
6.20
0.40
0°
1.27
8°
D
A
B
e
A1
C
α
L
OZ962-SF-2.7
Page 6