ETC PL-1061

PL-1061 Product Brochure
V1.1 05/29/02
Mobile Computing System
The PL-1061 is a low-cost high-performance single chip mobile computing system solution. With a powerful
32-bit RISC CPU core and a wide range of hardware controlled peripheral interfaces, it is capable of
handling most mobile computing applications’ requirements.
The PL-1061 is designed to cover both low power consumption and high performance applications at the
same time. The software could change the system clock rate and CPU clock rate on the run. It gives the
applications extra edges on delivering the most computation power when needed and preserve power when
the circumstances allowed.
Block Diagram
MIPS R3000 compatible 32-bit RISC core with
MAC Co-Processor running at maximum speed of
100 MHz
4K-Byte Direct-Mapped Data Cache, and 4K-Byte
2-way set-associative Instruction Cache
16-/32-bit Memory Interface, one chip select
supports up to 256MB SDRAM
8K-Byte embedded Boot ROM
Programmable CMOS Sensor Interface
Support USB 1.1 master/slave
LCD Controller (STN, TFT, up to 800x600 size and
Support one UART/PS2, and one IrDA up
64k color)
to 115.2Kbps
Support external touch screen controllers, e.g. TI
GPIO and Pulse-Width-Modulation
ADS7843, ADI AD7843, etc.
Independent Power Domain for RTC and
Support PCI I/F compliant with PCI 2.1 spec.
Power Management functions
SmartMedia Interface
JTAG Emulation Interface
Support SD/MMC/SPI and SDIO I/F
Remote Debugger (GDB) interface
CompactFlash Interface
Support Embedded Linux
Support AC `97 / I S Interface
I C Master/Slave Interface
Package type: 388-pin BGA; Footprint:
27mm x 27mm
Prolific Technology Inc.
7F, No. 48, Sec. 3, Nan Kang Rd., Taipei, Taiwan, R. O. C.
Tel: 886-2-2654-6363
Fax: 886-2-2654-6161
E-mail: [email protected]