IN74HC365 HEX 3-STATE NONINVERTING BUFFER WITH COMMON ENABLES High-Performance Silicon-Gate CMOS • • • • The IN74HC365 is identical in pinout to the LS/ALS365. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device is a high-speed hex buffer with 3-state outputs and two common active-low Output Enables. When either of the enables is high, the buffer outputs are placed into highimpedance states. The IN74HC365 has noninverting outputs. Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION IN74HC365N Plastic IN74HC365D SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Enable 1 L L H X Inputs Enable 2 L L X H A Output Y L H X X L H Z Z Z = high impedance X = don’t care PIN 16 =VCC PIN 8 = GND 1 IN74HC365 MAXIMUM RATINGS* Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V IIN DC Input Current, per Pin mA ±20 IOUT DC Output Current, per Pin mA ±35 ICC DC Supply Current, VCC and GND Pins mA ±75 PD Power Dissipation in Still Air, Plastic DIP+ 750 mW SOIC Package+ 500 Tstg Storage Temperature -65 to +150 °C 260 TL Lead Temperature, 1 mm from Case for 10 °C Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types t r, tf Input Rise and Fall Time (Figure VCC =2.0 V 1) VCC =4.5 V VCC =6.0 V Min 2.0 0 Max 6.0 VCC Unit V V -55 0 0 0 +125 1000 500 400 °C ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74HC365 DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) Guaranteed Limit VCC Symbol Parameter Test Conditions V 25 °C ≤85 ≤125 to °C °C -55°C 1.5 1.5 1.5 VIH Minimum High- VOUT= VCC-0.1 V 2.0 3.15 3.15 3.15 Level Input IOUT≤ 20 µA 4.5 4.2 4.2 4.2 Voltage 6.0 0.3 0.3 0.3 VIL Maximum Low - VOUT=0.1 V 2.0 0.9 0.9 0.9 Level Input IOUT ≤ 20 µA 4.5 1.2 1.2 1.2 Voltage 6.0 1.9 1.9 1.9 VOH Minimum High- VIN=VIH 2.0 4.4 4.4 4.4 Level Output IOUT ≤ 20 µA 4.5 5.9 5.9 5.9 Voltage 6.0 VIN=VIH 3.7 3.84 3.98 IOUT ≤ 6.0 mA 4.5 5.2 5.34 5.48 6.0 IOUT ≤ 7.8 mA 0.1 0.1 0.1 VOL Maximum Low- VIN= VIL 2.0 0.1 0.1 0.1 Level Output IOUT ≤ 20 µA 4.5 0.1 0.1 0.1 Voltage 6.0 VIN= VIL 0.4 0.33 0.26 IOUT ≤ 6.0 mA 4.5 0.4 0.33 0.26 6.0 IOUT ≤ 7.8 mA IIN Maximum Input VIN=VCC or GND 6.0 ±0.1 ±1.0 ±1.0 Leakage Current in High- 6.0 IOZ Maximum Three- Output ±0.5 ±5.0 ±10 State State Leakage Impedance VIN= Current VIL or VIH VOUT=VCC or GND VIN=VCC ICC Maximum or GND 6.0 8.0 80 160 Quiescent Supply IOUT=0µA Current (per Package) 3 Unit V V V V µA µA µA IN74HC365 AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns) Guaranteed Limit VCC Symbol Parameter V 25 °C ≤85°C ≤125 to °C -55°C 180 150 120 tPLH, Maximum Propagation Delay, Input A to 2.0 36 30 24 tPHL Output Y (Figures 1 and 3) 4.5 31 26 20 6.0 330 275 220 tPLZ, Maximum Propagation Delay ,Output 2.0 66 55 44 tPHZ Enable to 4.5 56 47 37 6.0 Output Y (Figures 2 and 4) 330 275 220 tPZL, Maximum Propagation Delay ,Output 2.0 66 55 44 tPZH Enable to 4.5 56 47 37 6.0 Output Y (Figures 2 and 4) 90 75 60 tTLH, tTHL Maximum Output Transition Time, Any 2.0 18 15 12 4.5 Output 15 13 10 6.0 (Figures 1 and 3) CIN Maximum Input Capacitance 10 10 10 15 15 15 COUT Maximum Three-State Output Capacitance (Output in High-Impedance State) CPD Power Dissipation Capacitance (Per Buffer) Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC Figure 1. Switching Waveforms ns ns ns ns pF pF Typical @25°C,VCC=5.0 V 40 Figure 2. Switching Waveforms 4 Unit pF IN74HC365 Figure 3. Test Circuit Figure 4. Test Circuit EXPANDED LOGIC DIAGRAM (1/6 of the Device) 5