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(/#% %$!'"($% SLES034B − MARCH 2002 − REVISED JUNE 2004 FEATURES D Stereo DAC D PCM2901: Without S/PDIF D PCM2903: With S/PDIF D On-Chip USB Interface: − With Full-Speed Transceivers − Fully Compliant With USB 1.1 Specification − Certified by USB-IF − Partially Programmable Descriptors(1) − USB Adaptive Mode for Playback − USB Asynchronous Mode for Record − Self-Powered D 16-Bit Delta Sigma ADC and DAC D Sampling Rate: − DAC: 32, 44.1, 48 kHz − ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz D On-Chip Clock Generator: − With Single 12-MHz Clock Source D Single Power Supply: 3.3 V TYP D Stereo ADC − Analog Performance at VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V − THD+N = 0.01% − SNR = 89 dB − Dynamic Range = 89 dB − Decimation Digital Filter − Pass-Band Ripple = ±0.05 dB − Stop-Band Attenuation = –65 dB − Single-Ended Voltage Input − Antialiasing Filter Included − Digital LCF Included D D − Analog Performance at VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V − THD+N = 0.005% − SNR = 96 dB − Dynamic Range = 93 dB − Oversampling Digital Filter − Pass-Band Ripple = ±0.1 dB − Stop-Band Attenuation = –43 dB − Single-Ended Voltage Output − Analog LPF Included Multifunctions: − Human Interface Device (HID) Volume ± Control and Mute Control − Suspend Flag Package: 28-Pin SSOP APPLICATIONS D USB Audio Speaker D USB Headset D USB Monitor D USB Audio Interface Box DESCRIPTION The PCM2901/2903 is TI’s single-chip USB stereo audio codec with USB-compliant full-speed protocol controller and S/PDIF (only PCM2903). The USB protocol controller works with no software code, but the USB descriptors can be modified in some areas (for example, vendor ID/product ID). The PCM2901/2903 employs SpAct architecture, TI’s unique system that recovers the audio clock from USB packet data. On-chip analog PLLs with SpAct enable playback and record with low clock jitter and with independent playback and record sampling rates. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. (1)The descriptor can be modified by changing a mask. SpAct is a trademark of Texas Instruments, Incorporated. Other trademarks are the property of their respective owners. Copyright 2004, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(- !,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($% %$#,#!, 0#!!#$1!,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- www.ti.com www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGING ORDERING INFORMATION PCM2901 PRODUCT PACKAGE−LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PACKAGE MARKING PCM2901E SSOP-28 28DB −25°C to 85°C PCM2901E PACKAGE MARKING PCM2903E ORDERING NUMBER(1) TRANSPORT MEDIA PCM2901E Rails PCM2901E/2K Tape and reel (1) Models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2000 pieces of PCM2901E/2K gets a single 2000-piece tape and reel. PCM2903 PRODUCT PACKAGE−LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PCM2903E SSOP-28 28DB −25°C to 85°C ORDERING NUMBER(2) TRANSPORT MEDIA PCM2903E Rails PCM2903E/2K Tape and reel (2) Models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2000 pieces of PCM2903E/2K gets a single 2000-piece tape and reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) Supply voltage, VCCC, VCCP1, VCCP2, VCCX, VDD Supply voltage differences, VCCC, VCCP1, VCCP2, VCCX, VDD Ground voltage differences, AGNDC, AGNDP, AGNDX, DGND, DGNDU SEL0, SEL1, TEST0 (DIN)(2) Digital input voltage D+, D–, HID0, HID1, HID2, XTI, XTO, TEST1 (DOUT)(2), SSPND Analog input voltage VINL, VINR, VCOM, VOUTR, VOUTL Input current (any pins except supplies) PCM2901/PCM2903 UNIT –0.3 to 4 V ±0.1 V ±0.1 V −0.3 to 6.5 V −0.3 to (VDD + 0.3) < 4 V −0.3 to (VCCC + 0.3) < 4 V ±10 mA Ambient temperature under bias −40 to 125 °C Storage temperature, Tstg −55 to 150 °C Junction temperature TJ 150 °C Lead temperature (soldering) 260 °C, 5 s Package temperature (IR reflow, peak) 250 °C (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) ( ): PCM2903 2 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 ELECTRICAL CHARACTERISTICS all specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted PCM2901E, PCM2903E PARAMETER TEST CONDITIONS MIN TYP MAX UNIT UNIT Digital Input/Output Host interface Apply USB Revision 1.1, full speed Audio data format USB isochronous data format Input Logic D+, D− VIH High-level input voltage 2 XTI, HID0, HID1, and HID2 SEL0, SEL1 DIN, PCM2903 D+, D− VIL Low-level input voltage 0.7 VDD VDD VDD 2 5.25 0.7 VDD 5.25 VDD 0.8 XTI, HID0, HID1, and HID2 0.3VDD 0.8 SEL0, SEL1 DIN, PCM2903 D+, D−, XTI, SEL0, SEL1 IIH High-level input current HID0, HID1, and HID2 DIN, PCM2903 D+, D−, XTI, SEL0, SEL1 IIL Low-level input current HID0, HID1, and HID2 DIN, PCM2903 VDC VDC 0.3VDD ±10 VIN = 3.3 V VIN = 3.3 V VIN = 3.3 V VIN = 0 V 50 80 65 100 µA ±10 ±10 VIN = 0 V VIN = 0 V µA ±10 Output Logic D+, D− VOH High-level output voltage DOUT, PCM2903 SSPND 2.8 IOH = –4 mA IOH = –2 mA 2.8 VDC 2.8 D+, D− VOL Low-level output voltage DOUT, PCM2903 SSPND 0.3 IOL = 4 mA IOL = 2 mA 0.5 VDC 0.5 Clock Frequency Input clock frequency, XTI 11.994 12 12.006 MHz ADC Characteristics Resolution Audio data channel 8, 16 bits 1, 2 channel 3 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 ELECTRICAL CHARACTERISTICS all specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX =VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted PCM2901E, PCM2903E PARAMETER TEST CONDITIONS MIN TYP UNIT MAX UNIT Clock Frequency fS Sampling frequency DC Accuracy 8, 11.025, 16, 22.05, 32, 44.1, 48 ±5 kHz Gain mismatch channel-to-channel ±1 Gain error ±2 ±10 % of FSR Bipolar zero error ±0 % of FSR % of FSR Dynamic Performance(1) THD+N SNR Total harmonic distortion plus noise VIN = –0.5 dB VIN = –60 dB Dynamic range A-Weighted 81 89 dB Signal-to-noise ratio A-Weighted 81 89 dB 80 85 dB Channel separation 0.01% 0.02% 5% Analog Input 0.6 VCCC 0.5 VCCC 30 Input voltage Center voltage Input impedance Antialiasing filter frequency response –3 dB fIN = 20 kHz Vp−p V kΩ 150 kHz –0.08 dB Digital Filter Performance Pass band 0.454 fS Stop band 0.583 fS Hz ±0.05 Pass-band ripple Stop-band attenuation td –65 Delay time LCF frequency response –3 dB Hz dB dB 17.4/fS 0.078 fS s MHz DAC Characteristics Resolution Audio data channel 8, 16 bits 1, 2 channel Clock Frequency fS Sampling frequency (1) fIN = 1 kHz, using Audio Precision System II, RMS mode with 20-kHz LPF, 400-Hz HPF in calculation. 4 32, 44.1, 48 kHz www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 ELECTRICAL CHARACTERISTICS all specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted PCM2901E, PCM2903E PARAMETER TEST CONDITIONS MIN TYP UNIT MAX UNIT DC Accuracy Gain mismatch channel-to-channel ±1 Gain error ±2 ±10 % of FSR ±2 % of FSR Bipolar zero error Dynamic Performance(1) THD+N SNR % of FSR Total harmonic distortion plus noise VOUT = 0 dB VOUT = –60 dB Dynamic range EIAJ, A-weighted 87 93 dB Signal-to-noise ratio EIAJ, A-weighted 90 96 dB 86 92 dB Channel separation 0.005% ±5 0.016% 3% Analog Output VO 0.6 VCCC 0.5 VCCC Output voltage Center voltage Load impedance LPF frequency response AC coupling Vp−p V 10 –3 dB f = 20 kHz kΩ 250 kHz –0.03 dB Digital filter performance Pass band 0.445 fS Stop band 0.555 fS Hz ±0.1 Pass-band ripple Stop-band attenuation –43 td Delay time Power Supply Requirements PD 3 Supply current ADC, DAC operation Suspend mode(2) Power dissipation ADC, DAC operation Suspend mode(2) dB dB 14.3 fS Voltage range (VDD, VCCC, VCCP1, VCCP2, VCCX) Hz s 3.3 3.6 VDC 54 70 mA 252 mW µA 210 178 0.69 mW Temperature Range Operation temperature θJA Thermal resistance 28-pin SSOP (1) fOUT = 1 kHz, using Audio Precision System II, RMS mode with 20-kHz LPF, 400-Hz HPF. –25 85 100 _C °C/W (2) Under USB suspend state 5 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PIN ASSIGNMENTS PCM2901 (TOP VIEW) D+ D− VBUS DGNDU HID0 HID1 HID2 SEL0 SEL1 VCCC AGNDC VINL VINR VCOM 6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PCM2903 (TOP VIEW) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 SSPND VDD DGND TEST1 TEST0 VCCX AGNDX XTI XTO VCCP2 AGNDP VCCP1 VOUTL VOUTR D+ D− VBUS DGNDU HID0 HID1 HID2 SEL0 SEL1 VCCC AGNDC VINL VINR VCOM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 SSPND VDD DGND DOUT DIN VCCX AGNDX XTI XTO VCCP2 AGNDP VCCP1 VOUTL VOUTR www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PCM2901 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION AGNDC 11 − Analog ground for codec AGNDP 18 − Analog ground for PLL AGNDX 22 − Analog ground for oscillator D– 2 I/O D+ 1 I/O DGND 26 − Digital ground DGNDU 4 − Digital ground for USB transceiver HID0 5 I HID key state input (mute), active high(3) HID1 6 I HID key state input (volume up), active high(3) HID2 7 I SEL0 8 I HID key state input (volume down), active high(3) Must be set to high(5) SEL1 9 I Connected to the USB port of VBUS(5) SSPND 28 O Suspend flag, active low (Low: suspend, High: operational) TEST0 24 I Test pin, must be connected to GND TEST1 25 O Test pin, must be left open VBUS VCCC 3 − Must be connected to VDD 10 − VCCP1 VCCP2 17 − Analog power supply for codec(4) Analog power supply for PLL(4) 19 − Analog power supply for PLL(4) VCCX VCOM 23 − 14 − Analog power supply for oscillator(4) Common for ADC/DAC (VCCC/2) (4) VDD VINL 27 − Digital power supply(4) 12 I ADC analog input for L-channel VINR VOUTL 13 I ADC analog input for R-channel 16 O DAC analog output for L-channel VOUTR XTI 15 O 21 I DAC analog output for R-channel Crystal oscillator input(2) XTO (1) LV-TTL level 20 O Crystal oscillator output USB differential input/output minus(1) USB differential input/output plus(1) (2) 3.3-V CMOS level input (3) 3.3-V CMOS level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or volume down, which has no connection with the internal DAC or ADC directly. See the Interface #3 and End-Points sections. (4) Connect a decouple capacitor to GND (5) TTL Schmitt trigger, 5 V tolerant 7 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PCM2903 Terminal Functions TERMINAL NAME PIN I/O DESCRIPTIONS AGNDC 11 − Analog ground for codec AGNDP 18 − Analog ground for PLL AGNDX 22 − Analog ground for oscillator D– 2 I/O D+ 1 I/O DGND 26 − Digital ground DGNDU 4 − DIN 24 I Digital ground for USB transceiver S/PDIF input(5) DOUT 25 O S/PDIF output HID0 5 I HID key state input (mute), active high(3) HID1 6 I HID key state input (volume up), active high(3) HID2 7 I SEL0 8 I HID key state input (volume down), active high(3) Must be set to high(6) SEL1 9 I Connected to the USB port of VBUS(6) SSPND 28 O Suspend flag, active low (Low: suspend, High: operational) VBUS VCCC 3 − Must be connected to VDD 10 − VCCP1 VCCP2 17 − Analog power supply for codec(4) Analog power supply for PLL(4) 19 − Analog power supply for PLL(4) VCCX VCOM 23 − Analog power supply for oscillator(4) 14 − VDD VINL 27 − Common for ADC/DAC (VCCC/2) (4) Digital power supply(4) 12 I ADC analog input for L-channel VINR VOUTL 13 I ADC analog input for R-channel 16 O DAC analog output for L-channel VOUTR XTI 15 O 21 I DAC analog output for R-channel Crystal oscillator input(2) XTO (1) LV-TTL level 20 O Crystal oscillator output USB differential input/output minus(1) USB differential input/output plus(1) (2) 3.3-V CMOS level input (3) 3.3-V CMOS level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or volume down, which has no connection with the internal DAC or ADC directly. See the Interface #3 and End-Points sections. (4) Connect a decouple capacitor to GND (5) 3.3-V CMOS level input with internal pulldown, 5 V tolerant (6) TTL Schmitt trigger, 5 V tolerant 8 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PCM2901 FUNCTIONAL BLOCK DIAGRAM VCCC VCCP1 VCCP2 VCCX VDD AGNDC AGNDP AGNDX DGND DGNDU Power Manager TEST0 SSPND TEST1 VBUS FIFO ADC ISO-In End-Point Analog PLL Selector VCOM Analog PLL VOUTL FIFO DAC USB SIE VINR XCVR VINL D+ D− Control End-Point SEL0 SEL1 ISO-Out End-Point VOUTR HID End-Point HID0 HID1 HID2 USB Protocol Controller PLL (y8) XTI 12 MHz 96 MHz Tracker (SpAct) XTO 9 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PCM2903 FUNCTIONAL BLOCK DIAGRAM VCCC VCCP1 VCCP2 VCCX VDD AGNDC Lock AGNDX DGND DGNDU Power Manager SSPND S/PDIF Decoder VBUS VINL FIFO ADC ISO-In End-Point Analog PLL Selector VCOM Analog PLL VOUTL FIFO DAC USB SIE VINR XCVR DIN AGNDP D+ D− Control End-Point SEL0 SEL1 ISO-Out End-Point VOUTR DOUT HID End-Point S/PDIF Encoder USB Protocol Controller PLL (y8) XTI 12 MHz 10 XTO 96 MHz Tracker (SpAct) HID0 HID1 HID2 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PCM2901/2903 BLOCK DIAGRAM OF ANALOG FRONT-END (RIGHT CHANNEL) 4.7 µF + VINR 13 30 kΩ − − + (+) + (−) VCOM Delta-Sigma Modulator 14 + 10 µF (VCCC/2) Reference 11 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 TYPICAL CHARACTERISTICS ADC TOTAL HARMONIC DISTORTION + NOISE at −0.5 dB vs FREE-AIR TEMPERATURE DYNAMIC RANGE and SNR vs FREE-AIR TEMPERATURE 95 0.09 0.009 Dynamic Range and SNR − dB THD+N − Total Harmonic Distortion + Noise − % 0.10 0.010 0.08 0.008 0.07 0.007 0.06 0.006 0.05 0.005 93 91 Dynamic Range 89 SNR 87 0.04 0.004 0.03 0.003 −50 −25 0 25 50 75 85 −50 100 −25 TA − Free-Air Temperature − °C Figure 1 25 50 75 100 Figure 2 TOTAL HARMONIC DISTORTION + NOISE at −0.5 dB vs SUPPLY VOLTAGE DYNAMIC RANGE and SNR vs SUPPLY VOLTAGE 95 0.10 0.010 0.09 0.009 Dynamic Range and SNR − dB THD+N − Total Harmonic Distortion + Noise − % 0 TA − Free-Air Temperature − °C 0.08 0.008 0.07 0.007 0.06 0.006 0.05 0.005 93 91 Dynamic Range 89 SNR 87 0.04 0.004 0.03 0.003 2.8 3.0 3.2 3.4 VCC − Supply Voltage − V Figure 3 3.6 3.8 85 2.8 3.0 3.2 3.4 3.6 3.8 VCC − Supply Voltage − V Figure 4 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 12 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 ADC (CONTINUED) TOTAL HARMONIC DISTORTION + NOISE at −0.5 dB vs SAMPLING FREQUENCY DYNAMIC RANGE and SNR vs SAMPLING FREQUENCY 95 0.09 0.009 Dynamic Range and SNR − dB THD+N − Total Harmonic Distortion + Noise − % 0.10 0.010 0.08 0.008 0.07 0.007 0.06 0.006 0.05 0.005 93 91 Dynamic Range 89 SNR 87 0.04 0.004 0.03 0.003 85 30 35 40 45 50 30 35 fS − Sampling Frequency − kHz 40 45 50 fS − Sampling Frequency − kHz Figure 5 Figure 6 DAC TOTAL HARMONIC DISTORTION + NOISE at 0 dB vs FREE-AIR TEMPERATURE DYNAMIC RANGE and SNR vs FREE-AIR TEMPERATURE 98 97 0.07 0.007 Dynamic Range and SNR − dB THD+N − Total Harmonic Distortion + Noise − % 0.08 0.008 0.06 0.006 0.05 0.005 0.04 0.004 SNR 96 95 Dynamic Range 94 93 92 91 0.03 0.003 −50 −25 0 25 50 TA − Free-Air Temperature − °C Figure 7 75 100 90 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C Figure 8 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 13 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 DAC (CONTINUED) DYNAMIC RANGE and SNR vs SUPPLY VOLTAGE TOTAL HARMONIC DISTORTION + NOISE at 0 dB vs SUPPLY VOLTAGE 98 97 0.07 0.007 Dynamic Range and SNR − dB THD+N − Total Harmonic Distortion + Noise − % 0.08 0.008 0.06 0.006 0.05 0.005 0.04 0.004 SNR 96 95 Dynamic Range 94 93 92 91 0.03 0.003 3.0 3.1 3.2 3.3 3.4 3.5 90 3.0 3.6 3.2 3.3 3.4 3.5 3.6 VCC − Supply Voltage − V VCC − Supply Voltage − V Figure 9 Figure 10 DYNAMIC RANGE and SNR vs SAMPLING FREQUENCY TOTAL HARMONIC DISTORTION + NOISE at 0 dB vs SAMPLING FREQUENCY 98 0.08 0.008 97 0.07 0.007 Dynamic Range and SNR − dB THD+N − Total Harmonic Distortion + Noise − % 3.1 0.06 0.006 0.05 0.005 0.04 0.004 SNR 96 95 94 Dynamic Range 93 92 91 90 0.03 0.003 30 35 40 45 fS − Sampling Frequency − kHz Figure 11 50 30 35 40 45 50 fS − Sampling Frequency − kHz Figure 12 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 14 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 ADC OUTPUT SPECTRUM OUTPUT SPECTRUM (−60 dB, N = 8192) 0 −20 −20 −40 −40 Amplitude − dB Amplitude − dB OUTPUT SPECTRUM (−0.5 dB, N = 8192) 0 −60 −80 −60 −80 −100 −100 −120 −120 −140 −140 0 5 10 15 20 0 5 f − Frequency − kHz 10 15 20 f − Frequency − kHz Figure 13 Figure 14 DAC OUTPUT SPECTRUM OUTPUT SPECTRUM (−60 dB, N = 8192) 0 −20 −20 −40 −40 Amplitude − dB Amplitude − dB OUTPUT SPECTRUM (0 dB, N = 8192) 0 −60 −80 −60 −80 −100 −100 −120 −120 −140 −140 0 5 10 f − Frequency − kHz Figure 15 15 20 0 5 10 15 20 f − Frequency − kHz Figure 16 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 15 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 SUPPLY CURRENT OPERATIONAL SUPPLY CURRENT vs SAMPLING FREQUENCY 1.6 80 70 1.4 70 60 1.2 Operational 50 1.0 40 0.8 30 0.6 20 0.4 Suspend 10 0 3.0 0.2 3.1 3.2 3.3 3.4 3.5 0.0 3.6 ICC − Operational Supply Current − mA 80 ICC − Suspend Supply Current − mA ICC − Operational Supply Current − mA OPERATIONAL and SUSPEND SUPPLY CURRENT vs SUPPLY VOLTAGE 60 50 ADC and DAC 40 30 20 10 0 30 35 40 45 VDD, VCCC, VCCP1, VCCP2, VCCX − Supply Voltage − V fS − Sampling Frequency − kHz Figure 17 Figure 18 50 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 16 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 ADC DIGITAL DECIMATION FILTER FREQUENCY RESPONSE OVERALL CHARACTERISTIC STOP-BAND ATTENUATION 0 0 −10 −20 −20 −40 Amplitude − dB Amplitude − dB −30 −60 −80 −100 −40 −50 −60 −70 −120 −80 −140 −90 −160 0 8 16 24 −100 0.0 32 0.2 0.4 Frequency [y fS] Figure 19 1.0 TRANSITION-BAND RESPONSE 0.2 0 −0.0 0.0 −4 Amplitude − dB Amplitude − dB 0.8 Figure 20 PASS-BAND RIPPLE −0.2 −0.4 −0.6 −0.8 0.0 0.6 Frequency [y fS] −8 −12 −16 0.1 0.2 0.3 Frequency [y fS] Figure 21 0.4 0.5 −20 0.46 0.48 0.50 0.52 0.54 Frequency [y fS] Figure 22 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 17 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 ADC DIGITAL HIGH-PASS FILTER FREQUENCY RESPONSE STOP-BAND CHARACTERISTIC PASS-BAND CHARACTERISTIC −0.0 0.0 0 −10 −0.2 −20 Amplitude − dB Amplitude − dB −30 −40 −50 −60 −0.4 −0.6 −70 −0.8 −80 −90 −100 0.0 −1.0 0.1 0.2 0.3 0.4 0 1 Frequency [x fS/1000] 2 3 4 Frequency [x fS/1000] Figure 23 Figure 24 ADC ANALOG ANTIALIASING FILTER FREQUENCY RESPONSE PASS-BAND CHARACTERISTIC −0.0 0.0 −10 −0.2 Amplitude − dB Amplitude − dB STOP-BAND CHARACTERISTIC 0 −20 −30 −40 −0.4 −0.6 −0.8 −50 1 10 100 f − Frequency − kHz Figure 25 1k 10k −1.0 0.01 0.1 1 10 100 f − Frequency − kHz Figure 26 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 18 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 DAC DIGITAL INTERPOLATION FILTER FREQUENCY RESPONSE PASS-BAND RIPPLE STOP-BAND ATTENUATION 0.2 0 −10 −0.0 0.0 −20 Amplitude − dB Amplitude − dB −30 −40 −50 −60 −0.2 −0.4 −70 −0.6 −80 −90 −100 0 1 2 3 4 −0.8 0.0 0.1 0.2 Frequency [x fS] 0.3 0.4 0.5 Frequency [x fS] Figure 27 Figure 28 TRANSITION-BAND RESPONSE 0 −2 −4 Amplitude − dB −6 −8 −10 −12 −14 −16 −18 −20 0.46 0.47 0.48 0.49 0.50 0.51 0.52 0.53 0.54 Frequency [x fS] Figure 29 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 19 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 DAC ANALOG FIR FILTER FREQUENCY RESPONSE PASS-BAND CHARACTERISTIC 0.2 −10 −0.0 0.0 Amplitude − dB Amplitude − dB STOP-BAND CHARACTERISTIC 0 −20 −30 −40 −0.2 −0.4 −0.6 −50 0 8 16 24 −0.8 0.0 32 0.1 0.2 Frequency [x fS] 0.3 0.4 0.5 Frequency [x fS] Figure 30 Figure 31 DAC ANALOG LOW-PASS FILTER FREQUENCY RESPONSE PASS-BAND CHARACTERISTIC −0.0 0.0 −10 −0.2 Amplitude − dB Amplitude − dB STOP-BAND CHARACTERISTIC 0 −20 −30 −40 −0.4 −0.6 −0.8 −50 1 10 100 f − Frequency − kHz Figure 32 1k 10k −1.0 0.01 0.1 1 10 100 f − Frequency − kHz Figure 33 All specifications at TA = 25°C, VDD = VCCC = VCCP1= VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted. 20 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 USB INTERFACE Control data and audio data are transferred to the PCM2901/2903 via D+ (pin 1) and D– (pin 2). All data to/from the PCM2901/2903 is transferred at full speed. The device descriprtor contains the information described in Table 1. The device descriptor can be modified on request; contact a Texas Instruments representative for details. Table 1. Device Descriptor USB revision 1.1 compliant Device class 0x00 (device defined interface level) Device sub class 0x00 (not specified) Device protocol 0x00 (not specified) Max packet size for end-point 0 8 byte Vendor ID 0x08BB (default value, can be modified) Product ID 0x2901 / 0x2903 (default value, can be modified) Device release number 1.0 (0x0100) Number of configurations 1 Vendor strings String #1 (see Table 3) Product strings String #2 (see Table 3) Serial number Not supported The configuration descriptor contains the information described in Table 2. The configuration descriptor can be modified on request; contact a Texas Instruments representative for details. Table 2. Configuration Descriptor Interface Four interfaces Power attribute 0xC0 (Self-powered, no remote wakeup) Maximum power 0x00 (0 mA. Default value, can be modified) The string descriptor contains the information described in Table 3. The string descriptor can be modified on request; contact a Texas Instruments representative for details. Table 3. String Descriptor #0 0x0409 #1 Burr-Brown from TI (default value, can be modified) #2 USB audio codec (default value, can be modified) 21 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 DEVICE CONFIGURATION Figure 34 illustrates the USB audio function topology. The PCM2901/2903 has four interfaces. Each interface is constructed by alternative settings. End-Point #0 Default End-Point FU End-Point #2 (IF #1) Analog Out IT TID1 Audio Streaming Interface End-Point #4 (IF #2) OT TID2 UID3 Analog In OT TID5 IT TID4 Audio Streaming Interface Standard Audio Control Interface (IF #0) End-Point #5 (IF #3) HID Interface PCM2901/2903 Figure 34. USB Audio Function Topology 22 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 Interface #0 Interface #0 is defined as the control interface. Alternative setting #0 is the only possible setting for interface #0. Alternative setting #0 describes the standard audio control interface. A terminal constructs the audio control interface. The PCM2901/2903 has the following five terminals. D D D D D Input terminal (IT #1) for isochronous-out stream Output terminal (OT #2) for audio analog output Feature unit (FU #3) for DAC digital attenuator Input terminal (IT #4) for audio analog input Output terminal (OT #5) for isochronous-in stream Input terminal #1 is defined as USB stream (terminal type 0x0101). Input terminal #1 can accept 2-channel audio streams constructed by left and right channels. Output terminal #2 is defined as a speaker (terminal type 0x0301). Input terminal #4 is defined as microphone (terminal type 0x0201). Output terminal #5 is defined as a USB stream (terminal type 0x0101). Output terminal #5 can generate 2-channel audio streams constructed by left and right channels. Feature unit #3 supports the following sound control features. D Volume control D Mute control The built-in digital volume controller can be manipulated by an audio class specific request from 0 dB to –64 dB in 1-dB steps. Changes are made by incrementing or decrementing by one step (1 dB) for every 1/fS time interval until the volume level has reached the requested value. Each channel can be set for different values. The master volume control is not supported. A request to the master volume is stalled and ignored. The built-in digital mute controller can be manipulated by audio class specific request. A master mute control request is acceptable. A request to an individual channel is stalled and ignored. Interface #1 Interface #1 is defined as the audio streaming data-out interface. Interface #1 has the following seven alternative settings. Alternative setting #0 is the zero bandwidth setting. ALTERNATIVE SETTING DATA FORMAT 00 TRANSFER MODE SAMPLING RATE (kHz) Zero bandwidth 01 16 bit Stereo 2s complement (PCM) Adaptive 32, 44.1, 48 02 16 bit Mono 2s complement (PCM) Adaptive 32, 44.1, 48 03 8 bit Stereo 2s complement (PCM) Adaptive 32, 44.1, 48 04 8 bit Mono 2s complement (PCM) Adaptive 32, 44.1, 48 05 8 bit Stereo Offset binary (PCM8) Adaptive 32, 44.1, 48 06 8 bit Mono Offset binary (PCM8) Adaptive 32, 44.1, 48 23 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 Interface #2 Interface #2 is defined as the audio streaming data-in interface. Interface #2 has the following 19 alternative settings. Alternative setting #0 is the zero bandwidth setting. All other alternative settings are operational settings. ALTERNATIVE SETTING DATA FORMAT 00 TRANSFER MODE SAMPLING RATE (kHz) 48 Zero Bandwidth 01 16 bit Stereo 2s complement (PCM) Asynchronous 02 03 16 bit Mono 2s complement (PCM) Asynchronous 48 16 bit Stereo 2s complement (PCM) Asynchronous 44.1 04 16 bit Mono 2s complement (PCM) Asynchronous 44.1 05 16 bit Stereo 2s complement (PCM) Asynchronous 32 06 16 bit Mono 2s complement (PCM) Asynchronous 32 07 16 bit Stereo 2s complement (PCM) Asynchronous 22.05 08 16 bit Mono 2s complement (PCM) Asynchronous 22.05 09 16 bit Stereo 2s complement (PCM) Asynchronous 16 0A 16 bit Mono 2s complement (PCM) Asynchronous 16 0B 8 bit Stereo 2s complement (PCM) Asynchronous 16 0C 8 bit Mono 2s complement (PCM) Asynchronous 16 0D 8 bit Stereo 2s complement (PCM) Asynchronous 8 0E 8 bit Mono 2s complement (PCM) Asynchronous 8 0F 16 bit Stereo 2s complement (PCM) Synchronous 11.025 10 16 bit Mono 2s complement (PCM) Synchronous 11.025 11 8 bit Stereo 2s complement (PCM) Synchronous 11.025 12 8 bit Mono 2s complement (PCM) Synchronous 11.025 Interface #3 Interface #3 is defined as the interrupt data-in interface. Alternative setting #0 is the only possible setting for interface #3. Interface #3 constructs the HID consumer control device. Interface #3 reports the following three key statuses. D Mute (0xE209) D Volume up (0xE909) D Volume down (0xEA09) End-Points The PCM2901/2903 has the following four end-points. D D D D Control end-point (EP #0) Isochronous-out audio data stream end-point (EP #2) Isochronous-in audio data stream end-point (EP #4) HID end-point (EP #5) The control end-point is a default end-point. The control end-point is used to control all functions of the PCM2901/2903 by the standard USB request and USB audio class specific request from the host. The isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data stream end-point is an audio source end-point, which transmits the PCM audio data. The isochronous-in audio data stream end-point uses asynchronous transfer mode. The HID end-point is an interrupt-in end-point. HID end-point reports HID0, HID1, and HID2 pin status every 32 ms. The human interface device (HID) pins are defined as consumer control devices. The HID function is designed as an independent end-point from both isochronous-in and -out end-points. This means that the result of affection for the HID operation depends on the host software. Typically, the HID function is affected for the primary audio-out device. 24 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 Clock and Reset The PCM2901/2903 requires a 12-MHz (±500 ppm) clock for the USB and audio function, which can be generated by a built-in crystal oscillator with a 12-MHz crystal resonator or supplied by an external clock. The 12-MHz crystal resonator must be connected to XTI (pin 21) and XTO (pin 20) with one high (1-MΩ) resistor and two small capacitors, the capacitance of which depends on the load capacitance of the crystal resonator. If the external clock is used, the clock must be supplied to XTI, and XTO must be open. The PCM2901/2903 has an internal power-on reset circuit, which works automatically when VDD (pin 27) exceeds 2.5 V typical (2.7 V to 2.2 V) and about 700 µs is required until internal reset release. Digital Audio Interface (PCM2903) The PCM2903 employs both S/PDIF input and output. Isochronous-out data from the host is encoded to the S/PDIF output and the DAC analog output. Input data is selected as either S/PDIF or ADC analog input. When the device detects an S/PDIF input and successfully locks on the received data, the isochronous-in transfer data source is automatically selected from S/PDIF itself; otherwise, the data source is selected to ADC analog input. Supported Input Data (PCM2903) The following data formats are accepted by the S/PDIF input and output. All other data formats are unable to use S/PDIF. D 48-kHz 16-bit stereo D 44.1-kHz 16-bit stereo D 32-kHz 16-bit stereo Mismatch between input data format and host command may cause unexpected results except in the following conditions. D Record monaural format from stereo data input at the same data rate D Record 8-bit format from 16-bit data input at the same data rate A combination between the above conditions is not accepted. For the playback, all possible data rate source is converted to 16-bit stereo format at the same source data rate. Channel Status Information (PCM2903) The channel status information is fixed as consumer application, PCM mode, copyright, and digital/digital converter. All other bits are fixed as 0s except for the sample frequency, which is set automatically according to the data received through the USB. Copyright Management (PCM2903) Isochronous-in data is affected by the serial copy management system (SCMS). Where receiving digital audio data that is indicated as original data in the control bit, input digital audio data transfers to the host. If the data is indicated as first generation or higher, transferred data is selected to analog input. Digital audio data output is always encoded as original with SCMS control. The implementation of this feature is an option for the customer. Note that it is the user’s responsibility whether they implement this feature in their product or not. INTERFACE SEQUENCE Power On, Attach, and Playback Sequence The PCM2901/2903 is ready for setup when the reset sequence has finished and the USB bus is attached. In order to perform certain reset sequences defined in the USB specification, VDD, VCCC, VCCP1, VCCP2, and VCCX must rise up with 10 ms / 3.3 V. After connection has been established by setup, the PCM2901/2903 is ready to accept USB audio data. While waiting, the audio data (idle state) and analog output are set to bipolar zero (BPZ). 25 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 When receiving the audio data, the PCM2901/2903 stores the first audio packet, which contained 1-ms audio data, into the internal storage buffer. The PCM2901/2903 starts playing the audio data when detecting the following start of frame (SOF) packet. VDD (Pin 27) ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ 3.3 V (Typ.) 2.5 V (Typ.) 0V SEL1 (Pin 9) Bus Idle D+/D− SSPND VOUTL VOUTR 700 µs 5 V = VBUS (Typ.) ÓÓ ÓÓ ÓÓ ÓÓ ÓÓ ÓÓ ÓÓÓ Ó ÓÓÓ ÓÓ ÓÓ ÓÓÓÓÓÓ ÓÓ ÓÓÓ ÓÓÓÓ Bus Reset 1st Audio Data Set Configuration SOF SOF BPZ Device Setup 1 ms Internal Reset Ready for Setup Ready for Playback Attach (Connect to USB Bus) Figure 35. Attach After Power-On 26 2nd Audio Data SOF www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 VDD (Pin 27) ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓ ÓÓ ÓÓ Ó ÓÓÓ ÓÓ ÓÓ ÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓ ÓÓ ÓÓ ÓÓ ÓÓ ÓÓ Ó ÓÓÓÓ ÓÓÓÓÓ ÓÓÓÓ ÓÓ ÓÓ ÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ ÓÓÓ 3.3 V (Typ.) 2.5 V (Typ.) 0V 5 V = VBUS (Typ.) SEL1 (Pin 9) Bus Reset 1st Audio Data Set Configuration 2nd Audio Data Bus Idle D+/D− SOF SSPND VOUTL VOUTR SOF SOF BPZ 700 µs Device Setup 1 ms Internal Reset Ready for Setup Ready for Playback Figure 36. Power-On Under Attach Play, Stop, and Detach Sequence When the host finishes or aborts the playback, the PCM2901/2903 stops playing after the last audio data has played. Record Sequence The PCM2901/2903 starts the audio capture into the internal memory after receiving the SET_INTERFACE command. Suspend and Resume Sequence The PCM2901/2903 enters the suspend state after it sees a constant idle state on the USB bus, approximately 5 ms. While the PCM2901/2903 enters the suspend state, the SSPND flag (pin 28) is asserted. The PCM2901/2903 wakes up immediately after detecting a non-idle state on the USB bus. 27 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 5 V = VBUS (Typ.) SEL1 (Pin 9) Audio Data D+/D− Audio Data Last Audio Data ÓÓ ÓÓ Ó ÓÓÓ ÓÓ ÓÓÓ ÓÓ ÓÓ ÓÓÓÓ ÓÓÓÓÓÓ ÓÓÓÓÓ ÓÓ SOF SOF SOF SOF SOF VOUTL VOUTR Detach 1 ms Figure 37. Play, Stop, and Detach SET_INTERFACE D+/D− ÓÓÓ ÓÓÓ SOF Audio Data IN Token IN Token Audio Data IN Token Audio Data ÓÓÓÓ ÓÓÓÓ ÓÓÓÓÓ ÓÓÓ Ó Ó ÓÓÓÓ ÓÓÓÓ ÓÓÓÓÓ Ó ÓÓÓÓ SOF SOF SOF SOF VINL VINR 1 ms ÓÓ ÓÓ ÓÓ D+/D− SSPND Active Figure 38. Record Sequence Idle 5 ms ÓÓ ÓÓ ÓÓ Suspend Figure 39. Suspend and Resume 28 Active www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PCM2901 TYPICAL CIRCUIT CONNECTION Figure 40 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information only. The whole board design should be considered to meet the USB specification as a USB compliant product. VDD (3.3 V) VCC (3.3 V) 1.5 kΩ x 3 IC1 1.5 kΩ PCM2901 22 Ω D+ 22 Ω D− VBUS GND C1 1 MΩ C9 C10 C2 1 D+ SSPND 28 2 D− VDD 27 3 VBUS DGND 26 4 DGNDU TEST1 25 5 HID0 TEST0 24 6 HID1 VCCX 23 7 HID2 AGNDX 22 8 SEL0 XTI 21 9 SEL1 XTO 20 10 VCCC VCCP2 19 11 AGNDC AGNDP 18 12 VINL VCCP1 17 13 VINR VOUTL 16 14 VCOM VOUTR 15 C3 C4 C5 1 MΩ C6 12 MHz C7 MUTE/ Power Down C8 C11 C12 LPF, Amp LPF, Amp NOTE: IC1 must be driven by VDD with a 5-V tolerant input. C1, C2, C3, C4, C7, C8: 10 µF C5, C6: 10 pF to 33 pF (depending on crystal resonator) C9, C10, C11, C12: The capacitance may vary depending on design. Figure 40. Self-Powered Configuration 29 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 PCM2903 TYPICAL CIRCUIT CONNECTION Figure 41 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information only. The whole board design should be considered to meet the USB specification as a USB compliant product. VDD (3.3 V) VCC (3.3 V) 1.5 kΩ x 3 IC1 1.5 kΩ PCM2903 22 Ω D+ 22 Ω D− VBUS GND C1 1 MΩ C9 C10 C2 1 D+ SSPND 28 2 D− VDD 27 3 VBUS DGND 26 4 DGNDU DOUT 25 5 HID0 DIN 24 6 HID1 VCCX 23 7 HID2 AGNDX 22 8 SEL0 XTI 21 9 SEL1 XTO 20 C3 C4 C5 1 MΩ C6 12 MHz 10 VCCC VCCP2 19 11 AGNDC AGNDP 18 12 VINL VCCP1 17 13 VINR VOUTL 16 14 VCOM VOUTR 15 C7 MUTE/ Power Down C8 C11 C12 LPF, Amp LPF, Amp NOTE: IC1 must be driven by VDD with a 5-V tolerant input. C1, C2, C3, C4, C7, C8: 10 µF C5, C6: 10 pF to 33 pF (depending on crystal resonator) C9, C10, C11, C12: The capacitance may vary depending on design. Figure 41. Self-Powered Configuration 30 www.ti.com SLES034B − MARCH 2002 − REVISED JUNE 2004 APPLICATION INFORMATION OPERATING ENVIRONMENT To get the appropriate operation, one of the following operating systems must be working on the host PC that has the USB port assured by the manufacturer. If the condition is fulfilled, the operation of the PCM2901/2903 does not depend on the operating speed of the CPU. Texas Instruments has confirmed following operating environments. D Operating System − Microsoft Windows 98/98SE/Me Japanese/English Edition − Microsoft Windows 2000 Professional Japanese/English Edition − Microsoft Windows XP Home/Professional Japanese/English Edition (For Windows XP, use the latest version of the USB audio driver that is available on Windows update site) − Apple Computer Mac OS 9.1 or later Japanese/English Edition − Apple Computer Mac OS X 10.0 or later English Edition − Apple Computer Mac OS X 10.1 or later Japanese Edition (For Mac OS X 10.0 Japanese Edition, plug and play does not work for USB audio device appropriately) D PC: Following PC-AT compatible computers for above OS (OS requirement must be met) − Motherboard using Intel 440BX or ZX chipset (using USB controller in the chipset) − Motherboard using Intel i810 chipset (using USB controller in the chipset) − Motherboard using Intel i815 chipset (using USB controller in the chipset) − Motherboard using Intel i820 chipset (using USB controller in the chipset) − Motherboard using Intel i845 chipset (using USB controller in the chipset) − Motherboard using Intel i850 chipset (using USB controller in the chipset) − Motherboard using Apollo KT133 chipset (using USB controller in the chipset) − Motherboard using Apollo Pro plus chipset (using USB controller in the chipset) − Motherboard using MVP4 or MVP3 chipset (using USB controller in the chipset) − Motherboard using Aladdin V chipset (using USB controller in the chipset) − Motherboard using SiS530 or SiS559 chipset (using USB controller in the chipset) − Motherboard using SiS735 chipset (using USB controller in the chipset) NOTE: The OSs and PCs for which the operation of the PCM2901/2903 was confirmed are listed above. The PCM2901/2903 may also work with other OSs and PCs that have not been tested. Furthermore, there is no assurance that the PCM2901/2903 will work with every PC having a compatible chipset, because other design factors of the motherboard may also cause incompatibility. The PCM2901/2903 has been acknowledged in the USB compliance test. However, the acknowledgement is just for the PCM2901/2903 from Texas Instruments. Be careful that the acknowledgement is not for the customer’s USB system using the PCM2901/2903. Intel is a trademark of Intel Corporation. Microsoft, Windows, Windows Me, and Windows XP are trademarks of Microsoft Corporation. Apple. Mac, and Mac OS are trademarks of Apple Computer, Inc. 31 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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