SN74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997 D D D D D OR N PACKAGE (TOP VIEW) Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 12-Bit Array Structure Suited for Bus-Oriented Systems Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device consists of a 12-bit high-speed Schottky diode array suitable for clamping to VCC and/or GND. VCC D01 D02 D03 D04 D05 D06 GND 1 16 2 15 3 14 4 13 5 12 D11 14 VCC D12 D11 D10 D09 D08 D07 GND 6 11 7 10 8 9 D12 15 VCC 1 The SN74S1051 is characterized for operation from 0°C to 70°C. schematic diagrams D01 2 D02 3 D03 4 D04 5 D05 6 D06 7 D07 8 D08 9 D09 12 D10 13 8 GND VCC 16 9 GND Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Steady-state reverse voltage, VR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Continuous forward current, IF: Any D terminal from GND or to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total through all GND or VCC terminals . . . . . . . . . . . . . . . . . . . . . . . 170 mA Repetitive peak forward current‡, IFRM: Any D terminal from GND or VCC . . . . . . . . . . . . . . . . . . . . . 200 mA Total through all GND or VCC terminals . . . . . . . . . . . . . . . . . . . . 1 A Continuous total power dissipation at (or below) 25°C free-air temperature (see Note 1) . . . . . . . . . . 625 mW Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ These values apply for tw ≤ 100 µs, duty cycle ≤ 20%. NOTE 1: For operation above 25°C free-air temperature, derate linearly at the rate of 5 m/W/°C. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) single-diode operation (see Note 2) TYP§ MAX To VCC IF = 18 mA IF = 50 mA 0.85 1.05 1.05 1.3 From GND IF = 18 mA IF = 50 mA 0.75 0.95 0.95 1.2 IF = 200 mA 1.45 PARAMETER VF VFM TEST CONDITIONS Static forward voltage Peak forward voltage IR Static reverse current Ct Total capacitance To VCC MIN VR = 0 V, VR = 2 V, V V 5 VR = 7 V From GND UNIT 5 f = 1 MHz 8 16 f = 1 MHz 4 8 µA pF § All typical values are at VCC = 5 V, TA = 25°C. NOTE 2: Test conditions and limits apply separately to each of the diodes. The diodes not under test are open-circuited during the measurement of these characteristics. multiple-diode operation PARAMETER Ix Internal crosstalk current TEST CONDITIONS MIN TYP§ MAX Total IF current = 1 A, See Note 3 0.8 2 Total IF current = 198 mA, See Note 3 0.02 0.2 UNIT mA § All typical values are at VCC = 5 V, TA = 25°C. NOTE 3: Ix is measured under the following conditions with one diode static, all others switching: Switching diodes: tw = 100 µs, duty cycle = 20% Static diode: VR = 5 V The static diode input current is the internal crosstalk current Ix. switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 and 2) PARAMETER trr 2 Reverse recovery time TEST CONDITIONS IF = 10 mA, IRM(REC) = 10 mA, POST OFFICE BOX 655303 IR(REC) = 1 mA, • DALLAS, TEXAS 75265 MIN RL = 100 Ω TYP MAX 8 16 UNIT ns SN74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997 PARAMETER MEASUREMENT INFORMATION 50 Ω (See Note A) 450 Ω Pulse Generator Sampling Oscilloscope (See Note B) DUT 90% VFM VF Output Waveform (See Note B) Input Pulse (See Note A) 10% tr NOTES: A. The input pulse is supplied by a pulse generator having the following characteristics: tr = 20 ns, ZO = 50 Ω, freq = 500 Hz, duty cycle = 1%. B. The output waveform is monitored by an oscilloscope having the following characteristics: tr ≤ 350 ps, Ri = 50 Ω, Ci ≤ 5 pF. Figure 1. Forward Recovery Voltage DUT (See Note A) Pulse Generator IF Sampling Oscilloscope If tf 10% (See Note B) trr 0 Output Waveform (See Note B) IR(REC) Input Pulse (See Note A) 90% IRM(REC) NOTES: A. The input pulse is supplied by a pulse generator having the following characteristics: tf = 0.5 ns, ZO = 50 Ω, tw ≥ 50 ns, duty cycle = 1%. B. The output waveform is monitored by an oscilloscope having the following characteristics: tr ≤ 350 ps, Ri = 50 Ω, Ci ≤ 5 pF. Figure 2. Reverse Recovery Time POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997 APPLICATION INFORMATION Large negative transients occurring at the inputs of memory devices (DRAMs, SRAMs, EPROMs, etc.) or on the CLOCK lines of many clocked devices can result in improper operation of the devices. The SN74S1051 diode termination array helps suppress negative transients caused by transmission-line reflections, crosstalk, and switching noise. Diode terminations have several advantages when compared to resistor termination schemes. Split resistor or Thevenin equivalent termination can cause a substantial increase in power consumption. The use of a single resistor to ground to terminate a line usually results in degradation of the output high level, resulting in reduced noise immunity. Series damping resistors placed on the outputs of the driver reduce negative transients, but they also can increase propagation delays down the line, as a series resistor reduces the output drive capability of the driving device. Diode terminations have none of these drawbacks. The operation of the diode arrays in reducing negative transients is explained in the following figures. The diode conducts current when the voltage reaches a negative value large enough for the diode to turn on. Suppression of negative transients is tracked by the current-voltage characteristic curve for that diode. Typical current-versus-voltage curves for the SN74S1051 are shown in Figures 3 and 4. To illustrate how the diode arrays act to reduce negative transients at the end of a transmission line, the test setup in Figure 5 was evaluated. The resulting waveforms with and without the diode are shown in Figure 6. The maximum effectiveness of the diode arrays in suppressing negative transients occurs when the diode arrays are placed at the end of a line and/or the end of a long stub branching off a main transmission line. The diodes also can be used to reduce the negative transients that occur due to discontinuities in the middle of a line. An example of this is a slot in a backplane that is provided for an add-on card. DIODE FORWARD CURRENT vs DIODE FORWARD VOLTAGE –100 TA = 25°C –90 I I – Forward Current – mA –80 –70 –60 –50 –40 –30 –20 –10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VI – Forward Voltage – V Figure 3. Typical Input Current vs Input Voltage (Lower Diode) 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997 DIODE FORWARD CURRENT vs DIODE FORWARD VOLTAGE 100 TA = 25°C 90 I I – Forward Current – mA 80 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VI – Forward Voltage – V Figure 4. Typical Input Current vs Input Voltage (Upper Diode) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997 APPLICATION INFORMATION ZO = 50 Ω Length = 36 in. Figure 5. Diode Test Setup 56.500 ns 31.500 ns End-ofLine Without Diode 81.500 ns End-of-Line With Diode Vmarker 1 Vmarker 2 Ch 2 Timebase Memory 1 Vmarker 1 Vmarker 2 Offset = 0.000 V Delay = 56.500 ns Delta V = –2.293 V = 1.880 V/div = 5.00 ns/V = 1.880 V/div = –1.353 V = –3.647 V Figure 6. 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