ID100 ID101 MONOLITHIC DUAL PICO AMPERE DIODES Linear Integrated Systems FEATURES DIRECT REPLACEMENT FOR INTERSIL ID100 & ID101 REVERSE LEAKAGE CURRENT IR = 0.1pA REVERSE BREAKDOWN VOLTAGE BVR ≥ 30V REVERSE CAPACITANCE Crss = 0.75pF ID100 ID101 TO-78 BOTTOM VIEW TO-71 BOTTOM VIEW 1 ABSOLUTE MAXIMUM RATINGS @ 25 °C (unless otherwise stated) NC Maximum Temperatures A1 Storage Temperature -65 to +200 °C Operating Junction Temperature -55 to +150 °C 3 2 K1 NC 5 6 1 7 A2 K2 NC A1 K1 3 NC 5 2 6 1 7 A2 K2 Maximum Power Dissipation Continuous Power Dissipation 300mW Maximum Currents Forward Current 20mA Reverse Current 100µA Maximum Voltages Reverse Voltage 30V Diode to Diode Voltage ±50V ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL BVR VF IR CHARACTERISTIC MIN Reverse Breakdown Voltage 30 Forward Voltage 0.8 Reverse Leakage Current |IR1-IR2| Differential Leakage Current Crss Total Reverse Capacitance2 Linear Integrated Systems TYP MAX UNITS 1.1 V 0.1 2.0 IR = 1µA IF = 10mA VR = 1V 10 pA 3 0.75 CONDITIONS 1 pF VR = 10V VR = 10V, f = 1MHz • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Figure 1. Operational Amplifier Protection Input Differential Voltage limited to 0.8V (typ) by Diodes ID100 D1 and D2. Common Mode Input voltage limited by Diodes ID100 D3 and D4 to ±15V. Figure 2. Sample and Hold Circuit Typical Sample and Hold circuit with clipping. ID100 diodes reduce offset voltages fed capacitively from the ID100 switch gate. FIGURE 1 FIGURE 2 +V ID100 D1 D2 -V +V ID100 D1 OP-27 D2 2N4117A + D3 D4 ein +15V -15V 2N4393 CONTROL SIGNAL C TO-78 R VOUT TO-71 Six Lead 0.305 0.335 0.335 0.370 MAX. 0.040 0.165 0.185 0.016 0.019 DIM. A 0.230 DIA. 0.209 0.195 DIA. 0.175 0.030 MAX. 0.150 0.115 MIN. 0.500 0.016 0.021 DIM. B SEATING PLANE 0.200 6 LEADS 0.100 0.029 0.045 0.500 MIN. 0.019 DIA. 0.016 0.100 0.050 2 3 1 5 76 2 3 5 6 1 0.100 45° 45° 0.028 0.034 7 0.046 0.036 0.048 0.028 1. Absolute maximum ratings are limiting values above which serviceability may be impaired. 2. Design reference only, not 100% tested. 3. Pins 3 & 5 on ID100 and ID101 must not be connected, in any fashion or manner, to any circuit or node. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261