2N4351 N-CHANNEL MOSFET ENHANCEMENT MODE Linear Integrated Systems FEATURES DIRECT REPLACEMENT FOR INTERSIL 2N4351 HIGH DRAIN CURRENT ID = 100mA HIGH GAIN TO-72 BOTTOM VIEW gfs = 1000µS 1 ABSOLUTE MAXIMUM RATINGS @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature -65 to +200 °C Operating Junction Temperature -55 to +150 °C G 2 3 D S 1 4 C Maximum Power Dissipation Continuous Power Dissipation 375mW Maximum Current Drain to Source 100mA Maximum Voltages Drain to Body * Body tied to Case. 25V Drain to Source 25V Peak Gate to Source2 ±125V ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) (VSB = 0V unless otherwise stated) SYMBOL CHARACTERISTIC MIN BVDSS Drain to Source Breakdown Voltage VDS(on) Drain to Source "On" Voltage VGS(th) TYP MAX UNITS 25 ID = 10µA, VGS = 0V 1 Gate to Source Threshold Voltage 1 CONDITIONS V 5 ID = 2mA, VGS = 10V VDS = 10V, ID = 10µA IGSS Gate Leakage Current 10 pA VGS = ±30V, VDS = 0V IDSS Drain Leakage Current "Off" 10 nA VDS = 10V, VGS = 0V ID(on) Drain Current "On" gfs rDS(on) Forward Transconductance 3 mA VGS = 10V, VDS = 10V 1000 µS VDS = 10V, ID = 2mA, f = 1MHz Drain to Source "On" Resistance 300 Crss Reverse Transfer Capacitance 1.3 Ciss Input Capacitance 5.0 Cdb Drain to Body Capacitance 5.0 Linear Integrated Systems Ω VGS = 10V, ID = 0A, f = 1kHz VDS = 0V, VGS = 0V, f = 140kHz pF VDS = 10V, VGS = 0V, f = 140kHz VDB = 10V, f = 140kHz • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 SWITCHING CHARACTERISTICS SYMBOL CHARACTERISTIC MAX td(on) Turn On Delay Time 45 tr Turn On Rise Time 65 td(off) Turn Off Delay Time 60 Turn Off Fall Time 100 tf UNITS ns SWITCHING TEST CIRCUIT TIMING WAVEFORMS 10 µs VDD SET VDS = 10V +10 V VIN 8.21kΩ VOUT 4.5kΩ 0V 51Ω +10 V VIN 50% 10% td(on) 90% VDS 0V tr = tf < 2 ns Duty Cycle 2% 90% td(off) 50% 10% tr tf TO-72 Four Lead 0.230 DIA. 0.209 0.195 DIA. 0.175 0.030 MAX. 0.150 0.115 4 LEADS 0.500 MIN. 0.019 DIA. 0.016 0.100 0.050 2 3 1 45° 0.046 0.036 4 0.048 0.028 1. Absolute maximum ratings are limiting values above which serviceability may be impaired. 2. Device must not be tested at ±125V more than once or longer than 300ms. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261