bq24315 www.ti.com SLUS817 – MARCH 2008 OVERVOLTAGE AND OVERCURRENT PROTECTION IC AND Li+ CHARGER FRONT-END PROTECTION IC FEATURES 1 • Provides Protection for Three Variables: – Input Overvoltage, with Rapid Response in < 1 µs – User-Programmable Overcurrent with Current Limiting – Battery Overvoltage • 30V Maximum Input Voltage • Supports up to 1.5A Input Current • Robust Against False Triggering Due to Current Transients • Thermal Shutdown • Enable Input • Status Indication – Fault Condition 23 • • 5.5V LDO Mode Voltage Regulation Available in Space-Saving Small 8 Lead 2×2 SON APPLICATIONS • • • • • Mobile Phones and Smart Phones PDAs MP3 Players Low-Power Handheld Devices Bluetooth™ Headsets DESCRIPTION The bq24315 is a highly integrated circuit designed to provide protection to Li-ion batteries from failures of the charging circuit. The IC continuously monitors the input voltage, the input current, and the battery voltage. The output of the bq24315 acts a linear regulator. The output is regulated to 5.5V for inputs between 5.5V and the overvoltage threshold. If an input overvoltage condition occurs, the IC immediately removes power from the charging circuit by turning off an internal switch. In the case of an overcurrent condition, it limits the system current at the threshold value, and if the overcurrent persists, switches the pass element OFF after a blanking period. Additionally, the IC also monitors its own die temperature and switches off if it exceeds 140°C. The input overcurrent threshold is user-programmable. The IC can be controlled by a processor and also provides status information about fault conditions to the host. APPLICATION SCHEMATIC AC Adapter 1 IN VDC OUT 8 1 mF 1 mF GND bq24080 Charger IC bq24315 SYSTEM VBAT 6 VSS ILIM FAULT 4 2 7 CE 5 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. Bluetooth is a trademark of Bluetooth SIG, Inc. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated bq24315 www.ti.com SLUS817 – MARCH 2008 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) (1) (2) DEVICE (2) OVP THRESHOLD PACKAGE MARKING bq24315DSG 5.85 V 2mm x 2mm SON CGM For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. To order a 3000 piece reel add R to the part number, or to order a 250 piece reel add T to the part number. PACKAGE DISSIPATION RATINGS PART NO. PACKAGE RθJC RθJA bq24315DSG 2×2 SON 5°C/W 75°C/W ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) PARAMETER VI Input voltage PIN VALUE IN (with respect to VSS) –0.3 to 30 OUT (with respect to VSS) –0.3 to 12 ILIM, FAULT, CE, VBAT (with respect to VSS) –0.3 to 7 UNIT V II Input current IN 2 IO Output current OUT 2 A Output sink current FAULT 15 mA All (Human Body Model per JESD22-A114-E) 2000 V All (Machine Model per JESD22-A115-E) 200 V All (Charge Device Model per JESD22-C101-C) 500 V IN(IEC 61000-4-2) (with IN bypassed to the VSS with a 1-µF low-ESR ceramic capacitor) 15 (Air Discharge) 8 (Contact) kV ESD Withstand Voltage A TJ Junction temperature –40 to 150 °C Tstg Storage temperature –65 to 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN UNIT VIN Input voltage range 30 V IIN Input current, IN pin 1.5 A IOUT Output current, OUT pin 1.5 A R(ILIM) OCP Programming resistor 15 90 kΩ TJ Junction temperature –40 125 °C 2 3.3 MAX Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 bq24315 www.ti.com SLUS817 – MARCH 2008 ELECTRICAL CHARACTERISTICS over junction temperature range –40°C to 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IN UVLO Undervoltage lock-out, input power detected threshold CE = Low, VIN increasing from 0V to 3V 2.6 2.7 2.8 V Vhys(UVLO) Hysteresis on UVLO CE = Low, VIN decreasing from 3V to 0V 200 260 300 mV tDGL(PGOOD) Deglitch time, input power detected status CE = Low. Time measured from VIN 0V → 5V 1µs rise-time, to output turning ON IDD Operating current CE = Low, No load on OUT pin, VIN = 5V, R(ILIM) = 25kΩ ISTDBY Standby current CE = High, VIN = 5V 8 ms 400 600 µA 65 95 µA 170 280 mV 5.3 5.5 5.7 V 5.71 5.85 6.00 INPUT TO OUTPUT CHARACTERISTICS VDO Drop-out voltage IN to OUT CE = Low, VIN = 5V, IOUT = 1A OUPUT VOLTAGE REGULATION VO(REG) Output voltage CE = Low, VIN = 5.7V, IOUT = 1A INPUT OVERVOLTAGE PROTECTION VOVP Input overvoltage protection threshold CE = Low, VIN increasing from 5V to 7.5V tPD(OVP) Input OV propagation delay (1) CE = Low Vhys(OVP) Hysteresis on OVP CE = Low, VIN decreasing from 7.5V to 5V tON(OVP) Recovery time from input overvoltage condition CE = Low, Time measured from VIN 7.5V → 5V, 1µs fall-time 200 20 60 V ns 110 8 mV ms INPUT OVERCURRENT PROTECTION IOCP Input overcurrent protection threshold range IOCP Input overcurrent protection threshold K(ILIM) Adjustable current limit factor tBLANK(OCP) Blanking time, input overcurrent detected tREC(OCP) Recovery time from input overcurrent condition 300 CE = Low, R(ILIM) = 24.9kΩ, 3 V ≤ VIN < VOVP – Vhys(OVP) 900 1000 1500 mA 1100 mA 25 AΩ 176 µs 64 ms BATTERY OVERVOLTAGE PROTECTION BVOVP Battery overvoltage protection threshold CE = Low, VIN > 4.4V 4.30 4.35 4.4 V Vhys(Bovp) Hysteresis on BVOVP CE = Low, VIN > 4.4V 200 275 320 mV I(VBAT) Input bias current on VBAT pin V(VBAT) = 4.4V, TJ = 25°C 10 nA tDGL(Bovp) Deglitch time, battery overvoltage detected CE = Low, VIN > 4.4V. Time measured from V(VBAT) rising from 4.1V to 4.4V to FAULT going low. µs 176 THERMAL PROTECTION TJ(OFF) Thermal shutdown temperature TJ(OFF-HYS) Thermal shutdown hysteresis 140 150 °C °C 20 LOGIC LEVELS ON CE VIL Low-level input voltage 0 VIH High-level input voltage 1.4 0.4 V IIL Low-level input current V(/CE) = 0V 1 µA IIH High-level input current V(/CE) = 1.8V 15 µA V LOGIC LEVELS ON FAULT VOL Output low voltage ISINK = 5mA 0.2 V Ilkg Leakage current, FAULT pin HI-Z V(/FAULT) = 5V 10 µA (1) Not tested in production. Specified by design. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 3 bq24315 www.ti.com SLUS817 – MARCH 2008 Q1 IN OUT Charge Pump Bandgap Bias Gen VBG VISNS ILIM VBG Current limiting loop ILIMREF VO(REG) Loop OFF FAULT OCP Comparator ILIMREF - Δ VISNS tBLANK(OCP) VIN VBG COUNTERS, CONTROL, AND STATUS OVP CE tDGL(PGOOD) VBAT VIN VBG VBG UVLO THERMAL SHUTDOWN tDGL(BOVP) VSS Figure 1. Simplified Block Diagram 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 bq24315 www.ti.com SLUS817 – MARCH 2008 TERMINAL FUNCTIONS TERMINAL NAME DSG I/O DESCRIPTION IN 1 I Input power. Connect IN to the external DC supply. Bypass IN to VSS with a 1µF ceramic capacitor (minimum). VSS 2 – Ground terminal NC 3 FAULT 4 O 5 I Chip enable active low input. Connect CE = High to disable the IC and turn the input FET off. Connect CE = low for normal operation. CE is internally pulled down. VBAT 6 I Battery voltage sense input. Connect to the battery pack positive terminal through a resistor. ILIM 7 I/O 8 O CE OUT Thermal PAD This pin may have internal circuits used for test purposes. Do not make any external connection to this pin for normal operation. – Open-drain, device status output. FAULT = Low indicates that the input FET Q1 is off due to input overvoltage, input overcurrent, battery overvoltage, or thermal shutdown. FAULT is high impedance during normal operation. Connect a pullup resistor from FAULT to the desired logic level voltage rail. Input overcurrent threshold programming. Connect a resistor from ILIM to VSS to set the overcurrent threshold. Output terminal to the charging system. Connect OUT to the external load circuitry. Bypass OUT to VSS with a 1µF ceramic capacitor (minimum). There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. The VSS pin must be connected to ground at all times. DSG Package (Top View) IN 1 8 OUT 7 ILIM NC 3 6 VBAT FAULT 4 5 CE VSS 2 bq24315 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 5 bq24315 www.ti.com SLUS817 – MARCH 2008 TYPICAL OPERATING PERFORMANCE Test conditions (unless otherwise noted) for typical operating performance: VIN = 5 V, CIN = 1 µF, COUT = 1 µF, R(ILIM) = 25 kΩ, RBAT = 100 kΩ, TA = 25°C, VPU = 3.3V (see Figure 20 for the Typical Application Circuit) NORMAL POWER-ON SHOWING SOFT-START OVP AT POWER-ON VIN = 0 V to 9 V, tr = 50 ms ROUT = 6.6 W VIN 2 V/div 5 V/div 2 V/div VIN 200 mV/div VOUT 200 mA/div VOUT 200 mA/div IIN IIN t - Time - 2 ms/div t - Time - 2 ms/div Figure 2. Figure 3. OVP RESPONSE FOR INPUT STEP OVP RESPONSE FOR INPUT STEP VIN = 5 V to 12 V step VIN = 5 V to 12 V, tr = 20 ms 5 V/div 5 V/div VIN 2 V/div VOUT VIN 2 V/div VOUT t - Time - 10 ms/div t - Time - 20 ms/div Figure 4. Figure 5. RECOVERY FROM OVP OCP, POWERING UP INTO A SHORT CIRCUIT ON OUT,COUNTER COUNTS TO 15 BEFORE SWITCHING OFF THE DEVICE VIN = 7.5 V to 5 V, tr = 1.2 ms 2 V/div 5 V/div VIN VIN 1 V/div VOUT 500 mA/div IIN 2 V/div 1 V/div VOUT t - Time - 200 ms/div t - Time - 4 ms/div Figure 6. 6 VFAULT Figure 7. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 bq24315 www.ti.com SLUS817 – MARCH 2008 TYPICAL OPERATING PERFORMANCE (continued) ROUT SWITCHES FROM 6.6Ω TO 3.3Ω,SHOWS CURRENT LIMITING AND SOFT-STOP OCP, ZOOM-IN ON THE FIRST CYCLE OF FIGURE 7 2 V/div VOUT 2 V/div VIN IIN 500 mA/div 500 mA/div IIN VFAULT VOUT 1 V/div 1 V/div t - Time - 40 ms/div t - Time - 2 ms/div Figure 8. Figure 9. BAT-OVP, V(VBAT) STEPS FROM 4 V TO 4.5 V,SHOWS tDGL(BAT-OVP) AND SOFT STOP BAT-OVP, V(VBAT) CYCLES BETWEEN 4 V AND 4.5 V,SHOWS BAT-OVP COUNTER VOUT 2 V/div 1 V/div VBAT 2 V/div 1 V/div VFAULT 2 V/div VOUT VBAT 200 mA/div VFAULT t - Time - 100 ms/div t - Time - 4 ms/div Figure 10. Figure 11. UNDERVOLTAGE LOCKOUT vs FREE-AIR TEMPERATURE DROPOUT VOLTAGE (IN to OUT) vs FREE-AIR TEMPERATURE 280 2.75 260 2.7 VIN Increasing 240 VIN = 4 V 220 VDO @ 1A - mV VUVLO, VHYS-UVLO - V 2.65 2.6 2.55 200 VIN = 5 V 180 160 2.5 140 VIN Decreasing 2.45 2.4 -50 120 100 -30 -10 10 30 50 70 Temperature - °C 90 110 130 0 50 100 150 Temperature - °C Figure 12. Figure 13. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 7 bq24315 www.ti.com SLUS817 – MARCH 2008 TYPICAL OPERATING PERFORMANCE (continued) OVERVOLTAGE THRESHOLD PROTECTION vs FREE-AIR TEMPERATURE INPUT OVERCURRENT PROTECTION vs ILIM RESISTANCE 5.88 1600 1400 5.86 5.84 1000 VIN Increasing IOCP - mA VOVP, VHYS-OVP - V 1200 5.82 800 600 400 5.8 VIN Decreasing 5.78 -50 -30 -10 10 30 50 70 90 200 110 0 0 130 10 20 30 40 Temperature - °C 70 80 90 Figure 14. Figure 15. INPUT OVERCURRENT PROTECTION vs FREE-AIR TEMPERATURE BATTERY OVERVOLTAGE PROTECTION vs FREE-AIR TEMPERATURE 100 4.4 985 984 4.35 BVOVP (VVBAT Increasing) 983 4.3 982 981 BVOVP - V IOCP - mA 50 60 RILIM - kW 980 4.25 4.2 979 4.15 978 977 4.1 Bat-OVP Recovery (VVBAT Decreasing) 976 975 -50 -30 -10 10 30 50 70 Temperature - °C 90 110 4.05 -50 130 -30 -10 10 30 50 70 Temperature - °C Figure 16. Figure 17. LEAKAGE CURRENT (VBAT Pin) vs FREE-AIR TEMPERATURE SUPPLY CURRENT vs INPUT VOLTAGE 2.5 90 110 130 900 800 2 IDD, ISTDBY - mA 1.5 IVBAT - nA IDD (CE = Low) 700 1 600 500 400 300 200 0.5 ISTDBY (CE = High) 100 0 -50 -30 -10 10 30 50 70 Temperature - °C 90 110 130 0 0 10 15 20 25 30 35 VIN - V Figure 18. 8 5 Figure 19. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 bq24315 www.ti.com SLUS817 – MARCH 2008 TYPICAL APPLICATION CIRCUIT VOVP = 5.85V, IOCP = 1000mA, BVOVP = 4.35V AC Adapter VDC 1 IN OUT 8 CIN GND COUT 1 mF 1 mF bq24080 Charger IC bq24315 RBAT SYSTEM VBAT 6 100 kW VPU RPU 47 kW 47 kW FAULT 4 RFAULT ILIM VSS 47 kW 7 2 CE 5 Host Controller RCE RILM Figure 20. DETAILED FUNCTIONAL DESCRIPTION The bq24315 is an integrated circuit designed to provide protection to Li-ion batteries from failures of the charging circuit. The IC continuously monitors the input voltage, the input current and the battery voltage. For an input overvoltage condition, the IC immediately removes power from the charging circuit by turning off an internal switch. For an overcurrent condition, it limits the system current at the threshold value, and if the overcurrent persists, switches the pass element OFF after a blanking period. If the battery voltage rises to an unsafe level, the IC disconnects power from the charging circuit until the battery voltage returns to an acceptable value. Additionally, the IC also monitors its own die temperature and switches off if it exceeds 140°C. The input overcurrent threshold is user-programmable. The IC can be controlled by a processor, and also provides status information about fault conditions to the host. POWER DOWN The device remains in power down mode when the input voltage at the IN pin is below the undervoltage threshold UVLO. The FET Q1 connected between IN and OUT pins is off, and the status output, FAULT, is set to Hi-Z. POWER-ON RESET The device resets when the input voltage at the IN pin exceeds the UVLO threshold. All internal counters and other circuit blocks are reset. The IC then waits for duration tDGL(PGOOD) for the input voltage to stabilize. If, after tDGL(PGOOD), the input voltage and battery voltage are safe, FET Q1 is turned ON. The IC has a soft-start feature to control the inrush current. The soft-start minimizes the ringing at the input (the ringing occurs because the parasitic inductance of the adapter cable and the input bypass capacitor form a resonant circuit). Because of the deglitch time at power-on, if the input voltage rises rapidly to beyond the OVP threshold, the device will not switch on at all, instead it will go into protection mode and indicate a fault on the FAULT pin. OPERATION The device continuously monitors the input voltage, the input current, and the battery voltage as described in detail in the following sections. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 9 bq24315 www.ti.com SLUS817 – MARCH 2008 Input Overvoltage Protection While the input voltage is less than VO(REG), the output voltage tracks the input voltage (less the drop due to the RDS(on) of Q1). When the input voltage is between VO(REG) and VOVP, the device functions as a linear regulator and regulates the output voltage to 5.5V. If the input voltage rises above VOVP, the internal FET Q1 is turned off, removing power to the output. The response is rapid, with the FET turning off in less than a microsecond. The FAULT pin is driven low. When the input voltage returns below VOVP – Vhys(OVP) (but is still above UVLO), the FET Q1 is turned on again after a deglitch time of tON(OVP) to ensure that the input supply has stabilized. Input Overcurrent Protection The overcurrent threshold is programmed by a resistor R(ILIM) connected from the ILIM pin to VSS. Figure 15 shows the OCP threshold as a function of R(ILIM), and may be approximated by the following equation: IOCP = 25 ÷ R(ILIM) (current in A, resistance in kΩ) If the load current tries to exceed the IOCP threshold, the device limits the current for a blanking duration of tBLANK(OCP). If the load current returns to less than IOCP before tBLANK(OCP) times out, the device continues to operate. However, if the overcurrent situation persists for tBLANK(OCP), the FET Q1 is turned off for a duration of tREC(OCP), and the FAULT pin is driven low. The FET is then turned on again after tREC(OCP) and the current is monitored all over again. Each time an OCP fault occurs, an internal counter is incremented. If 15 OCP faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the device with the CE pin. To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is turned off slowly, resulting in a “soft-stop”. Battery Overvoltage Protection The battery overvoltage threshold BVOVP is internally set to 4.35V. If the battery voltage exceeds the BVOVP threshold, the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on once the battery voltage drops to BVOVP – Vhys(Bovp). Each time a battery overvoltage fault occurs, an internal counter is incremented. If 15 such faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the device with the CE pin. For a battery overvoltage fault, Q1 is gradually switched OFF. Thermal Protection If the junction temperature of the device exceeds TJ(OFF), the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on when the junction temperature falls below TJ(OFF) – TJ(OFF-HYS). Enable Function The IC has an enable pin which can be used to enable or disable the device. When the CE pin is driven high, the internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The OCP counter and the Bat-OVP counter are both reset when the device is disabled and re-enabled. The CE pin has an internal pulldown resistor and can be left floating. Note that the FAULT pin functionality is also disabled when the CE pin is high. Fault Indication The FAULT pin is an active-low open-drain output. It is in a high-impedance state when operating conditions are safe, or when the device is disabled by setting CE high. With CE low, the FAULT pin goes low whenever any of these events occurs: • Input overvoltage • Input overcurrent • Battery overvoltage • IC Overtemperature 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 bq24315 www.ti.com SLUS817 – MARCH 2008 Power Down All IC functions OFF FAULT = HiZ Any State if V(IN) < V (UVLO), go to Power Down No V(IN) > V(UVLO) ? Any State if CE = Hi, go to Reset Yes Reset Timers reset Counters reset FAULT = HiZ FET off No CE = Low ? V(IN) < V(OVP) ? No Turn off FET FAULT = Low No CE = Hi ? Yes Go to Reset Yes No I < IOCP ? No Turn off FET FAULT = Low Incr OCP counter Wait tREC(OCP) count <15 ? Yes No CE = Hi ? Yes Go to Reset No Turn off FET FAULT = Low VBAT < BATOVP ? No Incr BAT counter count <15 ? Yes TJ < TJ(OFF) ? No Turn off FET FAULT = Low Yes Turn on FET FAULT = HiZ Figure 21. Flow Diagram Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 11 bq24315 www.ti.com SLUS817 – MARCH 2008 APPLICATION INFORMATION (WITH REFERENCE TO FIGURE 20) Selection of RBAT It is strongly recommended that the battery not be tied directly to the VBAT pin of the device, as under some failure modes of the IC, the voltage at the IN pin may appear on the VBAT pin. This voltage can be as high as 30V, and applying 30V to the battery in case of the failure of the bq24315 can be hazardous. Connecting the VBAT pin through RBAT prevents a large current from flowing into the battery in case of a failure of the IC. In the interests of safety, RBAT should have a high value. The problem with a large RBAT is that the voltage drop across this resistor, due to the VBAT bias current I(VBAT), causes an error in the BVOVP threshold. This error is over and above the tolerance on the nominal 4.35V BVOVP threshold. Choosing RBAT in the range 100kΩ to 470kΩ is a good compromise. In the event of an IC failure, with RBAT equal to 100kΩ, the maximum current flowing into the battery would be (30V – 3V) ÷ 100kΩ = 246µA, which is low enough to be absorbed by the bias currents of the system components. RBAT equal to 100kΩ results in a worst-case voltage drop of RBAT × I(VBAT) = 1mV. This is negligible to compared to the internal tolerance of 50mV on BVOVP threshold. If the Bat-OVP function is not required, the VBAT pin should be connected to VSS. Selection of RCE, RFAULT, and RPU The CE pin can be used to enable and disable the IC. If host control is not required, the CE pin can be tied to ground or left un-connected, permanently enabling the device. In applications where external control is required, the CE pin can be controlled by a host processor. As in the case of the VBAT pin (see above), the CE pin should be connected to the host GPIO pin through as large a resistor as possible. The limitation on the resistor value is that the minimum VOH of the host GPIO pin less the drop across the resistor should be greater than VIH of the bq24315 CE pin. The drop across the resistor is given by RCE × IIH. The FAULT pin is an open-drain output that goes low during OV, OC, battery-OV, and OT events. If the application does not require monitoring of the FAULT pin, it can be left unconnected. But if the FAULT pin has to be monitored, it should be pulled high externally through RPU, and connected to the host through RFAULT. RFAULT prevents damage to the host controller if the bq24315 fails (see above). The resistors should be of high value, in practice values between 22kΩ and 100kΩ should be sufficient. Selection of Input and Output Bypass Capacitors The input capacitor CIN in Figure 20 is for decoupling, and serves an important purpose. Whenever there is a step change downwards in the system load current, the inductance of the input cable causes the input voltage to spike up. CIN prevents the input voltage from overshooting to dangerous levels. It is recommended that a ceramic capacitor of at least 1µF be used at the input of the device. It should be located in close proximity to the IN pin. COUT in Figure 20 is also important: If a fast (< 1µs rise time) overvoltage transient occurs at the input, the current that charges COUT causes the device’s current-limiting loop to start, reducing the gate-drive to FET Q1. This results in improved performance for input overvoltage protection. COUT should also be a ceramic capacitor of at least 1µF, located close to the OUT pin. COUT also serves as the input decoupling capacitor for the charging circuit downstream of the protection IC. Powering Accessories In some applications, the equipment that the protection IC resides in may be required to provide power to an accessory (e.g. a cellphone may power a headset or an external memory card) through the same connector pins that are used by the adapter for charging. Figure 22 and Figure 23 illustrate typical charging and accessory-powering scenarios: 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 bq24315 www.ti.com SLUS817 – MARCH 2008 Accessory power supply AC Adapter IN OUT Charger bq24315 e.g. cellphone DIS EN Battery pack to rest of system Figure 22. Charging - The Red Arrows Show the Direction of Current Flow Accessory power supply IN OUT bq24315 e.g. cellphone EN Charger DIS Battery pack to rest of system Figure 23. Powering an Accessory - The Red Arrows Show the Direction of Current Flow In the second case, when power is being delivered to an accessory, the bq24315 device is required to support current flow from the OUT pin to the IN pin. If VOUT > UVLO + 0.7V, FET Q1 is turned on, and the reverse current does not flow through the diode but through Q1. Q1 remains ON as long as VOUT > UVLO – Vhys(UVLO) + RDS(on) × I(ACCESSORY). Within this voltage range, the reverse current capability is the same as the forward capability, 1.5A. It should be noted that there is no overcurrent protection in this direction. PCB Layout Guidelines: • • • This device is a protection device, and is meant to protect down-stream circuitry from hazardous voltages. Potentially, high voltages may be applied to this IC. It has to be ensured that the edge-to-edge clearances of PCB traces satisfy the design rules for high voltages. The device uses SON packages with a PowerPAD™. For good thermal performance, the PowerPAD should be thermally coupled with the PCB ground plane. In most applications, this will require a copper pad directly under the IC. This copper pad should be connected to the ground plane with an array of thermal vias. CIN and COUT should be located close to the IC. Other components like R(ILIM) and RBAT should also be located close to the IC. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): bq24315 13 PACKAGE OPTION ADDENDUM www.ti.com 11-Jul-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty BQ24315DSGR ACTIVE SON DSG 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ24315DSGRG4 ACTIVE SON DSG 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ24315DSGT ACTIVE SON DSG 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ24315DSGTG4 ACTIVE SON DSG 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Apr-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant BQ24315DSGR SON DSG 8 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 BQ24315DSGT SON DSG 8 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Apr-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ24315DSGR SON DSG 8 3000 195.0 200.0 45.0 BQ24315DSGT SON DSG 8 250 195.0 200.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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