DATA SHEET MOS INTEGRATED CIRCUIT µPD120Nxx Series THREE-TERMINAL LOW-DROPOUT POSITIVE-VOLTAGE REGULATOR (OUTPUT CURRENT: 0.3 A) DESCRIPTION The µPD120Nxx series provides low-voltage output regulators with the output current capacitance of 0.3 A. The output voltage varies according to the product (1.5 V, 1.8 V, 2.5 V, or 3.3 V). The circuit current is low due to the CMOS structure, so the power consumption in the ICs can be reduced. Moreover, since ICs are mounted in the small package of the µPD120Nxx series, this contributes to the miniaturization of the application set. FEATURES • Output current: 0.3 A • On-chip overcurrent protection circuit • On-chip thermal protection circuit • Small circuit operation current: 60 µA TYP. APPLICATIONS Digital TV, Audio, HDD, DVD, etc. PIN CONFIGURATION (Marking Side) SC-74A N.C. GND GND 5 1 SC-62 4 2 3 OUTPUT 1 INPUT GND 2 OUTPUT 3 INPUT GND The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. S17145EJ2V0DS00 (2nd edition) Date Published February 2005 NS CP(K) Printed in Japan 2005 µPD120Nxx Series BLOCK DIAGRAM INPUT Overcurrent Protection Circuit Reference Voltage Circuit + Error Amp. − OUTPUT Thermal Protection Circuit GND 2 Data Sheet S17145EJ2V0DS µPD120Nxx Series ORDERING INFORMATION Part Number Package Output Voltage Marking µ PD120N15TA SC-74A 1.5 V K71 µ PD120N15T1B SC-62 1.5 V 7D µ PD120N18TA SC-74A 1.8 V K72 µ PD120N18T1B SC-62 1.8 V 7E µ PD120N25TA SC-74A 2.5 V K73 µ PD120N25T1B SC-62 2.5 V 7F µ PD120N33TA SC-74A .3.3 V K74 µ PD120N33T1B SC-62 3.3 V 7G Remark -E1 or -E2 is suffixed to the end of the part number of taping products, and -A or -AZ to that of Pb-free products. See the table below for details. Part Number Note1 Package Package Type µ PD120NxxTA Note2 µ PD120NxxTA-A SC-74A • Unit SC-74A • Unit µ PD120NxxTA-E1 SC-74A • 8 mm wide embossed taping • Pin 1 on take-up side µ PD120NxxTA-E1-A Note2 • 3000 pcs/reel (MAX.) SC-74A • 8 mm wide embossed taping • Pin 1 on take-up side • 3000 pcs/reel (MAX.) µ PD120NxxTA-E2 SC-74A • 8 mm wide embossed taping • Pin 1 on draw-out side µ PD120NxxTA-E2-A Note2 • 3000 pcs/reel (MAX.) SC-74A • 8 mm wide embossed taping • Pin 1 on draw-out side • 3000 pcs/reel (MAX.) µ PD120NxxT1B Note3 µ PD120NxxT1B-AZ SC-62 • Unit SC-62 • Unit µ PD120NxxT1B-E1 SC-62 • 12 mm wide embossed taping • Pin 1 on take-up side µ PD120NxxT1B-E1-AZ Note3 • 1000 pcs/reel (MAX.) SC-62 • 12 mm wide embossed taping • Pin 1 on take-up side • 1000 pcs/reel (MAX.) µ PD120NxxT1B-E2 SC-62 • 12 mm wide embossed taping • Pin 1 on draw-out side µ PD120NxxT1B-E2-AZ Note3 • 1000 pcs/reel (MAX.) SC-62 • 12 mm wide embossed taping • Pin 1 on draw-out side • 1000 pcs/reel (MAX.) Notes 1. xx stands for symbols that indicate the output voltage. 2. Pb-free (This product does not contain Pb in external electrode and other parts.) 3. Pb-free (This product does not contain Pb in external electrode.) Data Sheet S17145EJ2V0DS 3 µPD120Nxx Series ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified.) Parameter Symbol Rating µ PD120NxxTA Input Voltage Power Dissipation µ PD120NxxT1B −0.3 to +6 VIN Note1 Unit 180/510 PT Note2 V 400/2000 Note3 mW Operating Ambient Temperature TA –40 to +85 °C Operating Junction Temperature TJ –40 to +150 °C Storage Temperature Tstg Thermal Resistance (junction to ambient) –55 to +150 695/245 Rth(J-A) Note2 °C 315/62.5 Note3 °C/W Note 1. Internally limited. When the operating junction temperature rises over 150°C, the internal circuit shuts down the output voltage. 2 2. Mounted on ceramic substrate of 75 mm x 0.7 mm 3. Mounted on ceramic substrate of 16 cm2 x 0.7 mm Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. STANDARD CONNECTION D1 µ PD120Nxx INPUT CIN OUTPUT COUT D2 CIN: 0.1 µF or higher. Set this value according to the length of the line between the regulator and INPUT pin. Be sure to connect CIN to prevent parasitic oscillation. If using a laminated ceramic capacitor, it is necessary to ensure that CIN is 0.1 µF or higher for the voltage and temperature range to be used. COUT: 10 µF or higher. Be sure to connect COUT to prevent oscillation and improve excessive load regulation. Place CIN and COUT as close as possible to the IC pins (within 2 cm). Be sure to use the capacitor of 10 µF or higher of capacity values and 1 to 8 Ω of equivalent series resistance under an operating condition. D1: If the OUTPUT pin has a higher voltage than the INPUT pin, connect a diode. D2: If the OUTPUT pin has a lower voltage than the GND pin, connect a schottky barrier diode. Caution Make sure that no voltage is applied to the OUTPUT pin from external. 4 Data Sheet S17145EJ2V0DS µPD120Nxx Series RECOMMENDED OPERATING CONDITIONS Parameter Input Voltage Output Current Symbol VIN Type Number µ PD120N15 MIN. TYP. 3.0 MAX. Unit 5.5 V µ PD120N18 3.2 5.5 V µ PD120N25 4.5 5.5 V µ PD120N33 4.5 5.5 V IO All 0 0.3 A Operating Ambient Temperature TA All − 40 + 85 °C Operating Junction Temperature TJ All − 40 + 125 °C Caution Use of conditions other than the above-listed recommended operating conditions is not a problem as long as the absolute maximum ratings are not exceeded. However, since the use of such conditions diminishes the margin of safety, careful evaluation is required before such conditions are used. Moreover, using the MAX. value for all the recommended operating conditions is not guaranteed to be safe. ELECTRICAL CHARACTERISTICS µ PD120N15 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.) Parameter Output Voltage Symbol Conditions VO1 MIN. TYP. MAX. Unit 1.47 1.5 1.53 V 1.455 − 1.545 V − 1 30 mV 2 30 mV 60 120 µA 25 µA VO2 3.0 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A Line Regulation REGIN 3.0 V ≤ VIN ≤ 5.5 V Load Regulation REGL 0 A ≤ IO ≤ 0.3 A − Quiescent Current IBIAS IO = 0 A − Quiescent Current Change ∆IBIAS 3.0 V ≤ VIN ≤ 5.5 V − − Output Noise Voltage Vn 10 kHz ≤ f ≤ 100 kHz − 100 − µ Vr.m.s. Ripple Rejection R•R f = 1 kHz, 3.0 V ≤ VIN ≤ 5.5 V − 63 − dB Dropout Voltage VDIF IO = 0.15 A − 0.6 0.9 V IO = 0.3 A − 1.0 − V Short Circuit Current IOshort VIN = 5 V − 0.2 − A Peak Output Current IOpeak VIN = 5 V 0.3 − − A Temperature Coefficient of ∆VO/∆T IO = 0 A, 0°C ≤ TJ ≤ 125°C − 0.01 − mV/°C Output Voltage µ PD120N18 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.) Parameter Output Voltage Symbol Conditions VO1 MIN. TYP. MAX. 1.764 1.8 1.836 Unit V 1.746 − 1.854 V VO2 3.2 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A Line Regulation REGIN 3.2 V ≤ VIN ≤ 5.5 V − 1 30 mV Load Regulation REGL 0 A ≤ IO ≤ 0.3 A − 2 30 mV Quiescent Current IBIAS IO = 0 A − 60 120 µA Quiescent Current Change ∆IBIAS 3.2 V ≤ VIN ≤ 5.5 V − − 25 µA Output Noise Voltage Vn 10 kHz ≤ f ≤ 100 kHz − 120 − µ Vr.m.s. Ripple Rejection R•R f = 1 kHz, 3.2 V ≤ VIN ≤ 5.5 V − 63 − dB Dropout Voltage VDIF IO = 0.15 A − 0.4 0.65 V Short Circuit Current IOshort VIN = 5 V − 0.2 − A Peak Output Current IOpeak VIN = 5 V 0.3 − − A Temperature Coefficient of ∆VO/∆T IO = 0 A, 0°C ≤ TJ ≤ 125°C − 0.01 − mV/°C Output Voltage Data Sheet S17145EJ2V0DS 5 µPD120Nxx Series µ PD120N25 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.) Parameter Output Voltage Symbol Conditions VO1 MIN. TYP. MAX. Unit 2.45 2.5 2.55 V 2.425 − 2.575 V VO2 4.5 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A Line Regulation REGIN 4.5 V ≤ VIN ≤ 5.5 V − 1 30 mV Load Regulation REGL 0 A ≤ IO ≤ 0.3 A − 2 30 mV Quiescent Current IBIAS IO = 0 A − 60 120 µA Quiescent Current Change ∆IBIAS 4.5 V ≤ VIN ≤ 5.5 V − − 25 µA Output Noise Voltage Vn 10 kHz ≤ f ≤ 100 kHz − 170 − µ Vr.m.s. Ripple Rejection R•R f = 1 kHz, 4.5 V ≤ VIN ≤ 5.5 V − 60 − dB Dropout Voltage VDIF IO = 0.15 A − 0.3 0.7 V Short Circuit Current IOshort VIN = 5 V − 0.2 − A Peak Output Current IOpeak VIN = 5 V 0.3 − − A Temperature Coefficient of ∆VO/∆T IO = 0 A, 0°C ≤ TJ ≤ 125°C − 0.01 − mV/°C Output Voltage µ PD120N33 (TJ = 25°C, VIN = 5.0 V, IO = 0.15 A, CIN = 0.1 µF, COUT = 10 µF, unless otherwise specified.) Parameter Output Voltage Symbol Conditions VO1 MIN. TYP. MAX. Unit 3.234 3.3 3.366 V 3.201 − 3.399 V VO2 4.5 V ≤ VIN ≤ 5.5 V, 0 A ≤ IO ≤ 0.3 A Line Regulation REGIN 4.5 V ≤ VIN ≤ 5.5 V − 1 30 mV Load Regulation REGL 0 A ≤ IO ≤ 0.3 A − 2 30 mV Quiescent Current IBIAS IO = 0 A − 60 120 µA Quiescent Current Change ∆IBIAS 4.5 V ≤ VIN ≤ 5.5 V − − 25 µA Output Noise Voltage Vn 10 kHz ≤ f ≤ 100 kHz − 220 − µ Vr.m.s. Ripple Rejection R•R f = 1 kHz, 4.5 V ≤ VIN ≤ 5.5 V − 60 − dB Dropout Voltage VDIF IO = 0.15 A − 0.2 0.6 V Short Circuit Current IOshort VIN = 5 V − 0.2 − A Peak Output Current IOpeak VIN = 5 V 0.3 − − A Temperature Coefficient of ∆VO/∆T IO = 0 A, 0°C ≤ TJ ≤ 125°C − 0.01 − mV/°C Output Voltage 6 Data Sheet S17145EJ2V0DS µPD120Nxx Series TYPICAL CHARACTERISTICS (Reference Value) Pd vs. TA (µ PD120NxxT1B) 0.6 Pd - Internal Power Consumption - W Pd - Internal Power Consumption - W Pd vs. TA (µ PD120NxxTA) (Mounted on ceramic substrate of 75 mm2 x 0.7 0.5 245°C/W 0.4 0.3 (Without heatsink) 0.2 695°C/W 0.1 0 2.5 (Mounted on ceramic substrate of 16 cm2 x 0.7 2 62.5°C/W 1.5 1 (Without heatsink) 0.5 0 0 20 40 60 80 100 0 TA - Operating Ambient Temperature - °C 20 40 ∆VO - Output Voltage Variation - mV IO = 0.15 A 5 µPD120N15 -5 µPD120N18 -10 -50 0 80 100 ∆VO vs. TJ 10 0 60 TA - Operating Ambient Temperature - °C ∆VO vs. TJ ∆VO - Output Voltage Variation - mV 315°C/W 50 100 10 IO = 0.15 A 5 0 µPD120N33 -5 µPD120N25 -10 -50 150 0 50 100 150 TJ - Operating Junction Temperature - °C TJ - Operating Junction Temperature - °C VO vs. VIN (µ PD120N15) VO vs. VIN (µ PD120N18) 2 2 VO - Output Voltage - V VO - Output Voltage - V TJ = 25˚C IO = 5 mA IO = 150 mA IO = 300 mA 1 0 0 1 2 3 4 5 6 VIN - Input Voltage - V TJ = 25˚C IO = 5 mA IO = 150 mA IO = 300 mA 1 0 0 1 2 3 4 5 6 VIN - Input Voltage - V Data Sheet S17145EJ2V0DS 7 µPD120Nxx Series VO vs. VIN (µ PD120N25) VO vs. VIN (µ PD120N33) 5 4 TJ = 25˚C VO - Output Voltage - V VO - Output Voltage - V TJ = 25˚C 3 2 IO = 5 mA IO = 150 mA IO = 300 mA 1 4 3 2 IO = 5 mA IO = 150 mA IO = 300 mA 1 0 0 0 1 2 3 4 5 0 6 1 2 3 4 5 VIN - Input Voltage - V VIN - Input Voltage - V IBIAS (IBIAS(S)) vs. VIN (µ PD120N15) IBIAS (IBIAS(S)) vs. VIN (µ PD120N18) 1000 1000 TJ = 25˚C IBIAS - Quiescent Current - µA IBIAS - Quiescent Current - µA TJ = 25˚C 800 600 IO = 300 mA 400 IO = 150 mA 200 800 600 IO = 300 mA 400 IO = 150 mA 200 IO = 5 mA IO = 5 mA 0 0 0 1 2 3 4 5 6 0 1 VIN - Input Voltage - V 2 3 4 5 IBIAS (IBIAS(S)) vs. VIN (µ PD120N33) 1000 1000 TJ = 25˚C TJ = 25˚C IBIAS - Quiescent Current - µA IBIAS - Quiescent Current - µA 6 VIN - Input Voltage - V IBIAS (IBIAS(S)) vs. VIN (µ PD120N25) 800 600 IO = 300 mA 400 IO = 150 mA 200 800 IO = 300 mA 600 400 IO = 150 mA 200 IO = 5 mA IO = 5 mA 0 0 1 2 3 4 5 6 VIN - Input Voltage - V 8 6 0 0 1 2 3 4 VIN - Input Voltage - V Data Sheet S17145EJ2V0DS 5 6 µPD120Nxx Series IOpeak vs. VDIF (µ PD120N15) VDIF vs. TJ 0.7 1 IOpeak - Peak Output Current - A VDIF - Dropout Voltage - V IO = 0.15 A 0.8 µPD120N15 0.6 µPD120N18 0.4 µPD120N25 0.2 µPD120N33 0.5 TJ = 25°C 0.4 TJ = 125°C 0.3 0.2 0.1 0 0 -25 0 25 50 75 100 125 0 150 1 2 4 VDIF - Dropout Voltage - V IOpeak vs. VDIF (µ PD120N18) IOpeak vs. VDIF (µ PD120N25) 5 0.7 0.5 IOpeak - Peak Output Current - A TJ = 0°C 0.6 TJ = 25°C 0.4 TJ = 125°C 0.3 0.2 0.1 TJ = 0°C 0.6 0.5 TJ = 25°C 0.4 TJ = 125°C 0.3 0.2 0.1 0 0 0 1 2 3 4 5 0 VDIF - Dropout Voltage - V 1 2 3 R•R vs. f 0.7 80 R•R - Ripple Rejection - dB TJ = 0°C 0.6 TJ = 25°C 0.5 TJ = 125°C 0.4 4 VDIF - Dropout Voltage - V IOpeak vs. VDIF (µ PD120N33) IOpeak - Peak Output Current - A 3 TJ - Operating Junction Temperature - °C 0.7 IOpeak - Peak Output Current - A TJ = 0°C 0.6 0.3 0.2 0.1 TJ = 25°C IO = 0.15 A µPD120N15 70 60 µPD120N25 50 40 30 20 10 0 0 0 1 2 3 VDIF - Dropout Voltage - V 10 100 1000 10000 100000 f - Frequency - Hz Data Sheet S17145EJ2V0DS 9 µPD120Nxx Series R•R vs. f VDIF vs. IO 70 1 TJ = 25°C IO = 0.15 A µPD120N18 VDIF - Dropout Voltage - V R•R - Ripple Rejection - dB 80 60 µPD120N33 50 40 30 20 10 0.8 0.6 0.4 0.2 0 0 10 100 1000 10000 100000 0 0.15 0.2 VO vs. IO (µ PD120N15) VO vs. IO (µ PD120N18) 0.25 0.3 VO - Output Voltage - V 3 1 0 200 400 600 2 1 0 800 0 IO - Output Current - A 200 400 600 800 IO - Output Current - A VO vs. IO (µ PD120N25) VO vs. IO (µ PD120N33) 4 5 VO - Output Voltage - V VO - Output Voltage - V 0.1 IO - Output Current - A 2 0 0.05 f - Frequency - Hz 3 VO - Output Voltage - V µ PD120N15 µ PD120N18 µ PD120N25 µ PD120N33 3 2 1 4 3 2 1 0 0 0 200 400 600 800 IO - Output Current - A 10 0 200 400 600 IO - Output Current - A Data Sheet S17145EJ2V0DS 800 µPD120Nxx Series PACKAGE DRAWINGS (Unit: mm) SC-74A 5 PIN PLASTIC MINI MOLD detail of lead end F G R L E A H I B J S N C D M M K S ITEM A MILLIMETERS B 2.9±0.2 0.3 C 0.95 (T.P.) D 0.32 +0.05 −0.02 E 0.05±0.05 F 1.4 MAX. G 1.1+0.2 −0.1 H 2.8±0.2 I 1.5+0.2 −0.1 J 0.65 +0.1 −0.15 K 0.16 +0.1 −0.06 L 0.4±0.2 M N 0.19 0.1 R 5°±5° S5TA-95-15A Data Sheet S17145EJ2V0DS 11 µPD120Nxx Series SC-62 4.5 ±0.1 0.42 ±0.06 0.47 ±0.06 1.5 TYP. 0.8 MIN. 0.42 ±0.06 4.0 ±0.25 1.5 ±0.1 2.5 ±0.1 1.6 ±0.2 3.0 TYP. 12 Data Sheet S17145EJ2V0DS 0.41 +0.03 –0.05 µPD120Nxx Series RECOMMENDED SOLDERING CONDITIONS The µ PD120Nxx series should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Type of Surface Mount Device µ PD120N15TA, µ PD120N18TA, µ PD120N25TA, µ PD120N33TA: SC-74A µ PD120N15T1B, µ PD120N18T1B, µ PD120N25T1B, µ PD120N33T1B: SC-62 Process Infrared Ray Reflow Conditions Symbol Peak temperature: 235°C or below (Package surface temperature), IR35-00-3 Reflow time: 30 seconds or less (at 210°C or higher), Maximum number of reflows processes: 3 times or less. Vapor Phase Soldering Peak temperature: 215°C or below (Package surface temperature), VP15-00-3 Reflow time: 40 seconds or less (at 200°C or higher), Maximum number of reflows processes: 3 times or less. Wave Soldering Solder temperature: 260°C or below, Flow time: 10 seconds or less, WS60-00-1 Maximum number of flow processes: 1 time, Pre-heating temperature: 120°C or below (Package surface temperature). Partial Heating Method Pin temperature: 300°C or below, – Heat time: 3 seconds or less (Per each side of the device). µ PD120N15TA-A, µ PD120N18TA-A, µ PD120N25TA-A, µ PD120N33TA-A: SC-74A Note2 µ PD120N15T1B-AZ, µ PD120N18T1B-AZ, µ PD120N25T1B-AZ, µ PD120N33T1B-AZ: SC-62 Note1 Process Infrared Ray Reflow Conditions Peak temperature: 260°C or below (Package surface temperature), Symbol IR60-00-3 Reflow time: 30 seconds or less (at 210°C or higher), Maximum number of reflows processes: 3 times or less. Wave Soldering Solder temperature: 260°C or below, Flow time: 10 seconds or less, WS60-00-1 Maximum number of flow processes: 1 time, Pre-heating temperature: 120°C or below (Package surface temperature). Partial Heating Method Pin temperature: 300°C or below, – Heat time: 3 seconds or less (Per each side of the device). Notes 1. Pb-free (This product does not contain Pb in external electrode and other parts.) 2. Pb-free (This product does not contain Pb in external electrode.) Caution Do not use different soldering methods together (except for partial heating). Remark Flux: Rosin-based flux with low chlorine content (chlorine 0.2 Wt% or below) is recommended. Data Sheet S17145EJ2V0DS 13 µPD120Nxx Series NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. 5 POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. 6 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. 14 Data Sheet S17145EJ2V0DS µPD120Nxx Series REFERENCE DOCUMENTS Document Name Document No. Usage of Three-Terminal Regulators User’s Manual G12702E Voltage Regulator of SMD Information G11872E Semiconductor Device Mount Manual http://www.necel.com/pkg/en/mount/index.html SEMICONDUCTOR SELECTION GUIDE - Products and Packages- X13769X • The information in this document is current as of February, 2005. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. • NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. • While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. 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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1