DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG SINGLE POWER SUPPLY DUAL COMPARATORS WITH SMALL PACKAGE <R> DESCRIPTION The μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG are dual comparators which are designed to operate for a single power supply. It includes features of low-voltage operation, a common-mode input voltage that range from V− (GND) level, an open collector output, and low current consumption. Furthermore, these products can operate on a split power supply and be used for an extensive comparison of various voltages. The μ PC277GR-9LG, μ PC277MP-KAA which expands temperature type is suited for wide operating ambient temperature use, and μ PC393GR-9LG is used for general purposes. A DC parameter selection that is compatible to comparators is also available. μ PC177GR-9LG, μ PC339GR-9LG which are quad types with the same circuit configuration are also available as series of comparators. <R> FEATURES • Input Offset Voltage ±2 mV (TYP.) • A wired OR is possible as the open collector is output. • Input Bias Current 17 nA (TYP.) • A low voltage operation is possible. V+ − V−: +2 to +32 V • Voltage Gain 200000 (TYP.) • Pulse Response Time 1.8 μs (TYP.) • Output Sink Current 16 mA (TYP.) • Small Package The mounting area is reduced to 40% or 66% compared to the conventional 8-pin plastic SOP as shown in the following diagram. Package Standard SOP TSSOP TSSOP (2.8 x 2.9) μ PC277G2, μ PC277GR-9LG, μ PC277MP-KAA μ PC393G2 μ PC393GR-9LG Subject part number Outline comparison 6.5 5.2 (Mounting area ratio) (100%) 6.4 4.4 2.8 3.15 (60%) 4.0 2.9 (34%) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G17934EJ3V0DS00 (3rd edition) Date Published December 2007 NS Printed in Japan 2006, 2007 The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG <R> ORDERING INFORMATION Part Number μ PC277GR-9LG-E1-A Note μ PC277GR-9LG-E2-A Note Selected Grade Package Standard 8-pin plastic TSSOP (5.72 mm(225)) Package Type • 12 mm wide embossed taping • Pin 1 on draw-out side Standard 8-pin plastic TSSOP (5.72 mm(225)) • 12 mm wide embossed taping • Pin 1 at take-up side μ PC277GR(5)-9LG-E1-A Note DC 8-pin plastic TSSOP (5.72 mm(225)) parameter selection μ PC277GR(5)-9LG-E2-A Note DC • Pin 1 on draw-out side 8-pin plastic TSSOP (5.72 mm(225)) parameter selection μ PC277MP-KAA-E1-A Note μ PC277MP-KAA-E2-A Note Standard • 12 mm wide embossed taping • 12 mm wide embossed taping • Pin 1 at take-up side 8-pin plastic TSSOP (2.8 x 2.9) • 12 mm wide embossed taping • Pin 1 on draw-out side Standard 8-pin plastic TSSOP (2.8 x 2.9) • 12 mm wide embossed taping • Pin 1 at take-up side μ PC277MP(5)-KAA-E1-A Note DC 8-pin plastic TSSOP (2.8 x 2.9) parameter selection μ PC277MP(5)-KAA-E2-A Note DC • Pin 1 on draw-out side 8-pin plastic TSSOP (2.8 x 2.9) parameter selection μ PC393GR-9LG-E1-A Note μ PC393GR-9LG-E2-A Note Standard • 12 mm wide embossed taping • 12 mm wide embossed taping • Pin 1 at take-up side 8-pin plastic TSSOP(5.72 mm(225)) • 12 mm wide embossed taping • Pin 1 on draw-out side Standard 8-pin plastic TSSOP(5.72 mm(225)) • 12 mm wide embossed taping • Pin 1 at take-up side μ PC393GR(5)-9LG-E1-A Note DC 8-pin plastic TSSOP(5.72 mm(225)) parameter selection μ PC393GR(5)-9LG-E2-A Note DC • 12 mm wide embossed taping • Pin 1 on draw-out side 8-pin plastic TSSOP(5.72 mm(225)) parameter selection • 12 mm wide embossed taping • Pin 1 at take-up side Note Pb-free (This product does not contain Pb in the external electrode and other parts.) 2 Data Sheet G17934EJ3V0DS μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG EQUIVALENT CIRCUIT (1/2 Circuit) <R> PIN CONFIGURATION (Marking side) V+ OUT1 IN II + Q2 II1 Q3 Q1 Q4 Q8 − 8 V+ 7 OUT2 6 II2 5 IN2 1 100 μ A 100 μ A 1 − + 2 IN1 3 V− 4 2 + − OUT Q7 Q5 Q6 V− <R> ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Parameter Symbol + Voltage between V and V − Note1 Differential Input Voltage Input Voltage Total Power Dissipation μ PC393GR-9LG, μ PC277GR(5)-9LG μ PC277MP(5)-KAA μ PC393GR(5)-9LG − Note4 Unit −0.3 to +36 V ±36 V − − − − V − 0.3 to V + 36 VI Note3 Output Short Circuit Duration (vs. GND) V −V μ PC277MP-KAA, VID Note2 Output applied Voltage + μ PC277GR-9LG, V VO V − 0.3 to V + 36 V PT 440 mW tS Indefinite s Note5 Operating Ambient Temperature TA −40 to +125 −40 to +85 °C Storage Temperature Tstg −55 to +150 −55 to +125 °C Note1. Note that reverse connections of the power supply may damage ICs. + 2. The input voltage is allowed to input without damage or destruction independent of the magnitude of V . Either input signal is not allowed to go negative by more than 0.3 V. In addition, the input voltage that operates normally as a comparator is within the Common Mode Input Voltage range of an electrical characteristic. 3. A range where input voltage can be applied to an output pin externally with no deterioration or damage to the feature (characteristic). The input voltage can be applied regardless of the electric supply voltage. This specification which includes the transition state such as electric power ON/OFF must be kept. 4. This is the value of when the glass epoxy substrate (size: 100 mm x 100 mm, thickness: 1 mm, 15% of the substrate area where only one side is copper foiled is filling wired) is mounted. Note that restrictions will be made to the following conditions for each product, and the derating ratio depending on the operating ambient temperature. μ PC277GR-9LG: Derate at −5.5 mW/°C when TA > 69°C. (Junction − ambient thermal resistance Rth(J-A) = 183°C/W) μ PC277MP-KAA: Derate at −4.8 mW/°C when TA > 58°C. (Junction − ambient thermal resistance Rth(J-A) = 208°C/W) μ PC393GR-9LG: Derate at −5.5 mW/°C when TA > 44°C. (Junction − ambient thermal resistance Rth(J-A) = 183°C/W) + 5. Short circuits from the output to V can cause destruction. Pay careful attention to the total power dissipation not to exceed the absolute maximum ratings, Note 4. Data Sheet G17934EJ3V0DS 3 μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG RECOMMENDED OPERATING CONDITIONS Parameter Symbol V Power Supply Voltage (Split) − Power Supply Voltage (V = GND) V MIN. ± + TYP. MAX. Unit ±1 ±16 V +2 +32 V <R> ELECTRICAL CHARACTERISTICS μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG (TA = 25°C, V+ = +5 V, V− = GND) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Offset Voltage VIO VO = 1.4 V, VREF = 1.4 V, RS = 0 Ω ±2 ±5 mV Input Offset Current IIO VO = 1.4 V ±5 ±50 nA IB VO = 1.4 V 17 250 nA AV RL = 15 kΩ 200000 ICC RL = ∞, IO = 0 A 1 mA V − 1.5 V 0.4 V Input Bias Current Note1 Voltage Gain Circuit Current Note2 Common Mode lnput Voltage Range VICM Output Saturation Voltage VOL VIN (−) = +1 V, VIN (+) = 0 V, IO SINK = 4 mA Output Sink Current IO SINK VIN (−) = +1 V, VIN (+) = 0 V, VO ≤ 1.5 V IO LEAK Output Leakage Current Pulse Response Time Note3 0.6 + 0 0.2 6 16 mA VIN (+) = +1 V, VIN (−) = 0 V, VO = 5 V 0.1 nA RL = 5.1 kΩ, VRL = 5 V, 1.8 μs μ PC277GR(5)-9LG, μ PC277MP(5)-KAA, μ PC393GR(5)-9LG (TA = 25°C, V+ = +5 V, V− = GND) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Offset Voltage VIO VO = 1.4 V, VREF = 1.4 V, RS = 0 Ω ±2 ±2.5 mV Input Offset Current IIO VO = 1.4 V ±5 ±50 nA IB VO = 1.4 V 17 60 nA AV RL = 15 kΩ 200000 ICC RL = ∞, IO = 0 A 0.8 mA Input Bias Current Note1 Voltage Gain Circuit Current Note2 0.6 + V Common Mode lnput Voltage Range VICM Output Saturation Voltage VOL1 VIN (−) = +1 V, VIN (+) = 0 V, IO SINK = 4 mA 0.2 V VOL2 VIN (−) = +1 V, VIN (+) = 0 V, IO SINK = 10 mA 1.5 V IO SINK VIN (−) = +1 V, VIN (+) = 0 V, VO ≤ 1.5 V IO LEAK VIN (+) = +1 V, VIN (−) = 0 V, VO = 5 V 0.1 RL = 5.1 kΩ, VRL = 5 V, 1.8 Output Sink Current Output Leakage Current Pulse Response Time Note3 0 V − 1.4 10 16 mA 100 nA μs Notes1. The input bias current flows in the direction where the IC flows out because the first stage is configured with a PNP transistor. In addition, the value of this item is a value of when the differential amplified circuit of the input stage is balanced. When the comparator is active, then twice the amount of current will flow to a pin with low potential. 2. This is a current that flows in the internal circuit. This current will flow irrespective of the channel used. 3. This is the value when input oscillation is 100 mV and the over drive is 5 mV. If the amount of over drive is increased then the response time can be cut down. 4 Data Sheet G17934EJ3V0DS μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG TYPICAL APPLICATION CIRCUIT EXAMPLE V+ RL 2, 6 8 − VIN 3, 5 OUTPUT 1, 7 + 4 VREF VREF: V− to V+ − 1.5 (V) Comparator with hysteresis V+ VRL RL − INPUT OUTPUT + R2 R1 VREF • Threshold voltage VTH (High) ≅ VREF + R1 (VRL − VREF) R L + R2 + R1 VTH (Low) ≅ VREF − R1 (VREF − VOL) R1 + R2 (VRL > VREF > VOL) Data Sheet G17934EJ3V0DS 5 μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG <R> TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C, TYP.) (Reference value) ICC vs. V+ PT vs. TA 2 -9 R 7G 93 LG A KA P- 27 PC 7M 400 G R- 300 9L G 200 With 100 mm x 100 mm, thickness 1 mm glass epoxy 100 RL = ∞ IO = 0 A ICC - Supply Current - mA μ 7 C2 μP 500 C3 μP PT - Total Power Dissipation - mW 600 1.5 TA = −40°C 25°C 1 125°C 0.5 substrate (refer to "ABSOLUTE MAXIMUM RATINGS Note 4" ) 0 0 20 40 60 80 0 100 120 0 140 10 20 VIO vs. TA IB vs. V + 30 V+ = +5 V, V− = GND each 5 samples data 2 IB - Input Bias Current - nA VIO - Input Offset Voltage - mV 3 1 0 -1 -2 20 10 -3 0 -50 0 50 100 150 0 10 20 30 40 TA - Operating Ambient Temperature - °C V - Power Supply Voltage - V (V = GND) IB vs. TA VOL vs. IO SINK + 40 − 10 VOL - Output Saturation Voltage - V + V = +15 V IB - Input Bias Current - nA 40 V+ - Power Supply Voltage - V (V− = GND) TA - Operating Ambient Temperature - °C V− = GND 30 20 10 0 -50 0 50 100 150 V+ = +15 V V+ 1 V+ /2 IO SINK − + VO 0.1 TA = 125°C 25°C −40°C 0.01 0.001 0.0001 0.01 TA - Operating Ambient Temperature - °C 6 30 Data Sheet G17934EJ3V0DS 0.1 1 10 IO SINK - Output Sink Current - mA 100 μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG 5 4 3 2 1 0 100 50 0 −50 −100 PULSE RESPONSE II (OUTPUT RISE) Overdrive 5 mV +5 V 20 mV VI − + 100 mV 5.1 kΩ VO Overdrive 100 mV 20 mV 5 mV 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 VIN - Input Voltage - V VO - Output Voltage - V VIN - Input Voltage - V VO - Output Voltage - V PULSE RESPONSE I (OUTPUT FALL) 5 4 3 2 1 0 100 50 0 −50 −100 Overdrive 100 mV +5 V 20 mV VI − + 5 mV 5.1 kΩ VO Overdrive 5 mV 20 mV 100 mV 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 t - time - μs t - time - μs Data Sheet G17934EJ3V0DS 7 μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG <R> PRECAUTIONS FOR USE O The process of unused circuits If there is an unused circuit, the following connection is recommended. Process example of unused circuits V+ + OUT − (open) To potentials within the range of common-mode input voltage (VICM) V− V− O Ratings of input/output pin voltage When the voltage of input/output pin exceeds the absolute maximum rating, it may cause degradation of characteristics or damages, by a conduction of a parasitic diode within an IC. In addition, when the input/output pin may be lower than V−, it is recommended to make a clump circuit by a diode whose forward voltage is low (e.g.: Schottky diode) for protection. O Range of common-mode input voltage When the supply voltage does not meet the condition of electrical characteristics, the range of common-mode input voltage is as follows. VICM (TYP.): V− to V+ − 1.5 (V) (TA = 25°C) During designing, temperature characteristics for use with allowance. O Range of Input Current The “Input Bias Current [IB]” of the electric feature specification list is specified in accordance with the operation amplifier. It is an average value of the current that flows in the +input pin [IN] and the −input pin [II] when the differential amplified circuit of an input stage is balanced (negative feedback is provided). Therefore, because the differential amplified circuit of the input stage will not be balanced during comparison (when comparator is active), the input current will flow, with twice the amount of current, to a pin with low potential. O Handling of ICs When stress is added to ICs due to warpage or bending of a board, the characteristic fluctuates due to piezoelectric effect. Therefore, pay attention to warpage or bending of a board. 8 Data Sheet G17934EJ3V0DS μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG PACKAGE DRAWINGS (Unit: mm) 8-PIN PLASTIC TSSOP (5.72mm (225)) D D1 detail of lead end A3 5 8 c θ L Lp 4 1 (UNIT:mm) e ZD b x M S HE A E A2 S y S A1 NOTE Each lead centerline is located within 0.10mm of its true position at maximum material condition. L1 ITEM D DIMENSIONS 3.15±0.15 D1 3.00±0.10 E 4.40±0.10 HE 6.40±0.20 A 1.20 MAX. A1 0.10±0.05 A2 1.00±0.05 A3 0.25 b +0.06 0.24 −0.05 c 0.145±0.055 L 0.50 Lp 0.60±0.15 L1 θ 1.00±0.20 3° +5° −3° e 0.65 x 0.10 y 0.10 ZD Data Sheet G17934EJ3V0DS 0.60 P8GR-65-9LG 9 μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG <R> 8-PIN PLASTIC TSSOP(2.8x2.9) D1 D detail of lead end 5 8 A3 E θ 4 1 Lp A HE A2 L1 S e A1 b S y S c x M S ZD (UNIT:mm) ITEM DIMENSIONS D D1 2.90 3.00 ± 0.20 E NOTE Each lead centerline is located within 0.10 mm of its true position at maximum material condition. 2.80 e 4.00 ± 0.20 0.65 b 0.22 ± 0.05 HE A 1.03 MAX. A1 0.08 ± 0.05 A2 0.85 ± 0.05 A3 L1 0.25 c Lp x y ZD 0.60 ± 0.20 0.145 + 0.05 0.03 0.37 ±0.10 0.10 0.10 + 5° 3° 3° 0.525 P8MP-65-KAA NEC Electronics Corporation 2006 10 Data Sheet G17934EJ3V0DS μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG <R> RECOMMENDED SOLDERING CONDITIONS The μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Type of Surface Mount Device μ PC277GR-9LG-A Note Note μ PC393GR-9LG-A Note Note μ PC277MP-KAA-A , μ PC277GR(5)-9LG-A , μ PC393GR(5)-9LG-A Note , , μ PC277MP(5)-KAA-A : 8-pin plastic TSSOP (5.72 mm (225)) Note : 8-pin plastic TSSOP (2.8 x 2.9) Process Infrared ray reflow Conditions Symbol Peak temperature: 260°C, Reflow time: 60 seconds or less (at 220°C or higher), IR60-00-3 Maximum number of reflow processes: 3 times. Wave soldering Solder temperature: 260°C or below, Flow time: 10 seconds or less, Maximum WS60-00-1 number of flow processes: 1 time, Pre-heating temperature: 120°C or below (Package surface temperature). Partial heating method Pin temperature: 350°C or below, P350 Heat time: 3 seconds or less (Per each side of the device). Note Pb-free (This product does not contain Pb in external electrode and other parts.) Caution Apply only one kind of soldering condition to a device, except for “partial heating method”, or the device will be damaged by heat stress. Remark Flux: Rosin flux with low chlorine (0.2 Wt% or below) recommended. <R> REFERENCE DOCUMENTS Document Name Document No. QUALITY GRADES ON NEC SEMICONDUCTOR DEVICES C11531E SEMICONDUCTOR DEVICE MOUNT MANUAL http://www.necel.com/pkg/en/mount/index.html NEC SEMICONDUCTOR DEVICE RELIABILITY/QUALITY CONTROL IEI-1212 SYSTEM-STANDARD LINEAR IC REVIEW OF QUALITY AND RELIABILITY HANDBOOK C12769E NEC SEMICONDUCTOR DEVICE RELIBIALITY/QUALITY CONTROL C10983E SYSTEM Data Sheet G17934EJ3V0DS 11 μ PC277GR-9LG, μ PC277MP-KAA, μ PC393GR-9LG • The information in this document is current as of December, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. • NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. 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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1