DATA SHEET MOS INTEGRATED CIRCUIT µ PD7759 ADPCM SPEECH SYNTHESIZER LSIs The µ PD7759 is an external ROM type speech synthesis LSI employing the waveform coding method. In addition to the ROM capability of up to 1 Mbit, the µ PD7759 realizes the synthesis of speech sounds of any length by using the ADPCM data transferred from an external ROM. As the synthesizing method, it adopts the ADPCM method and the PCM + waveform element method. The ADPCM method is suitable for synthesizing clear and natural speech sounds, and the PCM + waveform element method is for the synthesis of sound effects and melodies. And by using them together, the µ PD7759 realizes the long-time synthesis of high-quality sounds. Because of the short turn-around time of speech analysis, the µ PD7759 can perform the quick system development using a PROM, or the evaluation of an on-chip ROM type of the µ PD7755 family. FEATURES ★ ★ ● Synthesizing method : ADPCM, PCM + waveform element methods used together ● Sampling frequency : 5, 6 or 8 kHz ● Bit rate (speech) : 20 to 32 K bps ● Number of Messages : 256 (MAX.) ● External speech data ROM Parameters Synthesizing time Speech data ROM (External) Products µ PD7759 Speech (ADPCM) 1 Mbits Note1 Melodies & sound effects Note2 (PCM + waveform element) 50 sec. (TYP.) 340 sec. (TYP.) Note 1. The synthesizing time for the speech is the value for a 6 kHz sampling. 2. The synthesizing time for the melodies & sound effects is variable according to their tone. ● Speech output : Current sink type analog output, 9-bit D/A converter ● Host CPU interface : Compatible with a 4/8-bit CPU ● Standby mode : Pop-noise preventive circuit incorporated ● Supply voltage : 2.7 to 5.5 V ● CMOS technology ORDERING INFORMATION Part Number Package Quality grade µ PD7759C 40-pin plastic DIP (600 mil) Standard µ PD7759GC-3BH 52-pin plastic QFP (■ ■ 14 mm) Standard Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications. The information in this document is subject to change without notice. Document No. IC-2323A (O.D.No. IC-6960D) Date Published January 1993 Printed in Japan The mark ★ shows revised points. © 1988, 1993 µPD7759 PIN CONFIGURATION (Top View) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VDD ASD4 ASD3 ASD2 ASD1 ASD0 A8 A7 A6 A5 A4 A3 A2 A1 A0 CS X2 X1 ST MD NC A0 A1 A2 A3 A4 NC A5 A6 A7 A8 ASD0 NC 39 38 37 36 35 34 33 32 31 30 29 28 27 40 26 41 25 42 24 43 23 44 22 45 21 46 20 µ PD7759GC-3BH 47 19 48 18 49 17 50 16 51 15 52 14 1 2 3 4 5 6 7 8 9 10 11 12 13 NC ALE DRQ SAA AEN / W R I7 NC I6 I5 I4 I3 I2 NC NC ASD1 ASD2 ASD3 ASD4 VDD NC ASD5 ASD6 ASD7 I0 I1 NC µ PD7759C ASD5 ASD6 ASD7 I0 I1 I2 I3 I4 I5 I6 I7 AEN/ WR SAA DRQ ALE REF AVO BUSY RESET GND • 52-pin plastic QFP NC CS X2 X1 ST MD NC GND RESET BUSY AVO REF NC • 40-pin plastic DIP BLOCK DIAGRAM ASD0 to ASD7 A0 to A8 X1 ROM Address & Speech Data Interface OSC X2 REF SAA ALE AEN/ WR DRQ MD System Controller BUSY ADPCM Decoder CS D/A Converter AVO ST RESET VDD GND Message Select Interface I0 to I7 2 µPD7759 1. PIN FUNCTIONS ★ 1.1 COMMON FUNCTION TO ALL MODES Pin 52-pin (Abbre- QFP 40-pin DIP viation) Pin No. Pin No. V DD 6 40 — DRQ 24 14 Output I/O Function Power supply (2.7 to 5.5 V) Speech synthesis data request. D/A converter reference current input. The sink-load current input causes the output current of the REF 28 16 Input D/A converter to change. The D/A converter reference current is passed to V DD via a resistor. In standby mode, REF is set to high impedance. Analog speech signal output. AVO outputs a unipolar sink-load current. The output current is reduced to 0 when the µ PD7759 is in the AVO 29 17 Output standby mode. The output current of the D/A converter from AVO is changed according to the input current from REF. Maximum output current of the D/A converter is approx. the 34 times the REF input current. Active-low BUSY signal output. When inputting ST signal, BUSY 30 18 Output it outputs a low level signal. MD, ST and WR are invalid while BUSY is low. In standby mode, BUSY is set to high impedance. Reset input. In standby mode, RESET must be at low level more than 12 RESET 31 19 Input clock cycles after clock oscillation becomes stable. In operation mode, RESET must be at low level for 12 clock cycles (oscillation clock). GND 32 20 — Ground. X1 36 23 — Ceramic resonator connection for generating a clock signal. The 640 kHz ceramic resonator can be connected. In standby mode, the µ PD7759 outputs a low-level to X1 and X2 37 24 — a high-level to X2. — — No Connection 1, 7, 13, NC 14, 20, 26, 27, 33, 39, 40, 46, 52 3 µPD7759 1.2 PIN FUNCTION FOR STAND ALONE MODE Pin 52-pin (Abbre- QFP DIP viation) Pin No. Pin No. I0 11 4 Message selection code input. I1 12 5 The message selection code signals are positive logics. I2 15 6 Ground the pins not used. I3 16 7 I4 17 8 latches I0 to I7 data at the rising edge of the ST input. I5 18 9 In standby mode, these pins should be set high or low level. I6 19 10 If they are biased at or near the typical CMOS threshold, I7 21 11 the excess supply current is caused. AEN/WR 22 12 SAA 23 40-pin 13 I/O Input Output/ Input Output Function These pins are connected to the internal latch circuit which This signal is at low level while address signal is valid. Controls the latch circuit for the higher 8 bits of the external ROM address. Outputs high level when the start address of a message stored in the directory area of data memory, is being read out. Determines the timing that higher 8 bits of the external ROM ALE 25 15 Output address are externally latched. They must be latched at the falling edge of the signal. MD 34 21 Input set at high-level. Start signal input. When ST goes low while CS is at low level, the µ PD7759 starts ST 35 22 Input synthesizing the message specified by I0 to I7. In standby mode, this signal resets the standby mode and starts speech synthesis. Chip select signal input. 4 CS 38 25 A0 41 26 A1 42 27 A2 43 28 A3 44 29 A4 45 30 A5 47 31 A6 48 32 A7 49 33 A8 50 34 ASD0 51 35 Input ST becomes valid when CS goes low. Output Outputs the lower 9 bits of the external ROM address. ASD1 2 36 ASD2 3 37 ASD3 4 38 Input/ (2) Inputs 8-bit speech synthesis data from the external ROM. ASD4 5 39 Output These functions are executed from (1) to (2) on a time- ASD5 8 1 ASD6 9 2 ASD7 10 3 (1) Outputs the higher 8 bits of external ROM address. shared basis. µPD7759 1.3 PIN FUNCTION FOR SLAVE MODE Pin 52-pin (Abbre- QFP 40-pin DIP viation) Pin No. Pin No. I0 11 4 I1 12 5 I/O I2 15 6 I3 16 7 I4 17 8 I5 18 9 I6 19 10 I7 21 11 AEN/WR 22 12 SAA 23 13 Output ALE 25 15 Output MD 34 21 Input Input Function Invalid. Set at high or low level. Output/ Input Inputs write strobe signal for a speech synthesis data. Invalid. Leave this pin open. Invalid. Leave this pin open. Slave mode selection input. Transition between two operation mode is not accepted during synthesis or in the standby mode. Invalid. ST 35 22 Input CS 38 25 Input A0 41 26 A1 42 27 A2 43 28 A3 44 29 A4 45 30 A5 47 31 A6 48 32 A7 49 33 A8 50 34 ASD0 51 35 ASD1 2 36 ASD2 3 37 ASD3 4 38 ASD4 5 39 ASD5 8 1 ASD6 9 2 ASD7 10 3 Set at high level. Chip select signal input. Output WR becomes valid when CS goes low. Invalid. Leave these pins open. Input Input speech synthesis data from an external source. 5 µPD7759 2. ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (Ta = 25 °C) Parameters Ratings Unit VDD –0.3 to + 7.0 V Input voltage VI –0.3 to VDD + 0.3 V Output voltage Vo –0.3 to VDD + 0.3 V Storage temperature Tstg –40 to +125 °C Operating temperature Topt –10 to +70 °C Power supply voltage Symbol Conditions RECOMMENDED OPERATING CONDITIONS Parameters Supply voltage Symbol Conditions VDD V IH1 Applied to I0 to I7, ST, CS, RESET, MD, WR MIN. TYP. MAX. Unit 2.7 5.5 V 0.7 V DD V DD V 2.2 V DD V 0 0.3 V DD V 0 0.8 V 650 kHz High-level input voltage V IH2 V IL1 Applied to ASD0 to ASD7, VDD = 5 V ± 10 % Applied to I0 to I7, ST, CS, RESET, MD, WR Low-level input voltage V IL2 Clock frequency Remark AC timing test voltage VIL = VOL = 0.3 VDD VIH = VOH = 0.7 VDD 6 fOSC Applied to ASD0 to ASD7, VDD = 5 V ± 10 % 630 640 µPD7759 DC CHARACTERISTICS (Ta = –10 to +70 °C, V DD = 2.7 to 5.5 V, f OSC = 640 kHz) Parameters Symbol Conditions High-level output voltage VOH IOH = –100 µA Low-level output voltage VOL VDD = 5 V ± 10 %, IOL = 1.6 mA Input leak current | ILI | Output leak current | ILO | MIN. TYP. VDD –0.5 V V 3 µA 3 µA 10 mA 20 µA (Stand alone, slave mode) < 2.7 V < = VDD = 3.5 V 1 mA (Standby mode) 2.7 V < = VDD < = 3.5 V 10 µA I0 to I7, ST, CS, WR, ASD0 to ASD7, MD BUSY, A0 to A8 VDD = 5 V (Standby mode) VDD = 5 V Reference input current Unit 0.4 (Stand alone, slave mode) Supply current MAX. IDD Note VDD = 2.7 V, RREF = 0 Ω 140 250 440 µA VDD = 5.5 V, RREF = 0 Ω 500 760 1200 µA VDD = 2.7 V, RREF = 50 kΩ 21 30 39 µA VDD = 5.5 V, RREF = 50 kΩ 68 78 88 µA 32 IREF 34 IREF 36 IREF µA 5 µA IREF D/A converter output current IAVO < 2.7 V < = VDD = 5.5 V VAVO = 2.0 V, D/A input: 1 FFH D/A converter output leak current | ILD | < 0V < = VAVO = VDD in the standby mode Note Measuring circuit VDD RREF REF IREF AVO IAVO 7 µPD7759 ★ AC CHARACTERISTICS (Ta = –10 to +70 °C, V DD = 2.7 to 5.5 V, f OSC = 640 kHz) TIMING REQUIREMENTS (common to all modes) Parameters Symbol Conditions MIN. TYP. MAX. Unit tr1 CL = 150 pF, VDD = 5 V ± 10 % 800 ns tr2 CL = 150 pF, VDD = 2.7 to 5.5 V 2 µs tf1 CL = 150 pF, VDD = 5 V ± 10 % 800 ns tf2 CL = 150 pF, VDD = 2.7 to 5.5 V 2 µs tRB from RESET ↓ 9.5 µs MAX. Unit BUSY rise time BUSY fall time BUSY output stop time 2.1 STAND ALONE MODE (1) TIMING REQUIREMENTS Parameters ★ RESET pulse width tRST CS set up time tCS CS hold time tSC ST set up time tRS ST pulse width Message select code set up time 8 Symbol tCC tDW Conditions MIN. TYP. 18.5 µs for ST ↓ 0 ns from ST ↑ 0 ns In operation mode, from RESET ↑ 200 µs In standby mode, from RESET ↑ 1.6 ms < 2.7 V < = VDD = 5.5 V 2 µs < 4.5 V < = VDD = 5.5 V 350 ns 2.7 V < = VDD < = 5.5 V, from ST ↑ 5 µs < 4.5 V < = VDD = 5.5 V, from ST ↑ 350 ns ns Message select code hold time tWD from ST ↑ 0 Speech data set up time tDR for DRQ ↓ 2 Speech data hold time tRDH from DRQ ↑ 7.5 µs 1.25 µs µPD7759 (2) SWITCHING CHARACTERISTICS Parameters Symbol Conditions MIN. TYP. MAX. Unit BUSY output delay tSBO In operation mode, from ST ↓ 6.25 10 µs Speech output delay tSSO In operation mode, from BUSY ↓ 2.1 2.2 ms BUSY hold time tBD from synthesis 15 µs ALE pulse width tLL 3.13 µs tAL for ALE ↓ 3.13 µs tAE for AEN ↓ 0 µs tLA from ALE ↓ 3.13 µs tEA from AEN ↑ 0 µs 14.1 µs 3.13 µs Higher address set up time Higher address hold time AEN pulse width tAEN DRQ output delay tLC Higher address pulse width tAC 6.25 µs DRQ pulse width tDCC 7.81 µs ROM read cycle time tMRO 37.5 µs from ALE ↓ TIMING CHART (at reset) (1) RESET tRST ST tRS (2) BUSY tRB RESET 9 µPD7759 TIMING CHART (Stand alone mode) (1) CONTROL tDW CS tCS tSC tCC ST tWD tDW I0 to I7 VALID tSBO BUSY tSSO tBD 1FFHIAVO 100H000H(D/A converter input value) 10 Synthesized sound output µPD7759 (2) MEMORY ACCESS tMRO AEN tAEN tAE tEA A0 to A8 tAC ASD0 to ASD7 tAL tLA ALE tLL tDR tRDH DRQ tLC tDCC 11 µPD7759 2.2 SLAVE MODE (1) TIMING REQUIREMENTS Parameters MD set up time Symbol Conditions MIN. TYP. MAX. Unit tRM from RESET ↑ 200 µs tBM from BUSY ↑ 0 ns tMD from MD ↑ 6.2 µs 6.2 µs 350 ns 0 ns MD pulse width tMD2 Speech data set up time tDW for WR ↑, 5 V ± 10 % Speech data hold time tWD from WR ↑, 5 V ± 10 % WR input stop time tWR from DRQ ↓ WR pulse width tCC 5 V ± 10 % CS set up time tCW CS hold time tWC 31.7 ★ µs 350 ns for WR ↓ 0 ns from WR ↑ 0 ns (2) SWITCHING CHARACTERISTICS Parameters Symbol BUSY output delay tSBO DRQ output delay tMDR Conditions from MD ↓ In operation mode, from MD ↓ In standby mode, after RESET input, from MD ↓ DRQ output stop time 12 tWRQ MIN. from WR ↓ TYP. MAX. Unit 9.5 µs 50 70 50 50000 µs 3 µs ★ µPD7759 TIMING CHART (Slave mode) (1) CONTROL RESET tBM tRM tMD2 MD tMD tMDR DRQ CS tCW tCC WR tDW tWD ASD0 to ASD7 BUSY tSBO (2) DATA TRANSFER DRQ tWRQ CS tCW tWC WR tWR tDW tWD ASD0 to ASD7 13 µPD7759 2.3 STANDBY MODE (1) TIMING REQUIREMENTS Parameters Symbol Standby escape signal tAW L*Note pulse width Conditions MIN. VDD = 5 V ± 10 % TYP. MAX. 350 Unit ns (2) SWITCHING CHARACTERISTICS Parameters Symbol Operation mode hold time tSTB Conditions MIN. after synthesis TYP. MAX. Unit 2.9 3 s 46.5 47 ms D/A converter activate tDA /inactivate time BUSY set up time tSB from L* ↓ 6.25 10 µs Synthesis start time tSSS after D/A converter activation 2.1 2.2 ms BUSY output delay tSBS 4 80 ms In standby mode, oscillation start time is included. Note L*: Signal to release standby mode. < < = CS ST : When operation mode is stand alone mode. CS WR : When operation mode is slave mode TIMING CHART (Standby mode) tAW L* tSB BUSY tSBS tSTB tDA tDA tSSS max IAVO mid 0 14 Synthesis µPD7759 3. PACKAGE DRAWINGS 15 µPD7759 ★ 52 PIN PLASTIC QFP ( 14) A B 27 26 39 40 F 52 1 G 5°±5° Q S D C detail of lead end 14 13 H I M J M P K N L P52GC-100-3B6,3BH-1 NOTE Each lead centerline is located within 0.20 mm (0.008 inch) of its true position (T.P.) at maximum material condition. 16 ITEM MILLIMETERS INCHES A 17.6 ± 0.4 0.693 ± 0.016 B 14.0 ± 0.2 0.551+0.009 –0.008 C 14.0 ± 0.2 0.551+0.009 –0.008 D 17.6 ± 0.4 0.693 ± 0.016 F 1.0 0.039 G 1.0 0.039 H 0.40 ± 0.10 0.016+0.004 –0.005 I 0.20 0.008 J 1.0 (T.P.) 0.039 (T.P.) K 1.8 ± 0.2 0.071 –0.009 L 0.8 ± 0.2 0.031+0.009 –0.008 M 0.15 +0.10 –0.05 0.006 –0.003 N 0.12 0.005 P 2.7 0.106 Q 0.1 ± 0.1 0.004 ± 0.004 S 3.0 MAX. 0.119 MAX. +0.008 +0.004 µPD7759 ★ 4. RECOMMENDED SOLDERING CONDITIONS The following conditions (see tables below) must be met when soldering the µ PD7759. Please consult with our sales offices in case other soldering process is used, or in case soldering is done under different conditions. For more details, refer to our document "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (IEI-1207). ● TYPE OF SURFACE MOUNT DEVICE µ PD7759GC-3BH:52-pin plastic QFP (■ ■ 14 mm) Soldering Process Soldering Conditions Symbol Solder temperature: 260 °C or below, Wave Soldering Flow time: 10 seconds or below, Temperature of pre-heat: 120 °C or below (Plastic surface temperature), WS60-00-1 Number of flow process: 1 Peak package's surface temperature: 230 °C or below, Infrared Ray Reflow Reflow time: 30 seconds or below (210 °C or higher), IR30-00-1 Number of reflow process: 1 Peak package's temperature: 215 °C or below, VPS Reflow time: 40 seconds or below (200 °C or higher), VP15-00-1 Number of reflow process: 1 Partial Heating Method Terminal temperature: 300 °C or below, — Time: 3 seconds or below (Per one side of the device) Caution Do not apply more than one soldering method at any one time, except for "Partial heating method". ● TYPE OF THROUGH HOLE DEVICE µ PD7759C:40-pin plastic DIP (600mil) Soldering Process Soldering Conditions Wave Soldering Solder Temperature: 260 °C or below (only lead part) Flow time: 10 seconds or below Partial Heating Method Terminal temperature: 260 °C or below Time: 10 seconds or below Caution Do not jet molten solder on the surface of package. 17 µPD7759 The µPD7759 has the following user's manual as a separate volume. Please use it for reference. ● µPD7755 family User's Manual: IEU-1218 No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. If customers intend to use NEC devices for above applications or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact our sales people in advance. Application examples recommended by NEC Corporation Standard: Computer, Office equipment, Communication equipment, Test and Measurement equipment, Machine tools, Industrial robots, Audio and Visual equipment, Other consumer products, etc. Special: Automotive and Transportation equipment, Traffic control systems, Antidisaster systems, Anticrime systems, etc. M4 92.6