PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µPD4992 8-Bit Parallel I/O Calendar Clock The µPD4992 is a CMOS integrated circuit which outputs 8-bit parallel time and calendar data in a system in which a microprocessor is employed. The µPD4992 operates at 32.768 kHz and provides year, month, day of month, day of week, hour, minute, and second data to a system. The µPD4992 internally contains a voltage regulator so that low power consumption operation and high accuracy are realized even if the supply voltage varies. The µPD4992 uses the 8-bit bus to facilitate interfacing with a microprocessor. FEATURES: • Internal counter for time (hour, minute, second), and calendar (leap year, year, month, day of month, day of week) • Super low power consumption (IDD = 2 µA MAX. at VDD = 2.4 V) • Automatic determination of leap year, manual setting possible • 12 hour/24 hour mode selectable • 8-bit parallel input/output in BCD data format • 12 kinds of interval timer output (can be used as watchdog timer) • Internal voltage detection circuit for automatic determination of battery run-down • High accuracy ORDERING INFORMATION: Order Code Package µPD4992CX 20-pin plastic DIP (300 mil) µPD4992GS 20-pin plastic SOP (300 mil) µPD4992GS-T1, T2 20-pin plastic SOP (300 mil) Provided on adhesive tape µPD4992GS-E2 20-pin plastic SOP (300 mil) Provided on embossed carrier tape The information in this document is subject to change without notice. Document No. ID-3084 (1st edition) (O.D. No. ID-8222) Date Published March 1997 P Printed in Japan © 1995 1992 µPD4992 PIN CONFIGURATION TP 1 20 VDD CS1 2 19 XIN WR 3 18 XOUT A0 4 17 CS2 A1 5 16 D7 A2 6 15 D6 RD 7 14 D5 D0 8 13 D4 D1 9 12 D3 VSS 10 11 D2 BLOCK DIAGRAM Year Month TP CS1 CS2 TP Generator RD WR 8 D0 to D7 3 2 Day Clock Stop XOUT A0 to A2 Day of the week 1 / 215 Time Time Counter Minute XIN 15 Stage Binary Divider Second OSC Data Bus Controller Address Bus Controller Mode Registor Control Registor Address Decoder µPD4992 ABSOLUTE MAXIMUM RATINGS (VSS = 0 V) Item Symbol Ratings Unit Supply voltage VDD –0.3 to 7.0 V Input voltage range VIN –0.3 to VDD + 0.3 V Output pin withstand voltage VOUT 7.0 V Low level output current (N ch Open Drain) IOUT 30 mA Operating temperature range Topt –40 to +85 °C Storage temperature range Tstg –65 to +125 °C ELECTRICAL CHARACTERISTICS (VSS = 0 V, f = 32.768 kHz, CG = CD = 20 pF, Ci = 20k ohms, Ta = –40 to +85 °C) Item Symbol Condition MIN. TYP.* MAX. Unit Operating voltage range VDD 2.4 5.5 V High level input voltage VIH 0.7 VDD VDD V Low level input voltage VIL VSS 0.3 VDD V Supply current IDD VDD = 5.5 V, VIN = VSS 2 6 µA Supply current IDD VDD = 2.4 V, VIN = VSS 0.6 2 µA Input leakage current ILI VDD = 5.5 V, VIN = VDD or VSS ±1 × 10–5 ±1.0 µA High level output voltage VOH IOH = –1.0 mA Low level output voltage VOL1 IOL = 2.0 mA Low level output voltage VOL2 IOL = 1.0 mA (N ch Open Drain) High level leakage current ILOH TPout = VDD (N ch Open Drain) 2.4 4.3 0.1 4 × 10–5 V 0.4 V 0.4 V 1.0 µA *: Ta = +25 °C SWITCHING CHARACTERISTICS WRITE CYCLE (unless otherwise specified VDD = 5 V ± 10 %, Ta = –40 to +85 °C) Item Symbol Condition MIN. Cycle time tWC 150 CS-WR reset time tCW 120 Address - WR reset time tAW 120 Address - WR set up time tAS 0 Write pulse width tWP 90 Address hold time tWR 20 Input data set up time tDW 50 Input data hold time tDH 0 WR - output floating time tWHZ TYP. MAX. Unit ns 50 3 µPD4992 WRITE CYCLE TIMING WAVEFORMS 1 tWC ADDRESS tAW RD tCW CS tAS tWR tWP WR tOHZ DOUT tDW tDH DIN WRITE CYCLE TIMING WAVEFORMS 2 (RD = VIL) tWC ADDRESS tAW tCW CS tAS tWR tWP WR tWHZ tOW DOUT tDW DIN 4 tDH µPD4992 READ CYCLE (unless otherwise specified VDD = 5 V ± 10 %, Ta = –40 to +85 °C) Item Symbol Condition MIN. TYP. MAX. Cycle time tRC Address access time tAA 150 CS - access time tACS 150 RD - output delay time tOE 75 RD - output delay time tOLZ RD - output delay time tOHZ Output hold time tOH 15 CS - output set time tCLZ 10 CS - output floating time tCHZ 5 Unit 150 5 ns 50 READ CYCLE TIMING WAVEFORMS 1 CS tRC ADDRESS tAA tOH RD tOE DOUT Data output tOLZ READ CYCLE TIMING WAVEFORMS 2 ADDRESS tRC CS tCHZ tACS RD tCLZ DOUT tOHZ Data output 5 µPD4992 PIN FUNCTION Pin symbol CS1 Pin name Pin number Chip select input Function 2 Internal register can be accessed when CS1 = L CS2 Chip select input 17 and CS2 = H WR Write signal input 3 Writes the contents of data bus to the register selected by address input at the rising edge RD Read signal input 7 Outputs the contents of the register selected by address input to the data bus at the rising edge D0 to D7 Data input/output 8, 9, 11 to 16 A0 to A2 Address input TP Timing pulse output 1 XIN Crystal resonator connection pin 19 Crystal resonator and capacitor are connected to 4 to 6 Data input/output bus Address input to select internal register Interval signal and timing pulse output (N ch open drain output) XOUT Crystal resonator connection pin 18 these pins. VDD Power supply pin 20 2.4 V to 5.5 V VSS GND 10 Connect to GND External components (crystal resonator, capacitors) must be located as close as the IC, and separated as far as from high speed clock wiring. 5 V or 0 V VDD C1 XIN X C2 XOUT X: 32.768 kHz C1, C2: 10 to 30 pF 6 µPD4992 REGISTER – ADDRESS CORRESPONDENCE TABLE ADDRESS Register contents HEX BIN b7 0H 000B 10s second digit 1s second digit 1H 001B 10s minute digit 1s minute digit 2H 010B 3H 011B 4H 100B 10s day digit 1s day of month digit 5H 101B 10s month digit 1s month digit 6H 110B 10s year digit 1s year digit 7H 111B Mode register Control register 12/24H b6 b5 AM/PM Leap year control b4 b3 b2 b1 10s hour digit 1s hour digit Leap year counter Day of week digit b0 AM/PM flag (R/W) : In 12 hour mode, 0 indicates AM, and 1 indicates PM. Always 0 in 24 hour mode. 12/24H flag (R/W) : 0 indicates 24 hour mode, and 1 indicates 12 hour mode. LEAP YEAR CONTROL REGISTER (R/W) b7 b6 Mode 0 0 Leap year effective Writing to leap year counter disabled 0 1 Leap year effective Writing to leap year counter enabled 1 0 Leap year invalid Writing to leap year counter disabled 1 1 Leap year invalid Writing to leap year counter enabled • When the leap year control register is “0X” and the leap year counter is “00” → Leap year (Feb. has 29 days). • To disable leap year mode, write “10” to the leap year control register (Feb. 28 is followed by Mar. 1). 7 µPD4992 MODE REGISTER (R/W) HEX BIN Mode 0H 0000B Outputs TP2048 Hz 1H 0001B Outputs TP1024 Hz 2H 0010B Outputs TP256 Hz 3H 0011B Outputs TP64 Hz 4H 0100B Outputs INT1/2048s 5H 0101B Outputs INT1/1024s 6H 0110B Outputs INT1/256s 7H 0111B Outputs INT1/64s 8H 1000B Outputs INT1s 9H 1001B Outputs INT10s AH 1010B Outputs INT60s BH 1011B Outputs BUSY signal CH 1100B Test mode 1 DH 1101B Test mode 2 EH 1110B Test mode 3 FH 1111B Test mode 4 CONTROL REGISTER Access mode b3 0 When writing b2 b1 b0 CLK adjust Reset CLK stop 0: NOP 0: NOP 0: CLK start –––––––––––––––––––––––––––––––––––––––––– 1: CLK adjust 1: Reset 1: CLK stop TP enable*1 1 (Don’t care) INT stop 0: TP = ENABLE 0: NOP 0: INT start –––––––––––––––––––––––––––––––––––––––––– 1: TP = DISABLE 1: Reset 1: INT stop TP flag * When reading INT reset OSC flag*2 BUSY flag*3 0: TP = Z 0: No oscillation 0: OFF –––––––––––––––––––––––––––––––––––––––––– 1: TP = L 1: Oscillation 1: ON *1 : When TP enable is 1 (TP = DISABLE), the TP pin becomes high impedance (actually a high level because a pull up resistor is connected to the TP pin). But TP flag is not DISABLE in this case. *2 : If the OSC flag becomes 0 by oscillation stop, the OSC flag remains to be 0 when oscillation is resumed. To set OSC flag to 1 again, execute CLK reset (if the OSC flag still remains to be 0, oscillation has not been started again). Upon initial power application of the µPD4992, 0 is set to the OSC flag. *3 : The BUSY flag is “1” when the time counter of the µPD4992 is operating (when read is disabled). 8 µPD4992 Table 1 Time Counter Data TIME COUNTER DATA TIME COUNTER DATA 1s second digit 0-9 1s day of month digit 0-9 10s seocnd digit 0-5 10s day of month digit 0-3 1s minute digit 0-9 1s month digit 0-9 10s minute digit 0-5 10s month digit 0-1 1s hour digit 0-9 1s year digit 0-9 10s hour digit 0-5 10s year digit 0-9 Day of week digit 0-6 Table 2 Hour Counter Data Hour 24 hour mode 12 hour mode AM 1 o’clock 01H 81H AM 2 o’clock 02H AM 3 o’clock Hour 24 hour mode 12 hour mode PM 1 o’clock 13H C1H 82H PM 2 o’clock 14H C2H 03H 83H PM 3 o’clock 15H C3H AM 4 o’clock 04H 84H PM 4 o’clock 16H C4H AM 5 o’clock 05H 85H PM 5 o’clock 17H C5H AM 6 o’clock 06H 86H PM 6 o’clock 18H C6H AM 7 o’clock 07H 87H PM 7 o’clock 19H C7H AM 8 o’clock 08H 88H PM 8 o’clock 20H C8H AM 9 o’clock 09H 89H PM 9 o’clock 21H C9H AM 10 o’clock 10H 90H PM 10 o’clock 22H D0H AM 11 o’clock 11H 91H PM 11 o’clock 23H D1H PM 12 o’clock 12H D2H AM 12 o’clock 00H 92H 9 µPD4992 TYPICAL INT CONTROL EXAMPLES (mode register: INT output mode) (1) Use of INT reset (example 1) T T 30.5 µ s INT reset (2) Use of INT reset (example 2) T T INT output INT reset INT reset (3) Use of INT stop (example 1) t1 t2 INT output INT stop Clear INT stop (4) Use of INT stop (example 2) 30.5 µ s T INT output INT stop 10 Clear INT stop T = t1 + t2 µPD4992 (5) Use of INT reset, INT stop t1 T INT output INT stop INT reset Clear INT stop (6) Use of TP enable T T INT output TP DISABLE TP ENABLE 11 µPD4992 TP OUTPUT (mode register: TP output mode) 1/f 50 % duty continuous output BUSY SIGNAL 1s carry over 1s carry over Internal counter 1 Hz Busy signal output TP output DISABLE set 457.7 µ s 30.5 µ s BUSY flag ON BUSY flag OFF BUSY flag ON The time and calendar data read out when BUSY signal is being output may not be correct. This is because, the internal time counter is operating. Therefore, accessing must be disabled during this period or the data must be read out twice and checked by the software. (Reading data during BUSY period has not effect on the contents of the internal counter.) 12 µPD4992 OUTLINE DRAWING 20PIN PLASTIC DIP (300 mil) 20 11 1 10 A K L P I J H C F D N R M B G M NOTES 1) Each lead centerline is located within 0.25 mm (0.01 inch) of its true position (T.P.) at maximum material condition. 2) ltem "K" to center of leads when formed parallel. ITEM MILLIMETERS INCHES A B 25.40 MAX. 1.27 MAX. 1.000 MAX. 0.050 MAX. C 2.54 (T.P.) 0.100 (T.P.) D 0.50±0.10 0.020 +0.004 –0.005 F 1.1 MIN. 0.043 MIN. G H 3.5±0.3 0.51 MIN. 0.138±0.012 0.020 MIN. I J 4.31 MAX. 5.08 MAX. 0.170 MAX. 0.200 MAX. K 7.62 (T.P.) 0.300 (T.P.) L 6.4 0.252 M 0.25 +0.10 –0.05 0.010 +0.004 –0.003 N 0.25 P 0.9 MIN. R 0~15 ° 0.01 0.035 MIN. 0~15° P20C-100-300A,C-1 13 µPD4992 20 PIN PLASTIC SOP (300 mil) 20 11 P detail of lead end 1 10 A H J E K F G I C N D M L B M NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition. ITEM MILLIMETERS INCHES A 13.00 MAX. 0.512 MAX. B 0.78 MAX. 0.031 MAX. C 1.27 (T.P.) 0.050 (T.P.) D 0.40 +0.10 –0.05 0.016 +0.004 –0.003 E 0.1±0.1 0.004±0.004 F 1.8 MAX. 0.071 MAX. G 1.55 0.061 H 7.7±0.3 0.303±0.012 I 5.6 0.220 J 1.1 0.043 K 0.20 +0.10 –0.05 0.008 +0.004 –0.002 L 0.6±0.2 M 0.12 0.005 N 0.10 0.004 P 3 ° +7° –3° 3° +7° –3° 0.024 +0.008 –0.009 P20GM-50-300B, C-4 14 µPD4992 RECOMMENDED SOLDERING CONDITIONS The following conditions (see table below) must be met when soldering this product. Please consult with our sales offices in case other soldering process is used, or in case soldering is done under different conditions. TYPES OF SURFACE MOUNT DEVICE µPD4992GS Soldering process Soldering condition Symbol Infrared ray reflow Peak package’s surface temperature: 235 °C or below, Reflow time: 30 seconds or below (210 °C or higher), Number of reflow process: 2, Exposure limit*: None IR35-00-2 VPS Peak package’s surface temperature: 215 °C or below, Reflow time: 40 seconds or below (200 °C or higher), Number of reflow process: 2, Exposure limit*: None VP15-00-2 Wave soldering Solder temperature: 260 °C or below, Flow time: 10 seconds or below, Number of flow process: 1, Exposure limit*: None WS60-00-1 Partial heating method Terminal temperature: 300 °C or below, Flow time: 10 seconds or below, Exposure limit*: None *: Exposure limit before soldering after dry-pack package is opened. Storage conditions: 25 °C and relative humidity at 65 % or less. Note: Do not apply more than a single process at once, except for “Partial heating method”. TYPE OF THROUGH HOLE MOUNT DEVICE µPD4992CX Soldering process Wave soldering Soldering conditions Solder temperature: 260 °C or below, Flow time: 10 seconds or below. 15 µPD4992 [MEMO] No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5 16