TI SN74AUC06RGYR

SN74AUC06
HEX INVERTER BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS
SCES471 – AUGUST 2003
D
VCC
1
14
2
13 6A
3
12 6Y
4
11 5A
5
10 5Y
9 4A
6
7
8
4Y
D
D
D
D
D
1Y
2A
2Y
3A
3Y
1A
D
RGY PACKAGE
(TOP VIEW)
Optimized for 1.8-V Operation and Is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub 1-V Operable
Max tpd of 2.2 ns at 1.8-V
Low Power Consumption, 10-µA Max ICC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
GND
D
description/ordering information
This hex inverter buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to
1.95-V VCC operation.
The outputs of the SN74AUC06 are open drain and can be connected to other open-drain outputs to implement
active-low wired-OR or active-high wired-AND functions.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
–40°C to 85°C QFN – RGY
Tape and reel
SN74AUC06RGYR
MS06
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram, each buffer/driver (positive logic)
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74AUC06
HEX INVERTER BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS
SCES471 – AUGUST 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 3.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 3.6 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 3.6 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 2)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 3)
VCC
VIH
Supply voltage
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
High-level input voltage
VCC = 2.3 V to 2.7 V
VCC = 0.8 V
MIN
MAX
0.8
2.7
VCC
0.65 × VCC
UNIT
V
V
1.7
0
0.35 × VCC
VIL
Low-level input voltage
VI
VO
Input voltage
0
3.6
V
Output voltage
0
3.6
V
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 0.8 V
VCC = 1.1 V
IOL
∆t/∆v
Low-level output current
0.7
0.7
3
VCC = 1.4 V
VCC = 1.65 V
5
VCC = 2.3 V
9
Input transition rise or fall rate
V
mA
8
20
ns/V
TA
Operating free-air temperature
–40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74AUC06
HEX INVERTER BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS
SCES471 – AUGUST 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOL = 100 µA
IOL = 0.7 mA
VOL
II
Ioff
A inputs
TYP†
MAX
0.8 V
0.25
1.1 V
0.3
1.4 V
0.4
IOL = 8 mA
IOL = 9 mA
1.65 V
0.45
2.3 V
0.6
VI = VCC or GND,
VI = VCC or GND
IO = 0
UNIT
0.2
IOL = 3 mA
IOL = 5 mA
V
0 to 2.7 V
±5
µA
0
±10
µA
0.8 V to 2.7 V
10
µA
VI = VCC or GND
VI or VO = 2.7 V
ICC
Ci
MIN
VCC
0.8 V to 2.7 V
2.5 V
2.5
pF
† All typical values are at TA = 25°C.
switching characteristics over recommended operating free-air temperature range, CL = 15 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
VCC = 0.8 V
TYP
MIN
MAX
MIN
MAX
MIN
TYP
MAX
MIN
MAX
A
Y
4.2
0.8
3.6
0.5
2.6
0.5
1.4
3.1
0.4
2.2
UNIT
ns
switching characteristics over recommended operating free-air temperature range, CL = 30 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
Y
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
MIN
TYP
MAX
MIN
MAX
0.8
1.7
2.8
0.8
1.3
UNIT
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
Power dissipation
capacitance
TEST
CONDITIONS
f = 10 MHz
VCC = 0.8 V
TYP
2
POST OFFICE BOX 655303
VCC = 1.2 V
TYP
VCC = 1.5 V
TYP
2
• DALLAS, TEXAS 75265
2
VCC = 1.8 V
TYP
3
VCC = 2.5 V
TYP
3
UNIT
pF
3
SN74AUC06
HEX INVERTER BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS
SCES471 – AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
(OPEN DRAIN)
From Output
Under Test
VLOAD
Open
S1
RL
TEST
GND
RL
CL
(see Note A)
S1
tPZL (see Notes E and F)
tPLZ (see Notes E and G)
VLOAD
VLOAD
tPHZ/tPZH
VLOAD
LOAD CIRCUIT
INPUT
VCC
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
VI
tr/tf
≤ 2 ns
≤ 2 ns
≤ 2 ns
≤ 2 ns
≤ 2 ns
≤ 2 ns
≤ 2 ns
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VM
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VI
VM
Input
tPHL
tPLH
VM
VM
VOL
V∆
15 pF
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
1 kΩ
500 Ω
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.15 V
0.15 V
VI
VM
VM
0V
tPLZ
VLOAD/2
VM
VM
VOL
Output
Waveform 2
S1 at VLOAD
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + V∆
VOL
tPHZ
tPZH
VOH
VM
RL
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
tPHL
CL
tPZL
VOH
Output
2 × VCC
2 × VCC
2 × VCC
2 × VCC
2 × VCC
2 × VCC
2 × VCC
Output
Control
VM
0V
Output
VLOAD
VM
VLOAD/2
VLOAD/2 – V∆
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VM.
G. tPLZ is measured at VOL + V∆.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
SN74AUC06RGYR
ACTIVE
QFN
RGY
Pins Package Eco Plan (2)
Qty
14
1000 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
CU NIPDAU
MSL Peak Temp (3)
Level-2-260C-1YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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