FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J 8M–Word × 16–Bit or 16M–Word × 8–Bit Issue Date: Jul. 9, 2004 P2ROM FEATURES PIN CONFIGURATION (TOP VIEW) ·8,388,608-word × 16-bit/16,777,216-word × 8-bit electrically switchable configuration · Access time · MR27T12800J-xxxTN, MR27T12800J-xxxTY · 2.7 V to 3.6 V power supply 90 ns MAX · MR27T12800J-xxxTNE , MR27T12800J-xxxTYE · 2.7 V to 3.0 V power supply 120 ns MAX · 3.0 V to 3.6 V power supply 100 ns MAX · Operating current 25 mA MAX(5MHz) · Standby current 10 µA MAX · Input/Output TTL compatible · Three-state output PACKAGES · MR27T12800J-xxxTN , MR27T12800J-xxxTNE 48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K) · MR27T12800J-xxxTY, MR27T12800J-xxxTYE 48-pin plastic TSOP (TSOP I 48-P-1220-0.50-L) MR27T12800J-xxxTN MR27T12800J-xxxTNE BYTE# A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# · Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive lead-time and minimize liability as a custom product. · No mask charge, since P2ROMs do not utilize a custom mask for storing customer code, no mask charges apply. · No additional programming charge, unlike Flash and OTP that require additional programming and handling costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput. The cost is included in the unit price. · Custom Marking is available at no additional charge. · Pin Compatible with Mask ROM 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 Vss Vss D15/A–1 D7 D14 D6 D13 D5 D12 D4 VCC VCC A22 D11 D3 D10 D2 D9 D1 D8 D0 OE # Vss Vss MR27T12800J-xxxTY MR27T12800J-xxxTYE P2ROM ADVANCED TECHNOLOGY P2ROM stands for Production Programmed ROM. This exclusive Oki technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final production testing. Advancements in this technology allows production costs to be equivalent to MASKROM and has many advantages and added benefits over the other non-volatile technologies, which include the following; 1 Vss Vss D15/A–1 D7 D14 D6 D13 D5 D12 D4 VCC 48 1 47 2 46 3 45 4 44 5 43 6 42 7 41 8 VCC A22 D11 D3 D10 D2 D9 D1 D8 D0 OE # Vss Vss 40 9 39 10 38 11 37 12 36 13 35 14 34 15 33 16 32 17 31 18 30 19 29 20 28 21 27 22 26 23 25 24 BYTE# A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# 48TSOP(Type-I) 1/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM BLOCK DIAGRAM A–1 OE# CE OE Row Decoder CE# BYTE# Memory Cell Matrix 8M × 16-Bit or 16M × 8-Bit Column Decoder A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 Address Buffer × 8/× 16 Switch Multiplexer Output Buffer D0 D2 D1 D4 D3 D6 D5 D8 D7 D10 D9 D12 D11 D14 D13 D15 In 8-bit output mode, these pins are placed in a high-Z state and pin D15 functions as the A-1 address pin. PIN DESCRIPTIONS Pin name Functions D15 / A–1 Data output / Address input A0 to A22 Address inputs D0 to D14 Data outputs CE# Chip enable input OE# Output enable input BYTE# Word / Byte select input VCC Power supply voltage VSS Ground 2/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM FUNCTION TABLE Mode CE# OE# BYTE# Read (16-Bit) L L H Read (8-Bit) L L Output disable L Standby L 2.7 V D8 to D14 DOUT Hi–Z to L D15/A–1 L/H Hi–Z ∗ 3.6 V H ∗ D0 to D7 DOUT H H H VCC Hi–Z L ∗ ∗: Don’t Care (H or L) ABSOLUTE MAXIMUM RATINGS Parameter Symbol Operating temperature under bias Storage temperature Condition Ta Input voltage VI relative to VSS Unit 0 to 70 °C –55 to 125 °C –0.5 to VCC+0.5 V –0.5 to VCC+0.5 V –0.5 to 5 V — Tstg Value Output voltage VO Power supply voltage VCC Power dissipation per package PD Ta = 25°C 1.0 W Output short circuit current IOS — 10 mA RECOMMENDED OPERATING CONDITIONS (Ta = 0 to 70°C) Parameter Symbol VCC power supply voltage VCC Input “H” level VIH Input “L” level VIL Condition Min. Typ. 2.7 2.2 –0.5∗∗ VCC = 2.7 to 3.6 V Max. Unit — 3.6 V — VCC+0.5∗ V — 0.6 V Voltage is relative to VSS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns. PIN CAPACITANCE (VCC = 3.0 V, Ta = 25°C, f = 1 MHz) Parameter Symbol Input CIN1 BYTE# CIN2 Output COUT Condition VI = 0 V VO = 0 V Min. Typ. Max. — — 8 — — 200 — — 10 Unit pF 3/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS (VCC = 2.7 to 3.6 V, Ta = 0 to 70°C) Symbol Condition Min. Typ. Max. Unit Input leakage current Parameter ILI VI = 0 to VCC — — 5 µA Output leakage current ILO VO = 0 to VCC — — 5 µA VCC power supply current ICCSC CE# = VCC — — 10 µA (Standby) ICCST CE# = VIH — — 1 mA 25 mA VCC power supply current (Read) Input “H” level ICCA VIH CE# = VIL, OE# = VIH f=5MHz — 2.2 — VCC+0.5∗ V Input “L” level VIL — –0.5∗∗ — 0.6 V Output “H” level VOH IOH = –1 mA 2.4 — — V Output “L” level VOL IOL = 2 mA — — 0.4 V Voltage is relative to VSS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns. 4/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM AC CHARACTERISTICS - MR27T12800J-xxxTN, MR27T12800J-xxxTY Parameter (VCC = 2.7 to 3.6 V, Ta = 0 to 70°C) Symbol Condition Min. Max. Unit tC — 90 — ns Address access time tACC CE# = OE# = VIL — 90 ns CE# access time tCE OE# = VIL — 90 ns OE# access time tOE CE# = VIL — 30 ns Address cycle time Output disable time Output hold time tCHZ OE# = VIL 0 20 ns tOHZ CE# = VIL 0 20 ns tOH CE# = OE# = VIL 0 — ns - MR27T12800J-xxxTNE, MR27T12800J-xxxTYE Parameter (VCC = 2.7 to 3.6 V, Ta = 0 to 70°C) Symbol Condition tC — Address access time tACC CE# = OE# = VIL — CE# access time tCE OE# = VIL — OE# access time tOE CE# = VIL — 30 ns tCHZ OE# = VIL 0 20 ns Address cycle time Output disable time Output hold time Min. 120(VCC = 2.7 to 3.0 V) 100(VCC = 3.0 to 3.6 V) Max. Unit — ns 120(VCC = 2.7 to 3.0 V) 100(VCC = 3.0 to 3.6 V) 120(VCC = 2.7 to 3.0 V) 100(VCC = 3.0 to 3.6 V) ns ns tOHZ CE# = VIL 0 20 ns tOH CE# = OE# = VIL 0 — ns Measurement conditions Input signal level --------------------------------------0 V/3 V Input timing reference level-------------------------1/2Vcc Output load ---------------------------------------------50 pF Output timing reference level ------------------- 1/2Vcc Output load Output 50 pF (Including scope and jig) 5/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM TIMING CHART (READ CYCLE) 16-Bit READ MODE (BYTE# = VIH) tC tC A0 to A22 tOH tACC tCE CE# tOE tCHZ tOH OE# tOHZ tACC D0 to D15 Valid Data Hi-Z Valid Data Hi-Z 8-BIT READ MODE (BYTE# = VIL) tC tC A-1 to A22 tOH tACC tCE CE# tOE tCHZ tOH OE# tOHZ tACC D0 to D7 Hi-Z Valid Data Valid Data Hi-Z 6/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM PACKAGE DIMENSIONS (Unit: mm) TSOP(1)48-P-1220-0.50-1K Mirror finish 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 0.55 TYP. 1/Dec. 2, 1999 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 7/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM (Unit: mm) TSOP(1)48-P-1220-0.50-L r 6;2 㨪q r r 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised r /#: 㨪 r 6;2 r r Epoxy resin 42 alloy Solder plating (≥5µm) 0.55 TYP. 1/Feb. 27, 2003 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 8/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM REVISION HISTORY Document Page Date Previous Edition Current Edition FEDR27T12800J-02-01 July. 2002 – – FEDR27T12800J-02-02 Jan. 2003 1, 5 1, 5 FEDR27T12800J-02-03 Jan. 2003 1 1 FEDR27T12800J-02-04 Feb. 2003 1, 5 1, 5 No. Description Change tC, tACC, tCE to 120ns Added P/N to MR27T12800J-xxxTNE Added MR27T12800J-xxxTY 1.Change tC, tACC, tCE FEDR27T12800J-02-05 Mar. 10, 2003 1, 5 1, 5 to 90ns(MR27T12800J-xxxTY) 2. Added MR27T12800J-xxxTYE FEDR27T12800J-02-06 Jun. 4, 2003 3, 4, 5 3, 4, 5 FEDR27T12800J-02-07 Jul. 9, 2004 3 3 Change Ta to 0°C Add PD condition and IOS = 10mA 9/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2004 Oki Electric Industry Co., Ltd. 10/10