E2E0013-38-93 ¡ Semiconductor MSM6404A/6404VS ¡ Semiconductor This MSM6404A/6404VS version: Sep. 1998 Previous version: Mar. 1996 High speed and High performance 4-Bit Microcontroller GENERAL DESCRIPTION The MSM6404A microcontroller is a low-power device implemented in complementary metaloxide semiconductor technology. The MSM6404A is optimized for high-speed processing and complicated-control applications. The MSM6404VS is a CMOS 4-bit microcontroller that employs an external EPROM using a piggy-back package in place of the program memory (ROM) internal to the MSM6404A. The MSM6404VS can be used for program development verification because the programs can be modified by programming an external EPROM 2732 equivalent or 2764A equivalent. FEATURES • Mask ROM (MSM6404A) : 4000 words ¥ 8 bits External ROM (MSM6404VS) : 8196 words ¥ 8 bits • RAM (including the stack area) : 256 words ¥ 4 bits • I/O port Input-output port : 8 ports ¥ 4 bits Input port : 1 port ¥ 4 bits 4 bits are for input ports having a latch; the other 32 bits are input/output ports that allow bit manipulation • Three built-in counters : 12-bit time-base counter 12-bit programmable timer 8-bit high-speed programmable timer/event counter • Built-in 8-bit serial I/O register (with 3-bit counter) • Five interrupts with five priority levels (4 internal, 1 external) • 32 stacks (in RAM) • Power-down features • Minimum instruction execution time : 952 ns @ 4.2 MHz clock • Instruction systems suitable for control • Fully static operation • Low power consumption • Single 5 V supply • Package options: MSM6404A 42-pin plastic DIP (DIP42-P-600-2.54) : (Product name : MSM6404A-¥¥¥RS) 44-pin plastic QFP (QFP44-P-910-0.80-K) : (Product name : MSM6404A-¥¥¥GS-K) 44-pin plastic QFP (QFP44-P-910-0.80-2K) : (Product name : MSM6404A-¥¥¥GS-2K) MSM6404VS 42-pin ceramic piggyback (ADIP42-C-600-2.54) : (Product name : MSM6404VS) ¥¥¥ indicates a code number. 1/25 INSTR DEC ACC 4000 ¥ 8 bits DEC SP ¡ Semiconductor ROM 16 ¥ 16 ¥ 4 bits BLOCK DIAGRAM MSM6404A RAM DEC H C L 12-bit Timer P9 8-bit T/C PA ALU F Interrupt PC INTE Control PD IRQ 8-bit SR 12-bit TBC P8 P7 P6 P5 P4 P3 P2 3210 3210 3210 3210 3210 3210 3210 P1 11 PC 0 PB Timing & Control OSC0 OSC1 TEST RESET VDD P0 GND 3210 3210 INT CIN SCK, CTO, CLK TCK SO SI 2/25 MSM6404A/6404VS TMO ACC DEC SP H C L 12-bit Timer P9 8-bit T/C PA ALU F Interrupt PC INTE Control PD IRQ 8-bit SR 12-bit TBC P8 P7 P6 P5 P4 P3 P2 3210 3210 3210 3210 3210 3210 3210 P1 INT 12 PC RV I0 to I7 DV A0 to A12 0 ¡ Semiconductor INSTR DEC BLOCK DIAGRAM (continued) MSM6404VS RAM 16 ¥ 16 ¥ 4 bits PB Timing & Control OSC0 OSC1 TEST RESET VDD P0 GND 3210 3210 CIN SCK, CTO, CLK TCK SO SI 3/25 MSM6404A/6404VS TMO ¡ Semiconductor MSM6404A/6404VS PIN CONFIGURATION (TOP VIEW) P4.0 1 42 VDD P4.1 2 41 P5.3 P4.2 3 40 P5.2 P4.3 4 39 P5.1 P3.0 5 38 P5.0 P3.1 6 37 P6.3 P3.2 7 36 P6.2 P3.3 8 35 P6.1 OSC0 9 34 P6.0 OSC1 10 RESET 11 33 32 P7.3 P7.2 TEST 12 31 P7.1 P2.0 13 30 P7.0 P2.1 14 29 P8.3 P2.2 15 28 P8.2 P2.3 16 27 P8.1 P0.0 17 P0.1 18 26 25 P8.0 P1.3 P0.2 19 24 P1.2 P0.3 20 23 P1.1 GND 21 22 P1.0 42-Pin Plastic DIP 4/25 ¡ Semiconductor MSM6404A/6404VS P3.1 1 P3.2 2 P3.3 3 OSC0 4 OSC1 5 RESET 6 TEST 7 P2.0 8 P2.1 9 34 P6.3 35 P5.0 36 P5.1 37 P5.2 38 P5.3 39 VDD 40 P4.0 41 P4.1 42 P4.2 43 P4.3 44 P3.0 PIN CONFIGURATION (TOP VIEW) (continued) 33 P6.2 32 P6.1 31 P6.0 30 NC 29 P7.3 28 P7.2 27 P7.1 26 P7.0 P8.0 22 P1.3 21 P1.2 20 P1.1 19 NC 17 P1.0 18 P0.3 15 GND 16 23 P8.1 P0.2 14 P2.3 11 P0.1 13 25 P8.3 24 P8.2 P0.0 12 P2.2 10 NC: No-connection pin 44-Pin Plastic QFP 5/25 ¡ Semiconductor MSM6404A/6404VS PIN CONFIGURATION (TOP VIEW) (continued) P4.0 1 P4.1 2 P4.2 3 P4.3 4 P3.0 5 P3.1 6 P3.2 7 P3.3 8 OSC0 9 OSC1 10 RESET 11 TEST 12 P2.0/INT 13 P2.1 14 P2.2 15 qVPP/VDD wA12 VDD@8 PGM/VDD@7 eA7 VDD@6 rA6 A8@5 tA5 A9@4 yA4 A11@3 uA3 OE/GND@2 iA2 A10@1 oA1 CE/GND@0 !0A0 I7!9 !1I0 I6!8 !2I1 I5!7 !3I2 I4!6 !4GND I3!5 42 VDD 41 P5.3 40 P5.2 39 P5.1 38 P5.0 37 P6.3 36 P6.2 35 P6.1 34 P6.0 33 P7.3 32 P7.2 31 P7.1 30 P7.0 29 P8.3 28 P8.2 P2.3 16 27 P8.1 P0.0 17 26 P8.0 P0.1/SCK 18 25 P1.3 P0.2/SO 19 24 P1.2/TCK P0.3/SI 20 23 P1.1/TMO GND 21 22 P1.0/CIN 42-Pin Ceramic Piggyback 6/25 ¡ Semiconductor MSM6404A/6404VS PIN DESCRIPTIONS Symbol Type Description During reset P0.0 P0.1/SCK P0.2/SO I/O P0.3/SI P0.1 is shared with serial clock (SCK) input/output. P0.2 is shared with serial data (SO) output. P0.3 is shared with serial data (SI) input. P1.0/CIN P1.0 is shared with counter input (CIN). P1.1/TMO P1.1 is shared with timer output (TMO). P1.2/TCK "1" I/O P1.2 is shared with timer clock input (TCK). "1" P1.3 P2.0/INT P2.1 P2.2 P2.0 is shared with external interrupt input (INT). I The latch is Input port with a latch, built-in pull-up resistor reset. P2.3 P3.0 to 3.3 I/O P4.0 to 4.3 I/O P5.0 to 5.3 I/O P6.0 to 6.3 I/O — "0" P7.0 to 7.3 I/O — "0" P8.0 to 8.3 I/O — — 8-bit output ports (at OPT instruction execution) "1" "0" "0" OSC0 I OSC1 O TEST O (Test pin for manufacturer) Pulse output RESET I Input pin for system reset — — Power supply voltage pins — VDD GND Crystal connection pins for clock oscillation Oscillation waveform Note: 1. The ports except for pins P2.0 to P2.3 are pseudo bidirectional ports. 2. When each port is used for output, the MSM6404A can drive one TTL (one input) and the MSM6404VS can drive one LS TTL (one input). Upper Pins for MSM6404VS Symbol A0 to A12 Type Description O Address output I0 to I7 I Data input CE/GND I Chip enable input OE/GND I Output enable input PGM/VDD I Program input VDD GND VPP/VDD — Power supply voltage pins — Programed power supply voltage pin 7/25 ¡ Semiconductor MSM6404A/6404VS ABSOLUTE MAXIMUM RATINGS (MSM6404A) Parameter Power Supply Voltage Symbol Input Voltage VI Output Voltage VO Power Dissipation PD Storage Temperature Condition Rating Unit –0.3 to +7 V –0.3 to VDD V –0.3 to VDD V 200 max. mW Ta = 25°C per output 50 max. mW — –55 to +150 °C VDD TSTG Ta = 25°C Ta = 25°C per package RECOMMENDED OPERATING CONDITIONS (MSM6404A) Parameter Symbol Condition Range Unit fOSC £ 1 MHz 3 to 6 V fOSC £ 4.2 MHz 4.5 to 5.5 V Power Supply Voltage VDD Data-Hold Voltage VDDH fOSC = 0 Hz 2 to 6 V Top — –40 to +85 °C MOS load 15 TTL load 1 Operating Temperature Fan Out N — Note: Refer to the fOSC-VDD characteristic in OPERATING CHARACTERISTICS for the relation-ship between power supply voltage and operating frequency. 8/25 ¡ Semiconductor MSM6404A/6404VS ELECTRICAL CHARACTERISTICS (MSM6404A) DC Characteristics (VDD = 5 V ±10%, Ta = –40 to +85°C) Parameter Symbol Condition Min. Typ. Max. Unit "H" Input Voltage*1, *2 VIH — 2.4 — VDD V "H" Input Voltage*3, *4 VIH — 3.6 — VDD V "L" Input Voltage VIL — –0.3 — +0.8 V "H" Output Voltage*1, *5 VOH IO = –15 mA 4.2 — — V "L" Output Voltage*1 VOL IO = 1.6 mA — — 0.4 V VOL IO = 15 mA — — 0.4 V Input Current*3 IIH/IIL VI = VDD/0 V — — 15/–15 mA Input Current*2, *4 IIH/IIL VI = VDD/0 V — — 1/–30 mA "H" Output Current*1 IOH VO = 2.4 V –0.1 — — mA VO = 0.4 V mA "L" Output Voltage*5 "H" Output Current*1 IOH Input Capacitance CI Output Capacitance CO Power Supply Current (In Stop Mode) Power Supply Current *1 *2 *3 *4 *5 IDDS IDD — — –1.2 — 5 — — 7 — VDD = 2 V, no load, Ta = 25°C — 0.2 5 mA No load — 1 100 mA — 6 12 mA f = 1 MHz, Ta = 25°C Crystal oscillation f = 4.194304 MHz, no load pF Applied to P0, P1, P3, P4, P5, P6, P7 and P8. Applied to P2. Applied to OSC0. Applied to RESET. Applied to OSC1. 9/25 ¡ Semiconductor MSM6404A/6404VS AC Characteristics (MSM6404A) (VDD = 5 V ±10%, Ta = –40 to +85°C) Parameter Symbol Condition Min. Typ. Max. Unit Clock (OSC0) Pulse Width tfW — 119 — — ns Cycle Time tCY — 952 — — ns Input Data Setup Time tDS — 120 — — ns Input Data Hold Time tDH — 120 — — ns tWS/tWT — 120 — — ns CT Clock Pulse Width tWC — — — ns P2 Input Data Clock Pulse Width tWP — 120 — — ns SR Data Setup Time tSS — 120 — — ns SR/TM Clock Pulse Width 2/8 tCY + 120 SR Data Hold Time tSH — 120 — — ns Data Delay Time tDR CL = 15 pF — — tCY + 300 ns tDCR CL = 15 pF — — tDI1 CL = 15 pF — — tDI2 CL = 15 pF — — tCT/tTT CL = 15 pF — — tSR/tTR CL = 15 pF — — tCR CL = 15 pF — — tCP CL = 15 pF — — tSP/tTP CL = 15 pF — — 360 ns SR Clock Invalid Time tSINH — 2/8 tCY — — ns INT Invalid Time tIINH — 1/8 tCY — — ns Data Delay Time at Mode Switching Data Delay Time at OPT Instruction Data Delay Time at OPT Instruction CT/TM Data Delay Time Using TBC Clock SR/TM Data Delay Time Using PORT Clock CT Data Delay Time Using PORT Clock CT Data Delay Time Using External Clock SR/TM Data Delay Time Using External Clock 7/8 tCY + 300 6/8 tCY + 300 7/8 tCY + 300 2/8 tCY + 360 tCY + 480 10/8 tCY + 480 2/8 tCY + 360 ns ns ns ns ns ns ns 10/25 ¡ Semiconductor MSM6404A/6404VS Timing Diagrams (MSM6404A) Output Conditions 1MC OSC0 tCY P0, P1, P3 P4, P5, P6 P7, P8 0, 1, 3 PA = 4, 5, 6 7 or 8 tDR P0.1 P0.2 P0.3 PA = 9 or A P4 OPT INST. tDCR tDI1 P5 OPT INST. tDI2 P0.1 P1.1 CT TBC clock TM tCT tTT P0.2 P0.1 clock* SR P1.1 P1.2 clock* TM tSR tTR P0.1 P1.0 clock* CT tCR P0.1 EXT clock P1.0 P1.2 EXT clock P0.1 CT tCP P0.2 SR P1.1 TM tSP tTP * Output data to port is clock for SR, TM or CT. 11/25 ¡ Semiconductor MSM6404A/6404VS Input Conditions 1MC OSC0 tfW P0, P1, P2 P3, P4, P5 P6, P7, P8 tfW INPUT DATA tDS tDH P0.1 SR clock P1.2 TM clock P2 tWS tWT tWP P1.0 CT clock tWC P0.1 SR clock INPUT DATA P0.3 SI tSS tSH 1MC OSC0 tIINH tSINH tSINH : tIINH : P0.1 (SR clock) INH period during LMSR INST. (Note : P0.1 is used for clock of SR.) P2.0 (interrupt) INH period during RPB and RPBD INST. 12/25 ¡ Semiconductor MSM6404A/6404VS Operating Characteristics (MSM6404A) Current (IOH) vs Voltage (VOH) for High State Output Current (IOL) vs Voltage (VOL) for Low State Output Ta = 25°C –1.0 20 –0.9 18 –0.8 14 –0.6 12 –0.5 10 5V –0.4 –0.3 8 4 3V –0.1 1 2 3 2 4 5 6 VOH (V) 7 8 0 9 10 Maximum Clock Frequency (fOSC) vs Supply Voltage (VDD) Ta = 25°C, CL =1 5 pF 10 1 2 3 4 5 6 VOL (V) 7 8 9 10 Supply Current (IDD) vs Supply Voltage (VDD) Ta = 25°C, no load 10 m 9 fOSC = 4 MHz 8 2 MHz 7 fOSC (MHz) 3V 6 4V –0.2 0 4V IOL (mA) IOH (mA) 16 VDD = 6 V –0.7 Ta = 25°C VDD = 5 V 6V 1 MHz 1m 6 500 kHz 5 4 100 m 3 100 kHz 1 0 1 2 3 4 5 6 VDD (V) 7 8 9 10 Maximum Clock Frequency (fOSC) vs Temperature (Ta) 10 fOSC (MHz) 7 10 m 0 Hz 1m CL = 15 pF 100 n 0 9 8 IDD (A) 2 VDD = 5 V 1 2 3 4 5 6 VDD (V) 7 8 9 10 6 5 4 3 2 1 0 –40 –20 0 20 40 60 80 100120 Ta (°C) 13/25 ¡ Semiconductor MSM6404A/6404VS ABSOLUTE MAXIMUM RATINGS (MSM6404VS) Parameter Power Supply Voltage Symbol VI Output Voltage VO Storage Temperature Rating –0.3 to +7 V Ta = 25°C –0.3 to VDD V VDD Input Voltage Power Dissipation Condition PD TSTG Unit –0.3 to VDD V 200 max. mW Ta = 25°C per output 50 max. mW — –55 to +150 °C Ta = 25°C per package RECOMMENDED OPERATING CONDITIONS (MSM6404VS) Parameter Symbol Power Supply Voltage VDD Data-Hold Voltage VDDH Operating Temperature Fan Out Top N Condition Range Unit fOSC £ 1 MHz 3 to 6 V fOSC £ 4.2 MHz 4.75 to 5.25 V fOSC = 0 Hz 2 to 6 V °C — 0 to +40 MOS load 15 LSTTL load 1 — 14/25 ¡ Semiconductor MSM6404A/6404VS ELECTRICAL CHARACTERISTICS (MSM6404VS) DC Characteristics (VDD = 5 V ±5%, Ta = 0 to +40°C) Parameter Symbol Condition Min. Typ. Max. Unit "H" Input Voltage*1, *2 VIH — 3.6 — VDD V "H" Input Voltage*3, *4 VIH — 3.6 — VDD V "L" Input Voltage VIL — –0.3 — +0.8 V "H" Output Voltage*1, *5 VOH IO = –15 mA 4.2 — — V "L" Output Voltage*1 VOL IO = 0.4 mA — — 0.4 V VOL IO = 15 mA — — 0.4 V Input Current*3 IIH/IIL VI = VDD/0 V — — 15/–15 mA Input Current*2, *4 IIH/IIL VI = VDD/0 V — — 1/–30 mA "H" Output Current*1 IOH VO = 2.4 V –0.1 — — mA "H" Output Current*1 IOH VO = 0.4 V mA Input Capacitance CI Output Capacitance CO "L" Output Voltage*5 Power Supply Current*6 (In Stop Mode) Power Supply Current*6 *1 *2 *3 *4 *5 *6 IDDS IDD — — –1.2 — 5 — — 7 — VDD = 2 V, no load, Ta = 25°C — 1 5 mA No load — 10 100 mA — 6 12 mA f = 1 MHz, Ta = 25°C Crystal oscillation f = 4.2 MHz, no load pF Applied to P0, P1, P3, P4, P5, P6, P7 and P8. Applied to P2. Applied to OSC0. Applied to RESET. Applied to OSC1. The EPROM current is not included. 15/25 ¡ Semiconductor MSM6404A/6404VS AC Characteristics (MSM6404VS) (VDD = 5 V ±5%, Ta = 0 to +40°C) Parameter Symbol Condition Min. Typ. Max. Unit Clock (OSC0) Pulse Width tfW — 119 — — ns Cycle Time tCY — 952 — — ns Input Data Setup Time tDS — 120 — — ns Input Data Hold Time tDH — 120 — — ns tWS/tWT — 120 — — ns — — ns SR/TM Clock Pulse Width 2/8 tCY CT Clock Pulse Width tWC — P2 Input Data Clock Pulse Width tWP — 120 — — ns SR Data Setup Time tSS — 120 — — ns SR Data Hold Time tSH — 120 — — ns Data Delay Time tDR CL = 15 pF — — tCY + 300 ns tDCR CL = 15 pF — — tDI1 CL = 15 pF — — tDI2 CL = 15 pF — — tCT/tTT CL = 15 pF — — tSR/tTR CL = 15 pF — — tCR CL = 15 pF — — tCP CL = 15 pF — — tSP/tTP CL = 15 pF — — 360 ns SR Clock Invalid Time tSINH — 2/8 tCY — — ns INT Invalid Time tIINH — 1/8 tCY — — ns Data Delay Time at Mode Switching Data Delay Time at OPT Instruction Data Delay Time at OPT Instruction CT/TM Data Delay Time Using TBC Clock SR/TM Data Delay Time Using PORT Clock CT Data Delay Time Using PORT Clock CT Data Delay Time Using External Clock SR/TM Data Delay Time Using External Clock + 120 7/8 tCY + 300 6/8 tCY + 300 7/8 tCY + 300 2/8 tCY + 360 tCY + 480 10/8 tCY + 480 2/8 tCY + 360 ns ns ns ns ns ns ns 16/25 ¡ Semiconductor MSM6404A/6404VS Timing Diagrams (MSM6404VS) Output Conditions 1MC OSC0 tCY P0, P1, P3 P4, P5, P6 P7, P8 tDR P0.1 P0.2 P1.1 tDCR P4 OPT INST. tDI1 P5 OPT INST. tDI2 P0.1/CTO P1.1/TMO TBC clock tCT tTT P0.2/SO P1.1/TMO P0.1 clock P1.2 clock tSR tTR P0.1/CTO P1.0 clock tCR EXT clock P0.1 P1.0, P1.2 EXT clock P0.1/CTO tCP P0.2/SO P1.1/TMO tSP tTP 1MC OSC0 tIINH tSINH tSINH tIINH : : P0.1/SCK inhibit period during LMSR INST. P2.0/INT inhibit period during RPB and RPBD INST. 17/25 ¡ Semiconductor MSM6404A/6404VS Input Conditions 1MC OSC0 tfW P0, P1, P2 P3, P4, P5 P6, P7, P8 tfW INPUT DATA tDS tDH P0.1 SR clock P1.2 TM clock P2 tWS tWT tWP P1.0 CT clock tWC P0.1/SCK P0.3/SI INPUT DATA tSS tSH 18/25 ¡ Semiconductor MSM6404A/6404VS Operating Characteristics (MSM6404VS) Current (IOH) vs Voltage (VOH) for High State Output Current (IOL) vs Voltage (VOL) for Low State Output Ta = 25°C, excluding pins A0-A12 –1.0 –0.9 18 –0.8 14 IOL (mA) IOH (mA) 16 VDD = 6 V –0.7 –0.6 12 –0.5 10 5V –0.4 –0.3 8 1 2 3 4V 2 4 5 6 VOH (V) 7 8 0 9 10 Maximum Clock Frequency (fOSC) vs Supply Voltage (VDD) Ta = 25°C, CL = 15 pF 10 5V 4 3V –0.1 VDD = 6 V 6 4V –0.2 0 Ta = 25°C 20 3V 1 2 3 8 9 10 Ta = 25°C, no load, excluding EPROM current fOSC = 4 MHz 2 MHz 1 MHz 500 kHz 100 kHz 10 m 5m 8 7 1m 500 m 5 4 3 100 m 2 50 m 1 0 1 2 3 4 5 6 VDD (V) 7 8 9 10 Maximum Clock Frequency (fOSC) vs Temperature (Ta) 10 IDD (A) fOSC (MHz) 7 Supply Current (IDD) vs Supply Voltage (VDD) 9 6 4 5 6 VOL (V) 0 Hz 10 m 5m 1m 500 n VDD = 5 V, CL = 15 pF 100 n 0 9 8 1 2 3 4 5 6 VDD (V) 7 8 9 10 fOSC (MHz) 7 6 5 4 3 2 1 0 –40 –20 0 20 40 60 80 100120 Ta (°C) 19/25 ¡ Semiconductor MSM6404A/6404VS FUNCTIONAL DESCRIPTION MSM6404VS Interface to EPROM EPROM insertion method 2732 2764A 2732 EPROM 2764A EPROM EPROM read timing 1MC T1 T2 T3 T4 T1 OSC0 tfW tfW Address A0 to A12 CE, OE Read Data I0 to I7 tACC Use EPROM with tACC of less than 357 ns. Read data is read into the instruction register in the first half of the T1 state. 20/25 ¡ Semiconductor MSM6404A/6404VS Differences between MSM6404A and MSM6404VS (PIGGYBACK) Item 1. Port MSM6404A MSM6404VS (Piggyback) Ports P0, 1, 3 are set to "1" and ports P2, 4, Ports P0, 1, 3 are set to "1" and ports P2, 4, initialization 5, 6, 7, 8 are reset to "0" directly by the reset 5, 6, 7, 8 are initialized during reset cycle. during reset input signal. 2. Timer operation After being reset, the timer continues to stop It is undefined whether the timer starts or until data is set in it. not after being reset. Therefore, the timer should be initialized by software. 3. Shift register Serial out F/F (SOF/F) is set to "0" after being It is undefined whether serial out F/F reset. (SOF/F) is "0" or "1" after being reset. Therefore the serial out F/F should be initialized by software. 4. Port Internal clock Internal clock input/output timing Data are input Input at this time. Synchronized with falling edge Internal clock Output 5. Port input/output Data are output at this time. TTL FO = "1" Data are input Input at this time. Internal clock Output Data are output at this time. LSTTL FO = "1" (IOL = 1.6 mA @ 0.4 V) (IOL = 0.4 mA @ 0.4 V) VDD characteristics P2.0-3 VDD VDD P2.0-3 TTL compatible input P0.0-P8.3 CMOS input P0.0-P8.3 (Except P2.0-3) 6. Available ROM (Except P2.0-3) Up to 4 Kbytes Up to 8 Kbytes accessible Not available Available capacity 7. LJP a13, LCAL a13 instruction 21/25 ¡ Semiconductor MSM6404A/6404VS PACKAGE DIMENSIONS (Unit : mm) DIP42-P-600-2.54 Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 6.20 TYP. 22/25 ¡ Semiconductor MSM6404A/6404VS (Unit : mm) QFP44-P-910-0.80-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.35 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 23/25 ¡ Semiconductor MSM6404A/6404VS (Unit : mm) QFP44-P-910-0.80-2K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Epoxy resin 42 alloy Solder plating 5 mm or more Package weight (g) 0.41 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 24/25 ¡ Semiconductor MSM6404A/6404VS (Unit : mm) 42-PIN CERAMIC PIGGYBACK ADIP42-C-600-2.54 25/25