PI74LVTC16244 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs Product Features Product Description · Advanced low power CMOS design for 2.7V to 3.6V VCC operation Pericom Semiconductor’s PI74LVTC series of logic circuits are produced using the Company’s advanced CMOS technology, achieving industry leading speed. · Supports 5V input/output tolerance in mixed signal mode operation The PI74LVTC16244 is a non-inverting 16-bit buffer and line driver designed for low-voltage 2.7V to 3.6V VCC operation, with the capability of interfacing to the 5V system environment. This buffer/driver is designed specifically to improve both the performance and density of 3-State memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. · Function compatible with LVT family of products · Balanced ±24mA output drive · Typical VOLP (Output Ground Bounce) <0.8V at VCC=3.3V, TA=25°C · Ioff and Power Up/Down 3-State support live insertion · Latch-up performance exceeds 200mA Per JESD78 · ESD protection exceeds JESD 22 - 2000V Human-Body Model (A114-B) - 200V Machine Model (A115-A) When VCC is between 0 to 1.5V during power up or power down, the device is in the high-impedance state. To ensure the highimpedance state above 1.5V, OE should be tied to Vcc through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. · Available Packages (Pb-free available): - 48-pin 240-mil wide plastic TSSOP (A48) - 48-pin 300-mil wide plastic SSOP (V48) · Industrial Temperature: -40°C to +85°C The device fully supports live-insertion with its Ioff and power-up/ down 3-state. The Ioff circuitry disables the outputs when the power is off, preventing the backflow of damaging current through the device. Power-up/down 3-state places the outputs in the highimpedance state during power up or power down, preventing driver conflict. Logic Block Diagram 1OE 1A1 1A2 1A3 1A4 2OE 2A1 2A2 2A3 2A4 1 3OE 47 2 46 3 44 5 43 6 1Y1 3A1 1Y2 3A2 1Y3 3A3 1Y4 3A4 48 4OE 41 8 2Y1 40 9 38 11 37 12 4A1 2Y2 4A2 2Y3 4A3 2Y4 4A4 1 25 36 13 35 14 33 16 32 17 3Y1 3Y2 3Y3 3Y4 24 30 19 29 20 27 22 26 23 4Y1 4Y2 4Y3 4Y4 PS8652A 05/19/03 PI74LVTC16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Product Pin Description Pin Name Supply voltage range, VCC ............................ –0.5V to +6.5V Input voltage range, VI(1) ............................... –0.5V to +6.5V Voltage range applied to any output in the high-impedance or power-off state, VO(1) ..... –0.5V to +6.5V Voltage range applied to any output in the active state, VO(1), (2) ............................... –0.5V to VCC +0.5V Input clamp current, IIK (VI <0) ................................... –50mA Output clamp current, IOK (VO <0) .............................. –50mA Continous Output Current IO ........................................ ±50mA Continous Current through each VCC or GND pin ............ ±100mA Package thermal impedance, θJA(3): package A ....... 104°C/W package V ... 94°C/W Storage Temperature range, Tstg .................... –65°C to 150°C xAx Inputs xYx 3- State Outputs GND Ground VC C Power 1OE 1 48 2OE 1Y1 2 47 1A1 1Y2 3 46 1A2 GND 4 45 GND 1Y3 5 44 1A3 1Y4 6 43 1A4 7 42 VCC 2Y1 8 41 2A1 2Y2 9 40 2A2 GND 10 39 GND 2Y3 11 38 2A3 2Y4 12 37 2A4 3Y1 13 36 3A1 3Y2 14 35 3A2 Outputs GND 15 34 GND xYx 3Y3 16 33 3A3 17 32 18 31 3A4 VCC 19 30 4A1 4A2 Truth Table(4) xAx 3- State Output Enable Inputs (Active LOW) VCC 1. Input negative-voltage and output voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2. This value is limited to 6.5V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. xOE xOE Product Pin Configuration Notes: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Inputs De s cription 48-Pin A, V L H H L L L 3Y4 VCC 4Y1 H X Z 4Y2 20 29 GND 21 28 GND 4Y3 22 27 4A3 4Y4 23 26 4A4 4OE 24 25 3OE Notes: 4. H = High Signal Level L = Low Signal Level X = Don’t Care or Irrelevant Z = High Impedance 2 PS8652A 05/19/03 PI74LVTC16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Recommended Operating Conditions(5) VC C Supply Voltage M in. M a x. Operating 2.7 3.6 2.0 VIH High- level Input Voltage VC C = 2.7V to 3.6V VIL Low- level Input Voltage VC C = 2.7V to 3.6V VI Input Voltage VO Output Voltage IO H High- level output current IO L Low- level output current Units 0.8 0 5.5 High or Low State 0 VC C 3- State 0 5.5 VC C = 2.7V –12 VC C = 3.0V to 3.6V – 24 VC C = 2.7V 12 VC C = 3.0V to 3.6V 24 ∆t/∆v Input transition rise or fall rate V mA 10 ∆t/∆VC C Power- up ramp rate 15 0 TA – 40 Operating free- air temperature ns/V µs/V +85 °C Notes: 5. All unused inputs must be held at VCC or GND to ensure proper device operation. 3 PS8652A 05/19/03 PI74LVTC16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C) Parame te rs VIK VO H De s cription Clamp Diode Voltage Output High Voltage Te s t Conditions M in. VC C = 2.7V II = –18mA VC C = 2.7V to 3.6V IO H = –100µA VC C –0.2V VC C = 2.7V IO H = –12mA 2.2 IO H = –12mA 2.4 IO H = –24mA 2.2 VC C = 3V M a x. –1.2V V VC C = 2.7V to 3.6V IO L = 100µA 0 .2 VC C = 2.7V IO L = 12mA 0.4 IO L = 12mA 0.4 IO L = 24mA 0.55 VC C = 0V to 3.6V VI = 0V to 5.5V ±5 Current VC C = 0V VI or VO = 0V to 5.5V ±5 3- State Output Leakage Current VC C = 2.7V to 3.6V VO = 0V to 5.5V, ±5 IO ZPU Power- Up 3- State Current VC C = 0V to 1.5V VO = 0.5V to 5.5V, OE = don't care ±5 IO ZPD Power- Down 3- State Current VC C = 1.5V to 0V VO = 0.5V to 5.5V, OE = don't care ±5 IC C Quiescent Power Supply Current VC C = 2.7V to 3.6V ∆IC C Increase in IC C VC C = 2.7V to 3.6V VO L Output Low Voltage VC C = 3V II IO FF IO Z Input Leakage Current Power Off Output Leakage VI = VC C or GND 3.6V ≤ VI ≤ 5.5V One input at VC C - 0.6V(6) Other inputs at VC C or GND Units IO = 0 µA 100 100 Notes: 6. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 4 PS8652A 05/19/03 PI74LVTC16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Capacitance Parame te rs De s cription Typ.(7) Te s t Conditions CI Input Capacitance VCC = 3.3V, VI = VCC or GND 3.7 CO Output Capacitance VCC = 3.3V, VO = VCC or GND 7 C PD Power Dissipation Capacitance (8) VCC = 3.3V, VI = 0V or VCC, f =10 MHz 15 Units pF Notes: 7. All typical values are measured at VCC = 3.3V, TA = 25°C. 8. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current sumption (ICCD) at no output loading and operating at 50% duty cycle, CPD is related to ICCD dynamic operating expression: ICCD= (CPD)(VCC)(fIN)+(ICCstatic) concurrent by the Switching Characteristics Over Operating Range Parame te rs tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(O) D e s cription From (Input) To (Output) Propagation Delay A Y O utput Enable Time OE Y O utput Disable Time OE Y VCC = 3.3V ±0.3V VCC = 2.7V CL = 50pF, RL = 500Ohm CL = 50pF, RL = 500Ohm M in. Typ.(9) M ax. 1.0 2.5 3.4 3.8 1.0 2.5 3.4 3.8 1.0 2.9 4.2 5.0 1.0 3.0 4.2 5.0 1.0 2.5 4.0 4.7 1.0 2.4 3.9 4.3 O utput to O utput Skew(10) M in. Units M a x. ns 0.5 Notes: 9. All typical values are measured at VCC = 3.3V, TA = 25°C. 10. Skew between any two outputs, switching in the same direction. 5 PS8652A 05/19/03 PI74LVTC16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 2.7V and 3.3V ±0.3V 6V S1 500Ω From Output Under Test CL = 50pF Open GND 500Ω (See Note A) Te s t S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND Load Circuit tW 2.7V 1.5V Input 1.5V 0V Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) 2.7V Input 1.5V Output Waveform 1 S1 at 6V (see Note B) 1.5V 0V tPHL tPLH 2.7V 1.5V 3V 1.5V Output VOL+0.3V tPZH Output Waveform 2 S1 at GND (see Note B) 1.5V VOL Voltage Waveforms Propagation Delay Times 0V tPLZ tPHZ VOH 1.5V 1.5V tPZL 1.5V VOH -0.3V VOL VOH 0V Voltage Waveforms Enable and Disable Times Figure 1. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50W, tR £ 2.5ns, tF £ 2.5ns. D. The outputs are measured one at a time with one transition per measurement. 6 PS8652A 05/19/03 PI74LVTC16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Packaging Mechanical: 48-pin TSSOP (A) 48 .236 .244 1 6.0 6.2 .488 12.4 .496 12.6 .047 1.20 Max SEATING PLANE .004 0.09 .008 0.20 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS .0197 BSC 0.50 .002 .006 0.05 0.15 .007 .010 0.17 0.27 0.45 .018 0.75 .030 .319 BSC 8.1 Packaging Mechanical: 48-pin SSOP (V) 48 .291 .299 7.39 7.59 .395 .420 10.03 10.67 Gauge Plane .010 0.25 .02 0.51 .04 1.01 1 .620 .630 15.75 16.00 .015 0.381 x 45˚ .025 0.635 .008 0.20 Nom. .110 2.79 Max .025 BSC 0.635 .008 0.20 .0135 0.34 0-8˚ .008 0.20 .016 0.40 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 7 PS8652A 05/19/03 PI74LVTC16244 3.3V 16-Bit Buffer/Line Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Ordering Information Orde ring Code Package Code Package Type PI74LVTC16244A A 48- pin, 240- mil wide plastic TSSOP (A) PI74LVTC16244AE A Pb- free, 48- pin, 240- mil wide plastic TSSOP (A) PI74LVTC16244V V 48- pin, 300- mil wide plastic SSOP (V) PI74LVTC16244VE V Pb- free, 48- pin, 300- mil wide plastic SSOP (V) Notes: 1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/mechanicals.php 2. X = Tape/Reel Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 8 PS8652A 05/19/03