SN65EPT22 www.ti.com............................................................................................................................................................................................ SLLS926 – DECEMBER 2008 3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Buffer FEATURES APPLICATIONS • • • • 1 • • • • • • Dual 3.3V LVTTL to LVPECL Buffer Operating Range – LVPECL VCC = 3.0 V to 3.6 V With GND = 0 V Support for Clock Frequencies to 2.0 GHz (typ) 420 ps Typical Propagation Delay Deterministic HIGH Output Value for Open Input Conditions Built-in Temperature Compensation Drop in Compatible to MC100ELT23 PNP Single Ended Inputs for Minimal Loading Data and Clock Transmission Over Backplane Signaling Level Conversion DESCRIPTION The SN65EPT22 is a low power dual LVTTL to LVPECL translator device. The device includes circuitry to maintain known logic HIGH level when inputs are in open condition. The SN65EPT22 is housed in an industry standard SOIC-8 package and is also available in TSSOP-8 package option. PINOUT ASSIGNMENT Q0 1 8 VCC Q0 2 7 D0 LVPECL LVTTL Q1 3 6 D1 Q1 4 5 GND Table 1. Pin Description PIN FUNCTION D0, D1 LVTTL data inputs Q0, Q0, Q1, Q1 LVPECL outputs VCC Positive supply GND Ground ORDERING INFORMATION (1) (1) PART NUMBER PART MARKING PACKAGE LEAD FINISH SN65EPT22D SN65EPT22 SOIC NiPdAu SN65EPT22DGK SN65EPT22 SOIC-TSSOP NiPdAu Leaded device options not initially available. Contact sales representative for further details. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated SN65EPT22 SLLS926 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) PARAMETER CONDITION VALUE UNIT 6 V 0 to 6 V 3.3 V Absolute supply voltage, VCC GND = 0 and VI ≤ VCC Absolute input voltage, VI Supply voltage LVPEL Output current Continuous 50 Surge 100 mA Operating temperature range –40 to 85 °C Storage temperature range –65 to 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. POWER DISSIPATION RATINGS PACKAGE CIRCUIT BOARD MODEL POWER RATING TA < 25°C (mW) THERMAL RESISTANCE, JUNCTION TO AMBIENT NO AIRFLOW DERATING FACTOR TA > 25°C (mW/°C) POWER RATING TA = 85°C (mW) SOIC SOIC-TSSOP Low-K 719 139 7 288 High-K 840 119 8 336 Low-K 469 213 5 188 High-K 527 189 5 211 THERMAL CHARACTERISTICS PARAMETER θJB Junction-to Board Thermal Resistance θJC Junction-to Case Thermal Resistance PACKAGE VALUE UNIT SOIC 79 °C/W SOIC-TSSOP 120 SOIC 98 SOIC-TSSOP 74 °C/W KEY ATTRIBUTES CHARACTERISTICS VALUE Moisture sensitivity level Lead free package SOIC-8 TSSOP-8 Flammability rating (Oxygen Index: 28 to 34) Level 1 Level 3 UL 94 V-0 at 0.125 in ESD-HBM 4 kV ESD-machine model 200 V ESD-charge device model 2 kV Meets or exceeds JEDEC Spec EIA/JESD78 latchup test 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN65EPT22 SN65EPT22 www.ti.com............................................................................................................................................................................................ SLLS926 – DECEMBER 2008 TTL INPUT DC CHARACTERISTICS (1) (VCC = 3.3 V, GND = 0, TA = –40°C to 85°C) CHARACTERISTIC CONDITION MIN TYP MAX UNIT µA IIH Input HIGH current VIN = 2.7 V IIHH Input HIGH current max VIN = VCC 100 µA IIL Input LOW current VIN = 0.5 V –0.6 mA VIK Input clamp voltage IIN = –18 mA VIH Input high voltage VIL Input low voltage (1) 20 –1 ICC –40°C MIN (3) Output HIGH voltage VOL Output LOW voltage (3) MAX 39 45 2155 2224 2405 1355 1441 1605 MIN 85°C TYP MAX 42 47 2155 2224 2405 1355 1438 1605 MIN UNIT TYP MAX 45 50 mA 2155 2224 2405 mV 1355 1435 1605 mV Device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Output parameters vary 1:1 with VCC All loading with 50Ω to VCC –2.0V AC CHARACTERISTICS (1) (VCC = 3.0 V to 3.6 V; GND = 0 V) (2) –40°C CHARACTERISTIC MIN fMAX Max switching frequency (3), see Figure 5 tPLH / tPHL Propagation delay to differential output tSKEW Device to device skew tr / tf Output rise/fall times (20%–80%) MIN 2.1 (5) Random clock jitter (RMS) 25°C TYP MAX 230 Within device skew (4) tJITTER (2) (3) (4) (5) (2) 25°C TYP Power supply current VOH (1) V Device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. CHARACTERISTIC (2) (3) V 0.8 PECL OUTPUT DC CHARACTERISTICS (1) (VCC = 3.3 V; GND = 0.0V) (1) V 2.0 150 TYP 85°C MAX MIN 550 230 2.0 550 230 TYP MAX 2.0 UNIT GHz 550 ps 25 50 25 50 25 50 ps 100 200 100 200 100 200 ps 0.2 0.8 0.2 0.8 0.2 0.8 ps 300 ps 300 150 300 150 Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Measured using a 2.4 V source, 50% duty cycle clock source. All loading with 50 Ω to VCC – 2.0 V. Maximum switching frequency mearured at output amplitude of 300 mVpp. Skew is measured between outputs under identical transitions and conditions on any one device. Device−to−Device Skew for identical transitions at identical VCC levels. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN65EPT22 3 SN65EPT22 SLLS926 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com Typical Termination for Output Driver ZO = 50 W P P Driver Receiver N N ZO = 50 W 50 W 50 W VTT VTT = VCC - 2 V Figure 1. Termination for Output Driver 1.5 V 1.5 V IN OUT OUT tPLH tPHL Figure 2. Output Propagation Delay 80% 20% tr tf Figure 3. Output Rise and Fall Times 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN65EPT22 SN65EPT22 www.ti.com............................................................................................................................................................................................ SLLS926 – DECEMBER 2008 1.5 V 1.5 V IN QO QO tPLH0 tPHL0 Q1 Q1 tPLH1 tPHL0 Device Skew = Higher [(tPLH1 - tPLH0), (tPHL1 - tPHL0)] Figure 4. Device Skew 1000 VCC = 3 V, GND = 0 V, Vswing = 0.8 V - 2 V 900 Output Amplitude - mV 800 TA = -40°C 700 TA = 25°C 600 500 TA = 85°C 400 300 200 100 0 0 500 1000 1500 f - Frequency - MHz 2000 2500 Figure 5. Output Amplitude versus Frequency Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN65EPT22 5 PACKAGE MATERIALS INFORMATION www.ti.com 22-Dec-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN65EPT22DR Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.4 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 22-Dec-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65EPT22DR SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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