SN65EPT21 www.ti.com SLLS970 – NOVEMBER 2009 3.3-V Differential PECL/LVDS to TTL Translator Check for Samples: SN65EPT21 FEATURES 1 • • • • • • 1 ns Propagation Delay Fmax > 300MHz Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V 24-mA TTL Output Built-In Temperature Compensation Drop-In Compatible to the MC10EPT21, MC100EPT21 PIN ASSIGNMENT(Add pullup on BOTH inputs) D or DGK PACKAGE (TOP VIEW) + NC 1 2 7 Q 6 NC 5 GND + Data and Clock Transmission Over Backplane Signaling Level Conversion for Clock or Data D VBB The SN65EPT21 is a differential PECL-to-TTL translator. It operates on +3.3 V supply and ground only. The device includes circuitry to maintain inputs at Vcc/2 when left open. The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01μF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used. 3 LVPECL DESCRIPTION 4 Table 1. Pin Descriptions PIN FUNCTION Q LVTTL/LVCMOS Output D, D Differential LVPECL/LVDS/CML Input VCC Positive Supply VBB Output Reference Voltage GND Ground NC No Connect EP (DFN8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. The SN65EPT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. ORDERING INFORMATION (1) (1) VCC LVTTL D APPLICATIONS • • 8 + PART NUMBER PART MARKING PACKAGE LEAD FINISH SN65EPT21D/DR SN65EPT21DGK/DGKR EPT21 SOIC NiPdAu SSSI MSOP NiPdAu Leaded device options are not initially available; contact a sales representative for further details. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated SN65EPT21 SLLS970 – NOVEMBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS (1) PARAMETER CONDITIONS Absolute PECL mode supply voltage VALUE UNIT 3.8 V ±0.5 mA VCC (GND = 0 V) Sink/source current, VBB GND = 0 V, VI ≤ VCC PECL input voltage 0 to 3.8 V Operating temperature range –40 to 85 °C Storage temperature range –65 to 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS PACKAGE CIRCUIT BOARD MODEL POWER RATING TA < 25°C (mW) THERMAL RESISTANCE, JUNCTION-TO-AMBIENT NO AIRFLOW DERATING FACTOR TA > 25°C (mW/°C) POWER RATING TA = 85°C (mW) SOIC MSOP Low-K 719 139 7 288 High-K 840 119 8 336 Low-K 469 213 5 188 High-K 527 189 5 211 THERMAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER θJB Junction-to-board thermal resistance θJC Junction-to-case thermal resistance MIN TYP SOIC 79 MSOP 120 SOIC 98 MSOP 74 MAX UNIT °C/W °C/W KEY ATTRIBUTES CHARACTERISTICS VALUE Internal input pull-down resistor 50 kΩ Internal input pull-up resistor 50 kΩ Moisture sensitivity level Level 1 Flammability rating (oxygen index: 28 to 34) Electrostatic discharge UL 94 V-0 at 0.125 in Human body model Charged-device model Machine mode 2 kV 2 kV 200 V Meets or exceeds JEDEC Spec EIA/JESD78 latchup test 2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65EPT21 SN65EPT21 www.ti.com SLLS970 – NOVEMBER 2009 PECL DC CHARACTERISTICS At VCC = 3.3 V, GND = 0.0 V (unless otherwise noted) (1) PARAMETER TEST CONDITIONS (2) TA = –40°C MIN TA = 25°C TYP MAX MIN TA = 85°C TYP MAX MIN TYP MAX UNIT VIH High-level input voltage, single-ended 2075 2420 2075 2420 2075 2420 mV VIL Low-leveI input voltage, single-ended 1355 1675 1355 1675 1355 1675 mV VBB Output reference voltage 2160 mV VIHCM R High-level input voltage, common-mode range, differential IIH High-level input current IIL Low-level input current (1) (2) (3) 1910 See (3) 2009 2160 1910 2034 2160 1910 1.2 3.3 1.2 3.3 150 -150 2026 1.2 150 -150 3.3 V 150 μA μA -150 The device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Input parameters vary 1:1 with VCC. VIHCMR(min) varies 1:1 with GND, VIHCMR(max) varies 1:1 with VCC. VIHCMR range is referenced to the most positive side of the differential input signal TTL DC CHARACTERISTICS At VCC = 3.3 V, GND = 0.0, TA = –40°C to 85°C (unless otherwise noted) (1) PARAMETER TEST CONDITIONS ICCH Power supply current Output is HIGH ICCL Power supply current Output is LOW VOH High-level output voltage IOH = –3.0 mA VOL Low-level output voltage IOL = 24 mA IOS Output short circuit current (1) MIN TYP MAX 5 9 20 mA 8 7.5 26 mA 2.4 3.05 –180 UNIT V 0.32 0.5 V –100 –80 mA The device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. AC CHARACTERISTICS At VCC = 3.0 V to 3.6 V, GND = 0.0 V (unless otherwise noted) (1) PARAMETER TEST CONDITIONS (2) TA = –40°C MIN TA = 25°C TYP MAX 300 MIN TA = 85°C TYP MAX TYP MAX Maximum switching frequency (Figure 1–Figure 3) tPLH Propagation delay At 1.5 V 1000 1394 1800 1000 1444 1800 1000 1481 1800 ps tPHL Propagation delay At 1.5 V 1000 1140 1900 1000 1280 1900 1000 1421 1900 ps tJITTER Random clock jitter (RMS) tSKEW Duty Cycle Skew (3) Part-to-Part Skew VPP Input swing See tr/tf Output rise/fall times Q, Q (0.8V - 2.0V)) (2) (3) (4) 5 3.2 5 3.4 5 ps 94 250 78 250 62 250 ps 500 (4) 150 250 MHz 2.25 (3) tSKPP 300 UNIT fMAX (1) 300 MIN 500 500 1200 150 900 250 500 1200 150 900 250 500 500 ps 1200 mV 900 ps The device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. RL = 500 Ω to GND and CL = 20 pF to GND. See Figure 4. Measured with 750mV, 50% duty cycle clock source Skews are measured between outputs under identical transitions VPP(min) is minimum input swing for which ac parameters are assured. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65EPT21 3 SN65EPT21 SLLS970 – NOVEMBER 2009 www.ti.com 5 VCC = 3 V Voltage - V 4 VOH @ -40°C VOH @ 25°C 3 2 VOH @ 85°C VOL @ -40°C 1 VOL @ 25°C VOL @ 85°C 0 0 50 100 150 200 250 300 350 400 450 500 f - Frequency - MHz Figure 1. Maximum Switching Frequency VCC= 3.0 V 5 VCC = 3.3 V 4 Voltage - V VOH @ 85°C VOH @ 25°C 3 VOH @ -40°C 2 VOL @ -40°C 1 VOL @ 25°C VOL @ 85°C 0 0 50 100 150 200 250 300 350 400 450 500 f - Frequency - MHz Figure 2. Maximum Switching Frequency VCC= 3.3 V 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65EPT21 SN65EPT21 www.ti.com SLLS970 – NOVEMBER 2009 5 VCC = 3.6 V 4 Voltage - V VOH @ -40°C VOH @ 85°C VOH @ 25°C 3 2 VOL @ 25°C VOL @ 85°C 1 VOL @ -40°C 0 0 50 100 150 200 250 300 350 400 450 500 f - Frequency - MHz Figure 3. Maximum Switching Frequency VCC= 3.6 V TTL Output CL Includes Test Fixture Capacitance CL RL AC Test Load GND Figure 4. TTL Output AC Test Loading Condition IN IN 1.5 V 1.5 V OUT tPLH tPHL Figure 5. Output Propagation Delay Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65EPT21 5 SN65EPT21 SLLS970 – NOVEMBER 2009 www.ti.com 90% 10% tr tf Figure 6. Output Rise and Fall Times 6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65EPT21 PACKAGE OPTION ADDENDUM www.ti.com 16-Apr-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN65EPT21D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65EPT21DGK ACTIVE MSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65EPT21DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65EPT21DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65EPT21DGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN65EPT21DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65EPT21DGKR MSOP DGK 8 2500 346.0 346.0 29.0 SN65EPT21DR SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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