TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES Copyright © 1998, Power Innovations Limited, UK JANUARY 1998 - REVISED OCTOBER 1998 OVERVOLTAGE PROTECTION FOR LUCENT TECHNOLOGIES LCAS ● Symmetrical and Asymmetrical Characteristics for Optimum Protection of Lucent L7581/2/3 LCAS TERMINAL VDRM D PACKAGE (TOP VIEW) V(BO) V V PAIR T-G (SYMMETRICAL) ±105 ±130 R-G (ASYMMETRICAL) +105, -180 +130, -220 CUSTOMISED VERSIONS AVAILABLE ● Rated for International Surge Wave Shapes WAVE SHAPE STANDARD 2/10 µs 8/20 µs 10/160 µs 10/700 µs 10/560 µs 10/1000 µs GR-1089-CORE ANSI C62.41 FCC Part 68 ITU-T K20/21 FCC Part 68 GR-1089-CORE 1 8 G 2 7 G NC 3 6 G R 4 5 G MDXXAE NC - No internal connection device symbol ITSP A 175 120 60 50 45 35 ● Ion-Implanted Breakdown Region Precise And Stable Voltage Low Voltage Overshoot Under Surge ● Planar Passivated Junctions Low Off-State Current < ±10 µA ● Small Outline Surface Mount Package - Available Ordering Options CARRIER Tube Taped and reeled T NC ORDER # TISPL758LF3D TISPL758LF3DR description The TISPL758LF3 is an integrated combination of a symmetrical bidirectional overvoltage protector and an asymmetrical bidirectional overvoltage protector. It is designed to limit the peak voltages on the line terminals of the Lucent Technologies L7581/2/3 LCAS (Line Card Access Switches). An LCAS may also be referred to as a Solid State Relay, SSR, i.e. a replacement of the conventional electromechanical relay. The TISPL758LF3D voltages are chosen to give adequate LCAS protection for all switch conditions. The most potentially stressful T R SD3XAA G Terminals T, R and G correspond to the alternative line designators of A, B and C condition is low level power cross when the LCAS switches are closed. Under this condition, the TISPL758LF3D limits the voltage and corresponding LCAS dissipation until the LCAS thermal trip operates and opens the switches. Under open-circuit ringing conditions, the line ring (R) conductor will have high peak voltages. For battery backed ringing, the ring conductor will have a larger peak negative voltage than positive i.e. the peak voltages are asymmetric. An overvoltage protector with a similar voltage asymmetry will give the most effective protection. On a connected line, the tip (T) conductor will have much smaller voltage levels than the opencircuit ring conductor values. Here a symmetrical voltage protector gives adequate protection. Overvoltages are normally caused by a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. These overvoltages are initially clipped by protector breakdown clamping until the voltage rises to the breakover level, which causes the Support from the Microelectronics Group of Lucent Technologies Inc. is gratefully acknowledged in the definition of the TISPL758LF3D voltage levels and for performing TISPL758LF3D evaluations. PRODUCT INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 device to crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. For negative surges, the high crowbar holding current prevents d.c. latchup with the SLIC current, as the surge current subsides. The TISPL758LF3 is guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. These protection devices are supplied in a small-outline surface mount (D) plastic package. The difference between the TISPL758LF3D and TISPL758LF3DR versions is shown in the ordering information. absolute maximum ratings, TA = 25°C (unless otherwise noted) RATING SYMBOL Repetitive peak off-state voltage R-G terminals T-G terminals VALUE -180, +105 VDRM -105, +105 UNIT V Non-repetitive peak on-state pulse current (see Notes 1, 2 and 3) 2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape) 175 8/20 µs (ANSI C62.41, 1.2/50 µs voltage wave shape) 120 10/160 µs (FCC Part 68, 10/160 µs voltage wave shape) 60 5/200 µs (VDE 0433, 2.0 kV, 10/700 µs voltage wave shape) 50 ITSP 0.2/310 µs (I3124, 2.0 kV, 0.5/700 µs voltage wave shape) A 50 5/310 µs (ITU-T K20/21, 2.0 kV, 10/700 µs voltage wave shape) 50 5/310 µs (FTZ R12, 2.0 kV, 10/700 µs voltage wave shape) 50 10/560 µs (FCC Part 68, 10/560 µs voltage wave shape) 45 10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape) 35 Non-repetitive peak on-state current (see Notes 1, 2 and 3) full sine wave 50 Hz 60 Hz 16 ITSM A 20 Repetitive peak on-state current, 50/60 Hz, (see Notes 2 and 3) ITSM 2x1 A Initial rate of rise of on-state current, diT/dt 150 A/µs TJ -40 to +150 °C Tstg -40 to +150 °C Exponential current ramp, Maximum ramp value < 70 A Junction temperature Storage temperature range NOTES: 1. Above the maximum specified temperature, derate linearly to zero at 150°C lead temperature. 2. Initially the TISPL758LF3 must be in thermal equilibrium with 0°C < TJ <70°C. 3. The surge may be repeated after the TISPL758LF3 returns to its initial conditions. recommended operating conditions MIN R1 Series Resistor for GR-1089-CORE first-level surge, operational pass (4.5.7) 20 Series Resistor for FCC Part 68 10/160 non-operational pass 0 10/160 operational pass 18 10/560 non-operational pass 0 10/560 operational pass 10 R1 R1 Series Resistor for ITU-T K20/21 PRODUCT 2 INFORMATION 10/700, < 2 kV, operational pass 0 10/700, 4 kV, operational pass 40 TYP MAX UNIT Ω Ω Ω TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 electrical characteristics for the T-G and R-G terminal pairs, TJ = 25°C (unless otherwise noted) PARAMETER IDRM V(BO) V(BO) VALUE TEST CONDITIONS Repetitive peak offstate current MIN TYP VD = ±VDRM , (See Note 4) MAX ±10 R-G terminals -220 +130 T-G terminals -130 +130 Impulse breakover volt- Rated impulse conditions with operational pass series R-G terminals -240 +140 age T-G terminals -140 +140 dv/dt = ±250 V/ms, RSOURCE = 300 Ω Breakover voltage IH Holding current resistor di/dt = -30 mA/ms +100 di/dt = +30 mA/ms -150 UNIT µA V V mA ID Off-state current 0 < VD < ±50 V, TJ = 85°C ±10 µA CTG Off-state capacitance f = 100 kHz, Vd = 1 V rms VTG = -5 V, (See Note 5) 18 36 pF CRG Off-state capacitance f = 100 kHz, Vd = 1 V rms VTG = -50 V, (See Note 5) 10 20 pF NOTES: 4. Positive and negative values of VDRM are not equal. See ratings table 5. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The third terminal is connected to the guard terminal of the bridge. thermal characteristics PARAMETER RθJA Junction to free air thermal resistance PRODUCT MIN TYP MAX UNIT 160 °C/W INFORMATION 3 TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION +i Quadrant I ITSP Switching Characteristic ITSM V(BO) I(BO) IH IDRM VD VDRM -v ID ID VD +v VDRM IDRM IH I(BO) V(BO) ITSM Quadrant III ITSP Switching Characteristic -i PMXXAE Figure 1. ASYMMETRICAL VOLTAGE-CURRENT CHARACTERISTIC FOR R-G TERMINAL PAIR +i Quadrant I ITSP Switching Characteristic ITSM V(BO) I(BO) IH IDRM VDRM -v VD ID ID VD VDRM +v IDRM IH I(BO) V(BO) ITSM Quadrant III Switching Characteristic ITSP -i PMXXAH Figure 2. SYMMETRICAL VOLTAGE-CURRENT CHARACTERISTIC FOR T-G TERMINAL PAIR PRODUCT 4 INFORMATION TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 TYPICAL CHARACTERISTICS OFF-STATE CURRENT vs JUNCTION TEMPERATURE 1.2 TC3MAG 100 NORMALISED BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE TC3MAJA Normalised Breakdown Voltages VD = ±50 V ID - Off-State Current - µA 10 1 0·1 0·01 1.1 V(BO) 1.0 VDRM 0.9 0·001 -25 0 25 50 75 100 125 -25 150 0 25 50 75 100 125 150 TJ - Junction Temperature - °C TJ - Junction Temperature - °C Figure 3. Figure 4. NORMALISED BREAKOVER VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT 2.0 TC3MAC NORMALISED HOLDING CURRENT 1.3 1.2 1.1 NORMALISED HOLDING CURRENT vs JUNCTION TEMPERATURE TC3MAHA 1.5 1.0 0.9 0.8 0.7 0.6 1.0 0·001 0.5 0·01 0·1 1 10 100 di/dt - Rate of Rise of Principle Current - A/µs Figure 5. PRODUCT -25 0 25 50 75 100 125 150 TJ - Junction Temperature - °C Figure 6. INFORMATION 5 TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 APPLICATIONS INFORMATION OVERCURRENT PROTECTION TIP WIRE LCAS TISPL758LF3D SLIC TLINE TBAT RLINE RBAT R1a Th1 Th2 RING WIRE R1b RRINGING TRINGING R2b R2a ±VRING VRINGBAT S4b S4a RING GENERATOR Figure 7. LCAS PROTECTION WITH A TISPL758LF3D PRODUCT 6 INFORMATION VBAT TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 MECHANICAL DATA D008 plastic small-outline package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 Designation per JEDEC Std 30: PDSO-G8 5,00 (0.197) 4,80 (0.189) 8 7 6 5 1 2 3 4 6,20 (0.244) 5,80 (0.228) 4,00 (0.157) 3,81 (0.150) 7° NOM 3 Places 1,75 (0.069) 1,35 (0.053) 0,50 (0.020) x 45°NOM 0,25 (0.010) 0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) 7° NOM 4 Places 0,51 (0.020) 0,36 (0.014) 8 Places Pin Spacing 1,27 (0.050) (see Note A) 6 Places 5,21 (0.205) 4,60 (0.181) 0,229 (0.0090) 0,190 (0.0075) 4° ± 4° 1,12 (0.044) 0,51 (0.020) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. B. C. D. Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within ±0,051 (0.002). PRODUCT MDXXAA INFORMATION 7 TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 MECHANICAL DATA D008 tape dimensions D008 Package (8 pin SOIC) Single-Sprocket Tape 4,10 3,90 8,05 7,95 1,60 1,50 2,05 1,95 0,40 0,8 MIN. 5,55 5,45 6,50 6,30 ø 1,5 MIN. Carrier Tape Cover 0 MIN. Direction of Feed Embossment 12,30 11,70 Tape 2,2 2,0 ALL LINEAR DIMENSIONS IN MILLIMETERS NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: Reel hub diameter: Reel axial hole: 330 +0,0/-4,0 mm 100 ±2,0 mm 13,0 ±0,2 mm B. 2500 devices are on a reel. PRODUCT 8 INFORMATION MDXXAT TISPL758LF3D INTEGRATED SYMMETRICAL AND ASYMMETRICAL BIDIRECTIONAL OVERVOLTAGE PROTECTORS FOR LUCENT TECHNOLOGIES L7581/2/3 LINE CARD ACCESS SWITCHES JANUARY 1998 - REVISED OCTOBER 1998 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright © 1998, Power Innovations Limited PRODUCT INFORMATION 9